WO2023221723A1 - 数据处理方法、电子设备、存储介质及程序产品 - Google Patents

数据处理方法、电子设备、存储介质及程序产品 Download PDF

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Publication number
WO2023221723A1
WO2023221723A1 PCT/CN2023/089282 CN2023089282W WO2023221723A1 WO 2023221723 A1 WO2023221723 A1 WO 2023221723A1 CN 2023089282 W CN2023089282 W CN 2023089282W WO 2023221723 A1 WO2023221723 A1 WO 2023221723A1
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Prior art keywords
bit sequence
coded bit
data processing
processing method
target
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PCT/CN2023/089282
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English (en)
French (fr)
Inventor
李立广
袁志锋
许进
梁楚龙
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ZTE Corp
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ZTE Corp
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Priority to KR1020247036933A priority Critical patent/KR20240170955A/ko
Priority to EP23806676.5A priority patent/EP4510457A4/en
Priority to US18/865,313 priority patent/US20250293800A1/en
Priority to JP2024538417A priority patent/JP2025500507A/ja
Publication of WO2023221723A1 publication Critical patent/WO2023221723A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H04L1/0042—Encoding specially adapted to other signal generation operation, e.g. in order to reduce transmit distortions, jitter, or to improve signal shape
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/23—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using convolutional codes, e.g. unit memory codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/63—Joint error correction and other techniques
    • H03M13/635—Error control coding in combination with rate matching
    • H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0041—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0059—Convolutional codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0067—Rate matching
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/08—Arrangements for detecting or preventing errors in the information received by repeating transmission, e.g. Verdan system
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/1515—Reed-Solomon codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
    • H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/19—Single error correction without using particular properties of the cyclic codes, e.g. Hamming codes, extended or generalised Hamming codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
    • H03M13/2957—Turbo codes and decoding
    • H03M13/2996—Tail biting
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0057—Block codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0071—Use of interleaving

Definitions

  • the present application relates to the field of communication technology, in particular to a data processing method, electronic equipment, computer storage media and computer program products.
  • the transmitter performs channel coding on the original information bit sequence to obtain the coded bit sequence, then maps the coded bit sequence into a constellation modulation symbol, and finally sends the obtained constellation modulation symbol.
  • the channel coding can be Forward Error Correction (FEC) coding.
  • FEC Forward Error Correction
  • modules such as sub-block interleaving, bit collection, and bit selection. Although it can improve the resistance against sudden fading and interference of the channel, it increases the hardware complexity and cannot Ensuring the simplicity of passive IoT tag devices and the reliability of transmission, while accompanied by more energy consumption.
  • Embodiments of the present application provide a data processing method, electronic equipment, computer storage media and computer program products, which can ensure the simplicity of label equipment, the reliability of data transmission, and reduce energy consumption.
  • inventions of the present application provide a data processing method.
  • the data processing method includes:
  • the repeated expansion of the first coded bit sequence to obtain a second coded bit sequence includes;
  • each first bit in the first encoded bit sequence another first bit is repeatedly generated until a preset target number of times is reached to obtain a bit sequence including multiple first bits. According to each of the bits Sequentially generate the second coded bit sequence; or,
  • inventions of the present application also provide a data processing method.
  • the data processing method includes:
  • the second coded bit sequence is obtained by the sending end performing a first operation or a second operation on a first coded bit sequence of target length, and the first coded bit sequence is obtained by the sending end.
  • the information bit sequence is obtained by error correction coding;
  • the first operation includes, for each first bit in the first encoded bit sequence, repeatedly generating another first bit until a preset target number of times is reached, to obtain bits including a plurality of the first bits. sequence, generating the second coded bit sequence in sequence according to each of the bit sequences;
  • the second operation includes repeatedly generating another first coded bit sequence of the target length until reaching a preset target number of times to obtain a plurality of the first coded bit sequences. According to the plurality of first coded bit sequences, sequence to generate the second encoded bit sequence.
  • embodiments of the present application also provide an electronic device, including: at least one processor; at least one memory for storing at least one program; when at least one of the programs is executed by at least one of the processors, the Data processing methods as described previously.
  • embodiments of the present application further provide a computer-readable storage medium in which a processor-executable program is stored, and when the processor-executable program is executed by the processor, it is used to implement the aforementioned Data processing methods.
  • embodiments of the present application also provide a computer program product.
  • the computer program or the computer instructions are stored in a computer-readable storage medium.
  • the processor of the computer device reads the computer program from the computer-readable storage medium.
  • the computer program or the computer instructions the processor executes the computer program or the computer instructions, so that the computer device performs the data processing method as described above.
  • the first coded bit sequence is obtained by performing error correction coding on the obtained information bit sequence, and then the second coded bit sequence is obtained by repeatedly extending the obtained first coded bit sequence, and the second coded bit sequence is obtained.
  • the bit sequence is sent to the receiving end as the tag device. Since each bit in the first coded bit sequence of the target length or the entire first coded bit sequence is repeatedly expanded according to the preset target number of times, the required The second coded bit sequence, thus enabling the receiving end to simply and conveniently receive the second coded bit sequence and process it.
  • the overall processing process is simple and convenient to implement and has low hardware requirements. In other words, it can ensure that the tag device Achieve minimalism and reliability of transmitted data, and can reduce energy consumption, thus filling the technical gaps in related methods.
  • Figure 1 is a schematic diagram of an implementation environment for executing a data processing method provided by an embodiment of the present application
  • Figure 2 is a schematic diagram of an implementation environment for executing a data processing method provided by another embodiment of the present application.
  • Figure 3 is a schematic diagram of an IoT device using forward error correction coding in an implementation environment for executing a data processing method provided by an embodiment of the present application;
  • Figure 4 is a flow chart of a data processing method provided by an embodiment of the present application.
  • Figure 5 is a flow chart of performing error correction coding on the acquired information bit sequence to obtain a first coded bit sequence of target length in the data processing method provided by an embodiment of the present application;
  • Figure 6 is a schematic diagram of a data processing method based on IoT communication provided by an embodiment of the present application.
  • Figure 7 is a schematic diagram of a data processing method based on IoT communication provided by another embodiment of the present application.
  • Figure 8 is a schematic diagram of a data processing method based on IoT communication provided by another embodiment of the present application.
  • Figure 9 is a flow chart of sending a second coded bit sequence to the receiving end in the data processing method provided by an embodiment of the present application.
  • Figure 10 is a schematic diagram of data transmission using the backscattering principle based on IoT communication provided by an embodiment of the present application.
  • Figure 11 is the performance of the second coded bit sequence corresponding to different preset target times provided by an embodiment of the present application. Comparison diagram;
  • Figure 12 is a flow chart of a data processing method provided by another embodiment of the present application.
  • Figure 13 is a flow chart of processing the second coded bit sequence in the data processing method provided by an embodiment of the present application.
  • Figure 14 is a flow chart of performing deduplication processing on the second coded bit sequence to obtain the first coded bit sequence in the data processing method provided by an embodiment of the present application;
  • Figure 15 is a flow chart of performing convolutional decoding on a first encoded bit sequence to obtain an information bit sequence in a data processing method provided by an embodiment of the present application;
  • Figure 16 is a schematic diagram of an electronic device provided by an embodiment of the present application.
  • the data processing method of one embodiment includes: performing error correction coding on the obtained information bit sequence to obtain a first coded bit sequence of target length; repeatedly extending the first coded bit sequence to obtain a second coded bit sequence; The end sends a second coded bit sequence; wherein the first coded bit sequence is repeatedly extended to obtain a second coded bit sequence, including: for each first bit in the first coded bit sequence, repeatedly generating another first bit until When the preset target number of times is reached, a bit sequence including a plurality of first bits is obtained, and a second coded bit sequence is generated sequentially according to each bit sequence; or, another first coded bit sequence of target length is repeatedly generated until the preset target number of times is reached.
  • the first coded bit sequence is obtained by performing error correction coding on the obtained information bit sequence, and then the second coded bit sequence is obtained by repeatedly extending the obtained first coded bit sequence, and the second coded bit sequence is obtained.
  • the bit sequence is sent to the receiving end as the tag device. Since each bit in the first coded bit sequence of the target length or the entire first coded bit sequence is repeatedly expanded according to the preset target number of times, the required The second coded bit sequence, thus enabling the receiving end to simply and conveniently receive the second coded bit sequence and process it.
  • the overall processing process is simple and convenient to implement and has low hardware requirements. In other words, it can ensure that the tag device Achieve minimalism and reliability of transmitted data, and can reduce energy consumption, thus filling the technical gaps in related methods.
  • Figure 1 is a schematic diagram of an implementation environment for executing a data processing method provided by an embodiment of the present application.
  • the implementation environment includes but is not limited to the sending end 100 and the receiving end 200 , where the receiving end 200 and the sending end 100 can transmit and receive wireless signals and related interactions.
  • the relative positions and numbers of the receiving end 200 and the sending end 100 can be set accordingly in specific application scenarios. If there are multiple receiving ends 200 and different receiving ends 200 are set in the above manner, then they can be No The wireless signal sent by the transmitting end 100 is received at the same spatial location. It is worth noting that the spatial location here can be different geographical conditions.
  • the sending end 100 and the receiving end 200 may include, but are not limited to, one of the following devices: base station (Base Station, BS), access point (Access Point, AP), node B (node B), g-node B (g node B, generalized node B), Radio Network Controller (Radio Network Controller, RNC), Evolved Node B (Evolved Node B, eNB), Base Station Controller (Base Station Controller, BSC), Base Transceiver Station ( Base Transceiver Station (BTS), transceiver function (TF), radio router, radio transceiver, basic service unit (Basic Service Set, BSS), extended service unit (Extended Service Set, ESS) or radio base station ( Radio Base Station, RBS), this embodiment does not specifically limit this.
  • base station Base Station, BS
  • Access Point Access Point
  • AP Access Point
  • node B node B
  • g-node B g node B, generalized node B
  • Radio Network Controller Radio Network Controller
  • RNC Radio
  • the sending end 100 and the receiving end 200 may be called an access terminal, user equipment (User Equipment, UE), user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, User terminal, wireless communication device, user agent or user device.
  • the sending end 100 may be a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Assistant (PDA), a Handheld devices with wireless communication functions, computing devices or other processing devices connected to wireless modems, vehicle-mounted devices, wearable devices, 5G networks or terminal devices in future 5G or higher networks, etc., are not specifically limited in this embodiment.
  • the implementation environment for executing the data processing method of this embodiment may be, but is not limited to, some networks that can automatically adapt wireless communication devices, such as the Internet of Things (IoT).
  • the sending end 100 and the receiving end 200 can be devices that communicate through IoT (for example, machine type communication devices), which can include, but are not limited to, various types of sensors, water meters, electricity meters, commodity tags or item data tags, etc.
  • IoT Internet of Things
  • the sending end 100 and the receiving end 200 can be devices that communicate through IoT (for example, machine type communication devices), which can include, but are not limited to, various types of sensors, water meters, electricity meters, commodity tags or item data tags, etc.
  • IoT Internet of Things
  • devices in IoT have less battery power, and these devices can have applications with very low throughput data volumes, but require very little energy consumption in order to communicate for a very long time without the need to replace the battery.
  • devices in the IoT do not need batteries to store energy, but directly transmit signals to the receiving end 200 (such as a base station) through backscattering.
  • the tag (Tap) collects energy and backscatters the signal to the receiving end 200
  • the device can be a passive IoT device, which may be used in the licensed spectrum, such as sending signals to mobile communication base stations (for example, node B or G node B), or accessing existing cellular mobile networks. network;
  • the IoT device can also communicate using unlicensed spectrum
  • the IoT device uses an impedance network to send data, indicating different data signals according to different impedance network parameters
  • the IoT device can perform forward error correction encoding on the data that needs to be sent to improve the reliability of data transmission. For example, by performing forward error correction encoding on the original data that needs to be sent, the coverage can be increased or reduced. Transmit energy.
  • the forward error correction coding may be, but is not limited to, Hamming coding, polar coding, low-density parity check coding, Reed-Solomon coding, convolutional coding or turbo coding.
  • Figure 2 is a schematic diagram of an implementation environment for executing a data processing method provided by another embodiment of the present application.
  • the implementation environment includes a base station 210 (that is, the receiving end 200), various types of UEs (including 120, 130 and 140 in Figure 2, that is, the transmitting end 100) and a core network 300.
  • various types of UEs can be IoT devices, which are used to collect various information and then perform forward error correction coding on the data information before sending the data to the base station 210; the base station 210 communicates with each UE. communicates with the core network 300; the core network 300 can provide access authorization, user authentication, Internet protocol connectivity, tracking and other access, routing or mobility management functions.
  • Various types of UEs may be dispersed throughout the implementation environment, and each UE may be fixed or mobile. Each type of UE may communicate with various types of base stations 210 and network equipment (including macro eNBs, small cell eNBs, and relays). base station, etc.) for communication.
  • IoT devices include smart metering, inventory monitoring, water level monitoring, temperature monitoring, equipment monitoring, medical monitoring, wildlife monitoring, weather and geographical event monitoring, fleet management and tracking, remote security sensing , physical access control, and transaction-based commercial charges, etc., are not limited here.
  • FIG. 3 shows a schematic diagram of an IoT device 800 using forward error correction coding in an implementation environment.
  • the IoT device 800 may include but is not limited to a data encoding processing module 810 and a transmitter 820.
  • IoT devices may also include processors, memories, etc., which are used to process data, such as storing some necessary parameter data and information bit sequences, and performing forward error correction coding processing on the input information bit sequences.
  • the encoded data is sent in sequence.
  • Each component in IoT device 800 can communicate with one another, and transmitter 820 can include a single antenna or multiple antennas.
  • the sending end 100 at least has the functions of performing error correction coding on the information bit sequence to obtain a first coded bit sequence, repeatedly extending the first coded bit sequence to obtain a second coded bit sequence, and sending the second coded bit sequence to the receiving end 200. .
  • the receiving end 200 at least has the function of receiving the second coded bit sequence sent by the sending end 100 and processing the second coded bit sequence, wherein the second coded bit sequence is repeatedly extended by the sending end 100 to the first coded bit sequence. It is obtained that the first coded bit sequence is obtained by the sending end 100 performing error correction coding on the acquired information bit sequence.
  • the above functions of the sending end 100 and the receiving end 200 can be applied in different application scenarios, and are not limited here.
  • Figure 4 is a flow chart of a data processing method provided by an embodiment of the present application.
  • the data processing method may include but is not limited to step S110 to step S130.
  • Step S110 Perform error correction coding on the obtained information bit sequence to obtain a first coded bit sequence of target length.
  • the execution subject of the data processing method in this embodiment may be, but is not limited to, the sending end 100 in the embodiment shown in Figure 1, or the UE in the embodiment shown in Figure 2, or the UE in the embodiment shown in Figure 3
  • the IoT device 400 in the embodiment shown; or those skilled in the art can choose to set the corresponding execution subject according to the actual application scenario, which is not limited in this embodiment.
  • the sending end is used as the execution subject of the data processing method. However, this should not be understood as a limitation on the embodiments of the present application.
  • the obtained information bit sequence is error-corrected and encoded to obtain a first coded bit sequence, so that in subsequent steps, the first coded bit sequence can be further processed to obtain a new coded bit sequence.
  • error correction coding includes at least one of the following:
  • LDPC Low Density Parity Check Code
  • the LDPC coding is determined by a low-density parity check matrix, and the LDPC coded bit sequence is obtained by encoding the information bit sequence through the parity check matrix.
  • the parity check matrix of the LDPC encoding can be determined by one or more fundamental matrices.
  • the dimension of the fundamental matrix can be 42 rows and 52 columns or 46 rows and 68 columns.
  • the fundamental matrix includes a square indicating all zeros. The elements of the matrix and the elements indicating the circular shift of the unit matrix.
  • the polar code that is, polar code
  • polar code is a linear block code proposed based on channel polarization theory.
  • the RS codes namely Reed-solomon codes
  • This coding method can achieve the coding method of maximizing the minimum distance, so the RS coding has a very strong ability to correct burst errors.
  • an RS code with a code length of n1 and a message length of k1 is defined by a generator polynomial. Any codeword polynomial output by the RS coding can be divisible by the generator polynomial.
  • n1 is equal to 2 raised to the power m minus 1, where m is equal to one of the following: 4, 5, 6, 7, 8, 9, or 10.
  • the BCH code is a cyclic code that can correct multiple random errors.
  • the binary linear cyclic code independently discovered by Bose, Chaudhuri and Hocquenghem is named BCH code after the initials of their names.
  • the BCH code is determined by a generator polynomial, and the generator polynomial is determined by multiple primitive polynomials.
  • the turbo coding is a parallel cascade convolutional code, that is, two or more component codes are connected in parallel, and the turbo coding output can be a systematic code.
  • the turbo is a turbo coding method defined by the LTE (Long Term Evolution) system, which includes 2-way component codes and system bits, and the mother code rate is 1/3.
  • LTE Long Term Evolution
  • LDPC coding is determined by a low-density parity check matrix.
  • the information bit sequence is encoded through the parity check matrix to obtain the LDPC coded bit sequence.
  • Polar coding is a linear block code proposed based on the channel polarization theory. When carried out During polar encoding, a coded bit sequence of S bits can be output for every 1 bit entered, where S is a positive integer.
  • tail-biting convolution coding when tail-biting convolution coding is performed on the acquired information bit sequence, even if the first state and the tail state of the convolutional encoding codeword grid are the same, the decoding performance of tail-biting convolution coding can be improved. For example, it can but not It is limited to first storing the tail v-1 bits of the information bit sequence in the convolutionally encoded register, and then all the bits of the information bit sequence are sequentially shifted bit by bit into the register and encoded to obtain the first encoded bit sequence.
  • Step S110 may include but is not limited to step S1101.
  • Step S1101 For each second bit in the acquired information bit sequence, perform convolutional encoding on the second bit to obtain a first coded bit sequence of target length.
  • Step S120 Repeat expansion of the first coded bit sequence to obtain a second coded bit sequence.
  • repeatedly extending the first coded bit sequence to obtain the second coded bit sequence includes:
  • first bit in the first coded bit sequence For each first bit in the first coded bit sequence, another first bit is repeatedly generated until the preset target number is reached, obtaining a bit sequence including multiple first bits, and second coded bits are generated in sequence according to each bit sequence. sequence; or,
  • a second coded bit sequence is obtained.
  • the obtained second coded bit sequence can Meets the coding requirements. For example, when error correction coding is performed on the k-th bit in the information bit sequence, the first coded bit sequence ⁇ c0, c1, c2,..., cn-1 ⁇ with a length of n bits can be obtained
  • the first coded bit sequence is repeatedly extended preset q times to obtain a second coded bit sequence with a length of n ⁇ q bits; specifically, each first bit in the first coded bit sequence is repeatedly extended.
  • repeated encoding can be achieved without consuming too much energy. That is to say, repeated expansion is performed in the above manner without the need for traditional convolution. Sub-block interleaving, bit collection, bit selection and other operations are still performed during encoding, but the purpose of repeated encoding can be achieved by more simply performing bit expansion or bit sequence expansion.
  • the first encoded bit sequence ⁇ c0, c1 Each bit of c2,...,cn-1 ⁇ is repeated and expanded q times separately, and the second coded bit sequence with a length of n ⁇ q bits is obtained as ⁇ [c0, c0,...,c0], [c1 , c1, ..., c1], ..., [cn-1, cn-1, ..., cn-1] ⁇ , or, for the first coded bit sequence ⁇ c0, c1, c2, ...
  • cn-1 ⁇ is expanded q times, and the second coded bit sequence with a length of n ⁇ q bits is obtained as ⁇ [c0, c1, c2,..., cn-1], [c0, c1, c2 ,...,cn-1],...,[c0,c1,c2,...,cn-1] ⁇ .
  • the target length is determined by at least one of the following:
  • the target length n includes at least one of the following: 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12.
  • the constraint length v of the convolutional encoding includes at least one of the following: 7, 8, 9, 10, 11
  • the number of target impedance networks includes at least one of the following: 2, 4, 8, 16, and 32.
  • Figure 6 shows a data processing method based on convolutional coding in IoT communication according to this embodiment.
  • 7 shows a schematic diagram of another data processing method based on convolutional coding in IoT communication according to this embodiment.
  • the k-th bit in the information bit sequence 410 enters the convolutional encoding 420, and n bits are output.
  • the output n bits constitute the encoded bit sequence 430, such as ⁇ c0, c1, c2, ..., cn- 1 ⁇ , and then enter the repeated expansion operation 440 to obtain the second coded bit sequence 450, such as ⁇ [c0, c0, ..., c0], [c1, c1, ..., c1], ..., [cn -1, cn-1, ..., cn-1] ⁇ .
  • the corresponding number of iteration expansions q ie, the preset target number
  • the corresponding number of iteration expansions q is equal to 6.
  • the advantage of using this method to perform repeated expansion operations is that the sending end can directly and repeatedly send the coded bits output by the convolutional encoding, which is very simple and efficient, and the hardware implementation can be extremely simple; and, at the receiving end, every time a continuous
  • the soft information data corresponding to the first bit in the first coded bit sequence can be calculated when q pieces of data information are required. There is no need to cache, the hardware complexity is low, and the implementation is simpler.
  • the k-th bit in the information bit sequence 510 enters the convolutional encoding 520, and n bits are output.
  • the output n bits constitute the encoded bit sequence 530, such as ⁇ c0, c1, c2, ..., cn- 1 ⁇ , and then enter the repeated expansion operation 540 to obtain the second encoded bit sequence 550, such as ⁇ [c0, c1, c2, ..., cn-1], [c0, c1, c2, ..., cn-1 ],...,[c0,c1,c2,...,cn-1] ⁇ .
  • the advantage of using this method to perform repeated operations is that the sending end continuously sends the coded bit sequence.
  • the corresponding number of iteration expansions q (ie, the preset target number) in the iteration expansion operation 540 is equal to 6.
  • the number n of the component codes of the convolutional coding 410 in Figure 6 or the convolutional coding 510 in Figure 7 can be determined based on q. specific value.
  • the operations of the method shown in Figure 6 or Figure 7 can be performed by the data encoding processing module 410 described in Figure 3 .
  • the IoT device (or UE) can execute a set of codes to control the functional elements of the IoT device (or UE) to perform corresponding data processing functions.
  • the preset target number of times is determined by at least one of the following:
  • the preset target times may include, but are not limited to, at least one of the following: 4, 5, 6, 7, 8, 12, 16, 24, 32, 48, 64.
  • the generated second coded bit sequence can be repeatedly sent in the IoT device (or UE), which can enhance the robustness of the receiving end in receiving data. Selecting the preset target number from 2 or more integers can increase the degree of freedom in scheduling IoT devices (or UEs). For example, if the wireless resources in the current scenario are tight, a smaller preset target number can be used. ; When the scene interference is large, a larger preset target number can be used to improve the reliability and flexibility of data transmission.
  • the target length n is equal to the number of component codes of convolutional encoding.
  • Figure 8 shows a schematic diagram of a data processing method using convolutional encoding in IoT communication.
  • the constraint length v of convolutional coding is equal to 7
  • the number of corresponding shift registers is equal to the constraint length minus 1
  • Figure 8 includes six shift registers 610.
  • the constraint length v of the convolutional encoding may also be, but is not limited to, equal to other values, such as 8, 9, 10, or 11.
  • the polynomial is obtained by encoding. For example, refer to Table 1 below, which is an example table of generator polynomials for all bits in the first encoded bit sequence corresponding to the constraint length of 7 for convolutional coding.
  • the generation of c0 is obtained by the generator polynomial G0, using 8-step
  • Table 1 is an example table of generator polynomials for all bits in the first encoded bit sequence with a constraint length of 7 corresponding to convolutional coding.
  • the output coded bit sequence includes 12 bits, that is, the number of component codes of the convolutional coding is equal to 12.
  • Table 2 the corresponding convolutional An example table of generator polynomials for all bits in the first coded bit sequence with a coded constraint length of 9.
  • Table 2 is an example table of generator polynomials for all bits in the first encoded bit sequence with a constraint length of 9 corresponding to convolutional coding.
  • the corresponding generator polynomials are G0 and G1 in Table 1, and the output coded bit sequence is ⁇ c0, c1 ⁇ ;
  • the corresponding generator polynomial is G0 ⁇ G5 in Table 1, and the output encoded bit sequence is ⁇ c0, c1, c2, c3, c4, c5 ⁇ .
  • the lower the code rate the more conducive to enhancing the signal coverage of IoT devices; and
  • the shorter the target length that is, the higher the code rate
  • the fewer component codes of convolutional encoding the lower the complexity of convolutional encoding and decoding, and the corresponding simpler IoT device implementation.
  • the corresponding generator polynomials include at least 2 generator polynomials in Table 1, that is, at least 2 of the following: 133, 171, 165, 117 ,135,157,123,173.
  • the constraint length of the corresponding convolutional encoding is 9
  • the corresponding generator polynomials include at least 2 generator polynomials in Table 2, that is, at least 2 of the following: 561, 753, 715, 517, 675, 513, 657, 745, 473.
  • the corresponding generator polynomials are G0 to G5 in Table 1, that is, the generator polynomials G0 to G5 They are: 133, 171, 165, 117, 135, and 157, respectively, and the corresponding output coded bit sequences are ⁇ c0, c1, c2, c3, c4, c5 ⁇ .
  • the corresponding generator polynomials are G0 ⁇ G5 in Table 2, that is, the generator polynomials G0 ⁇ G5 are respectively are: 561, 753, 715, 517, 675, and 513, and the corresponding output coded bit sequences are ⁇ c0, c1, c2, c3, c4, c5 ⁇ .
  • the corresponding coding rate is 1/6. At this time, the coding gain of convolutional coding is the largest.
  • the transmission code rate that is, the length of the information bit sequence and the length of the second coded bit sequence
  • the ratio is less than 1/6
  • it is implemented by repeating the first coded bit sequence.
  • convolutional coding that uses a larger number of component codes (such as greater than 6)
  • using convolutional coding with a number of component codes of 6 to repeatedly achieve a lower transmission code rate (less than 1/6) can reduce the decoding complexity and does not require Loss of decoding performance.
  • the constraint length of the convolutional coding determines the number of states of the codeword grid.
  • the number of codeword grid states of the convolutional coding is equal to 2 raised to the power of v-1, where v is the constraint of the convolutional coding. length.
  • v the constraint of the convolutional coding. length.
  • the constraint length of the convolutional encoding may also include at least one of the following: 8, 10, or 11.
  • Step S130 Send the second encoded bit sequence to the receiving end.
  • a first coded bit sequence is obtained by performing error correction coding on the obtained information bit sequence, and then a second coded bit sequence is obtained by repeatedly extending the obtained first coded bit sequence, and the second coded bit sequence is Sent to the receiving end as a tag device, since each bit in the first coded bit sequence of the target length or the entire first coded bit sequence is repeatedly expanded according to the preset target number of times, the required third code can be obtained.
  • the second coded bit sequence allows the receiving end to simply and conveniently receive the second coded bit sequence and process it.
  • the overall processing process is simple and convenient to implement and has low hardware requirements. In other words, it can ensure that the tag device achieves extremely high performance. Simplification and reliability of transmitted data, and can reduce energy consumption, thus filling the technical gaps in related methods.
  • Step S130 may include but is not limited to steps S1301 to S1302.
  • Step S1301 Determine the target impedance network according to the second encoded bit sequence
  • Step S1302 Send the second coded bit sequence to the receiving end through the target impedance network.
  • the relevant target impedance network is determined through the second coded bit sequence, so that the second coded bit sequence is sent to the receiving end based on the target impedance network.
  • the capacitance parameters of the impedance network the user can achieve a variety of circuit tuning frequencies, so that The frequency of the transmitted signal changes as the capacitance value of the circuit changes, thereby achieving signal modulation such as frequency shift keying. Therefore, sending a second coded bit sequence to the receiving end through a target impedance network that meets the requirements can achieve better signal transmission. Effect.
  • the number of target impedance networks is determined by at least one of the following:
  • FIG 10 shows a schematic diagram of data transmission using the backscattering principle in IoT communication.
  • the IoT device 740 receives the carrier signal 720 sent from the base station 710, and can perform energy collection or signal data reception by sending the electromagnetic wave signal 730 to the base station 710.
  • the IoT device 740 includes: an impedance network 7402, an impedance network selection control module 7404, a data encoding processing module 7406, and a transmitting antenna 7408.
  • the impedance network 7402, the impedance network selection control module 7404 and the transmitting antenna 7408 in Figure 10 can constitute the transmitter 420 in Figure 4, where the IoT device can also be a UE, and the carrier signal can also be an excitation source signal.
  • the impedance network selection control module 7404 selects the impedance network based on the second encoding bit sequence output by the data encoding processing module 7406.
  • the impedance network 7402 includes t types of impedance networks, and the impedance network is selected according to the second encoding bit sequence; among the t types of impedance networks, The parameters of any two impedance networks are different.
  • the parameters of the impedance network may include at least one of the following: resistance value, capacitance value, and inductance value.
  • two impedance networks are included.
  • the parameters of the two impedance networks are different and are controlled by 1 bit in the second encoded bit sequence. For example, when the bit is '0', impedance network 0 is selected. , selects impedance network 1 when it is '1'.
  • 4 types of impedance networks are included. The parameters of the 4 types of impedance networks are different and are controlled by 2 consecutive bits in the second encoded bit sequence. For example, when the 2 bits are '00', the impedance network is selected.
  • select impedance network 1 when it is '01', select impedance network 1, when it is '10', select impedance network 2, when it is '11', select impedance network 3; and so on, more bits can be used for control, which will not be discussed here. Repeat.
  • the number of impedance networks in impedance network 7402 is equal to 2 raised to the power a, where a is a positive integer. That is, in the impedance network selection control module 7404, the impedance network is selected according to the state of the a bit in the second encoded bit sequence. Where a is equal to at least one of the following: 1, 2, 3, 4, or 5. a or the number t of impedance networks is determined by at least one of the following parameters: the length of the information bit sequence, the target length n, the preset target number q, and high-level control signaling. Since there are multiple impedance network options, the interference between signals sent by each IoT device can be reduced.
  • IoT devices can choose different Impedance networks are used to send data. If more impedance networks are available, relevant technicians can reduce the interference between the signals sent by different IoT devices through certain control selections.
  • the target length of the convolutional coding output performed by the convolutional coding 420 in Figure 6 or the convolutional coding 520 in Figure 7 is n, that is, the number of component codes of the convolutional coding is n, and the specific length of n is The value is configured by higher layer signaling.
  • the specific value of the preset target number q of performing the repeat expansion operation 440 in FIG. 6 or the repeat expansion operation 540 in FIG. 7 is determined based on the component code number n.
  • the target length n of the convolutional coding output performed by the convolutional coding 420 in FIG. 6 or the convolutional coding 520 in FIG. 7 is determined by the length of the information bit sequence. Specifically, for the number n1 of component codes corresponding to the length of the information bit sequence K1, and for the number n2 of component codes corresponding to the length of the information bit sequence K2, at least one of the following conditions must be met: 1. If K1 is greater than K2, then n1 is not less than n2 ;2. If K1 is greater than K2, then n1 is not greater than n2.
  • the preset target number q of repeat expansion performed by the repeat expansion operation 440 in FIG. 6 or the repeat expansion operation 540 in FIG. 7 is determined by the length K of the information bit sequence.
  • the second coded bit sequence obtained in Figure 6 or Figure 7 is combined with the impedance network of Figure 10 to send the second coded bit sequence, wherein the number of impedance networks is determined based on at least one of the following parameters: target length, number of component codes of convolutional coding n, the preset target number q and the length K of the information bit sequence.
  • the number of impedance networks may also be configured through high-level configuration signaling.
  • the network parameters of any two target impedance networks are different, which can ensure that the characteristics of different target impedance networks are different from each other. Therefore, in specific application scenarios, there may be It is possible to match and combine various target impedance networks, so that it can be more adapted to different and complex scenarios.
  • the encoding complexity and decoding complexity of convolutional coding are directly related to the number of component codes n (that is, the target length n).
  • the specific value of n can be determined based on the preset target number q.
  • each UE can support different preset target times q.
  • the preset target configured by the system or configured by high-level signaling
  • the number of times q then the number of component codes n can be based on the preset target number q, the length of the information bit sequence K and the transmitter
  • the total number of bits sent Y is determined.
  • the function function(x) represents the smallest integer greater than or equal to the real number x, the integer obtained by rounding the real number x, or the largest integer less than or equal to the real number x.
  • the total number of bits Y may be the length of the second encoded bit sequence.
  • the length K of the information bit sequence is greater than 1 and less than or equal to 512
  • the length K of the information bit sequence is equal to all integers with an interval of 8 between 24 and 512.
  • the information bit sequence length K is equal to at least one of the following: 24, 64, 96, 128, 192, 256, 288, 384, 512.
  • the number of component codes n can be determined by the length K of the information bit sequence.
  • the advantage of this setting is that when the total number of transmitted bits Y is fixed, a more reasonable value of the number n of component codes can be used to reduce the energy consumption of encoding or decoding. . It can be understood that when the number n of component codes determined as above is greater than the number of generator polynomials of convolutional coding, the number of component codes n can be equal to the number of generator polynomials of convolutional coding, that is, both the number of generator polynomials of convolutional coding and the number of generator polynomials can be uniformly predefined.
  • the specific value of the number n of component codes is determined according to the preset target number q.
  • the preset target times include 4 types: 4, 8, 16, and 24.
  • the preset target times are configured by high-level signaling. After the IoT device obtains the preset target times q, it determines the number of component codes according to the corresponding Table 3 below. n.
  • Table 3 A corresponding mapping relationship between the number of component codes n and the preset target number q
  • the combination of the preset target number q and the number of component codes n may be directly indicated by signaling, for example, by 2-bit signaling.
  • signaling for example, by 2-bit signaling.
  • the function function(x) represents the smallest integer greater than or equal to the real number x, the integer obtained by rounding the real number x, or the largest integer less than or equal to the real number x.
  • the information bit sequence length K and the total number of bits sent Y can be obtained by configuration of the external system or high-level signaling configuration.
  • the specific value of the preset target number q is determined according to the number of component codes n.
  • the number of component codes includes 4 types: 4, 7, 9, and 11.
  • the number of component codes is configured and selected by high-level signaling.
  • the IoT device obtains the specific n value, it determines the preset target number q according to the corresponding Table 4 below.
  • Table 4 Another mapping relationship table between the number of component codes n and the number of repetition extensions q
  • the combination of the number of component codes n and the preset target number q can be directly indicated through signaling, for example, using 2-bit signaling.
  • the signaling may be RRC signaling, MAC signaling, DCI signaling, etc.
  • the IoT device 740 sends a signal 730 to the base station 710, in which a long An information bit sequence with a length of K bits.
  • the information bit sequence length can also be called the transport block size.
  • the number of component codes of the convolutional encoding in the data encoding processing module is 7, the preset target number is 6, and the total number of bits that need to be transmitted is the second encoded bit sequence of Y.
  • the impedance network selection control module 7404 controls and selects the corresponding impedance network according to the second coded bit sequence, and transmits the signal 730 to the base station 710 through backscattering.
  • the abscissa in Figure 11 is the additive white Gaussian NoiseAWGN signal-to-noise ratio SNR, and the ordinate is the block error rate ((Block Error Rate, BLER)). The closer the BLER curve is to the left, the better the performance.
  • BLER Block Error Rate
  • the five BLER curves shown in 11 correspond to the preset target times (Rep) of 5, 6, 8, 12 and 16 times respectively. It can be found that when the preset target times are 6 times, the second code Bit sequences can achieve better performance.
  • Figure 12 is a flow chart of a data processing method provided by another embodiment of the present application.
  • the data processing method may include but is not limited to step S210 to step S220.
  • Step S210 Receive the second coded bit sequence sent by the sending end
  • Step S220 Process the second encoded bit sequence.
  • the second coded bit sequence is obtained by the transmitting end performing the first operation or the second operation on the first coded bit sequence of the target length
  • the first coded bit sequence is obtained by the transmitting end performing error correction coding on the obtained information bit sequence.
  • the first operation includes, for each first bit in the first encoded bit sequence, repeatedly generating another first bit until reaching a preset target number of times, obtaining a bit sequence including multiple first bits, and sequentially generating the bit sequence according to each bit sequence. generating a second encoded bit sequence;
  • the second operation includes repeatedly generating a first coded bit sequence of another target length until reaching a preset target number of times, obtaining multiple first coded bit sequences, and sequentially generating second coded bit sequences based on the multiple first coded bit sequences.
  • the execution subject of the data processing method in this embodiment may be, but is not limited to, the receiving end 200 in the embodiment shown in FIG. 1, or the base station 210 in the embodiment shown in FIG. 2, or a person in the art.
  • Technical personnel can select and set corresponding execution entities according to actual application scenarios, and this embodiment does not impose limitations.
  • the following relevant embodiments are described with the receiving end as the execution subject of the data processing method, but this should not be understood as a limitation on the embodiments of the present application.
  • the sending end since the sending end obtains the first coded bit sequence by performing error correction coding on the obtained information bit sequence, and then obtains the second coded bit sequence by repeatedly extending the obtained first coded bit sequence, and adds the second coded bit sequence to the second coded bit sequence.
  • the encoded bit sequence is sent to the receiving end as the tag device. That is to say, the transmitting end only needs to repeatedly expand each bit of the first encoded bit sequence of the target length or the entire first encoded bit sequence according to the preset target number of times. , the required second coded bit sequence can be obtained, thereby enabling the receiving end to simply and conveniently receive the second coded bit sequence and process it.
  • the overall processing process is simple and convenient to implement and has low hardware requirements, that is It is said that it can ensure the simplicity of tag equipment and the reliability of data transmission, and can reduce energy consumption, thus filling the technical gaps in related methods.
  • Step S220 may include but is not limited to steps S221 to S222.
  • Step S221 Perform deduplication processing on the second coded bit sequence to obtain the first coded bit sequence
  • Step S222 Perform convolutional decoding on the first encoded bit sequence to obtain an information bit sequence.
  • the second coded bit sequence can be restored to the initial information bit sequence, so the source and content of the information bit sequence can be learned, In order to understand the performance of the second coded bit sequence and the information bit sequence more accurately and reliably.
  • Step S221 may include but is not limited to step S2210.
  • Step S2210 According to the predetermined target length and the preset target number, perform de-repetition processing on the second coded bit sequence to obtain the first coded bit sequence.
  • the second coded bit sequence is deduplicated to obtain the first coded bit sequence based on the target length and the preset target number of times. That is to say, through the above reduction
  • the operation may further obtain an intermediated first coded bit sequence.
  • Step S221 may include but is not limited to at least one of the following:
  • the second encoded bit sequence includes multiple bit sequences and the bit sequence includes multiple first bits
  • the bit sequence includes multiple first bits
  • the second coded bit sequence includes multiple first coded bit sequences
  • the second coded bit sequence is split and combined to obtain the first coded bit sequence.
  • one way is to obtain the first coded bit sequence by extracting and merging each bit sequence in the second coded bit sequence, which can better correlate each bit sequence in the second coded bit sequence, to obtain
  • the first coded bit sequence can well reflect its characteristics; another way is to split and merge the second coded bit sequence to obtain a first coded bit sequence, which can better correlate each element in the second coded bit sequence.
  • the first coded bit sequence, the obtained first coded bit sequence can well reflect its characteristics.
  • Step S222 may include but is not limited to step S2220.
  • Step S2220 According to the predetermined target length, the constraint length of the error correction coding, and the length of the information bit sequence, perform convolutional decoding on the first coded bit sequence to obtain the information bit sequence.
  • the length of the first coded bit sequence, the constrained length of the convolutional coding, and the length of the information bit sequence are predetermined to facilitate the calculation based on the length of the first coded bit sequence, the constrained length of the convolutional coding, and the information bit sequence. length, perform convolutional decoding on the first coded bit sequence to obtain the information bit sequence, that is to say, the initialized information bit sequence can be further obtained through the above restoration operation.
  • Step S210 may include but is not limited to step S211.
  • Step S211 Receive the second coded bit sequence sent by the transmitting end according to the predetermined number of target impedance networks.
  • the number of related target impedance networks is predetermined so that the second coded bit sequence sent by the transmitting end is received based on the number of target impedance networks. That is to say, the above-mentioned restoration operation can stably and reliably Receive the second coded bit sequence sent by the transmitting end. For example, when the number of target impedance networks is multiple and the network parameters of any two target impedance networks are different, in this case, one can be selected from multiple target impedance networks. required for a target impedance network.
  • the method of predetermining each parameter in the above embodiments is not limited. For example, it can be determined based on external operating system control transmission, or it can be determined based on high-level signaling control, or it can be determined based on actual application scenarios. There are no restrictions on setting predetermined methods, etc.
  • the target length is determined by at least one of the following:
  • the preset target number of times is determined by at least one of the following:
  • the number of target impedance networks is determined by at least one of the following:
  • error correction coding includes at least one of the following:
  • the target length includes at least one of the following: 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12.
  • the preset target times include at least one of the following: 4, 5, 6, 7, 8, 12, 16, 24, 32, 48, 64.
  • the constraint length of the convolutional coding includes at least one of the following: 7, 8, 9, 10, and 11.
  • the number of target impedance networks includes at least one of the following: 2, 4, 8, 16, and 32.
  • the target length, preset target times, number of target impedance networks, and types of error correction codes have been described in detail in the above embodiments, the only difference between the above embodiments and this embodiment is that The execution entities are different, that is, one is the sending end and the other is the receiving end. Therefore, the relevant implementation methods in this embodiment correspond to those in the above embodiment. To avoid redundancy, for the target length, preset target times, and target impedance The number of networks and the type of error correction coding will not be described again.
  • one embodiment of the present application also discloses an electronic device 900, including: at least one Processor 910; at least one memory 920, used to store at least one program; when at least one program is executed by at least one processor 910, the data processing method as in any previous embodiment is implemented.
  • an embodiment of the present application also discloses a computer-readable storage medium in which computer-executable instructions are stored, and the computer-executable instructions are used to execute the data processing method as in any of the previous embodiments.
  • an embodiment of the present application also discloses a computer program product, which includes a computer program or computer instructions.
  • the computer program or computer instructions are stored in a computer-readable storage medium.
  • the processor of the computer device reads the computer program from the computer-readable storage medium.
  • the computer program or computer instructions are obtained, and the processor executes the computer program or computer instructions, so that the computer device performs the data processing method as in any of the previous embodiments.
  • Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, Digital Versatile Disk (DVD) or other optical disk storage, magnetic cassettes, tapes, disk storage or other magnetic storage devices, or may Any other medium used to store the desired information and that can be accessed by a computer.
  • communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media .

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Abstract

本申请公开了一种数据处理方法及电子设备、存储介质、程序产品。其中，一种数据处理方法，包括：对获取到的信息比特序列进行纠错编码得到目标长度的第一编码比特序列；对第一编码比特序列进行重复扩展得到第二编码比特序列；向接收端发送第二编码比特序列。

Description

数据处理方法、电子设备、存储介质及程序产品
相关申请的交叉引用
本申请基于申请号为202210545672.5、申请日为2022年05月19日的中国专利申请提出，并要求该中国专利申请的优先权，该中国专利申请的全部内容在此引入本申请作为参考。
技术领域
本申请涉及通信技术领域，尤其是一种数据处理方法、电子设备、计算机存储介质及计算机程序产品。
背景技术
在数字通信系统中，发送端对原始信息比特序列进行信道编码后获取编码比特序列，然后对编码比特序列进行映射成星座调制符号，最后发送所获得的星座调制符号。在信道中，由于多径、移动、噪声、干扰等因素都会使数据传输失真，例如信道编码可以为前向纠错(Forward Error Correction，简称为FEC)编码。目前，传统的编码方案为了减少突发干扰带来的性能损失，添加了子块交织、比特收集和比特选择等模块，虽然可以提高对抗信道的突变衰落和干扰，但是增加了硬件复杂程度，无法确保无源物联网的标签设备实现极简以及传输的可靠性，同时伴随更多能量消耗。
发明内容
本申请实施例提供了一种数据处理方法、电子设备、计算机存储介质及计算机程序产品，能够确保标签设备实现极简以及传输数据的可靠性，降低能量消耗。
第一方面，本申请实施例提供了一种数据处理方法，所述数据处理方法包括：
对获取到的信息比特序列进行纠错编码得到目标长度的第一编码比特序列；
对所述第一编码比特序列进行重复扩展得到第二编码比特序列；
向接收端发送所述第二编码比特序列；
其中，所述对所述第一编码比特序列进行重复扩展得到第二编码比特序列，包括；
对于所述第一编码比特序列中的每个第一比特，重复生成另一个所述第一比特直至达到预设目标次数，得到包括多个所述第一比特的比特序列，根据各个所述比特序列按序生成所述第二编码比特序列；或者，
重复生成另一个所述目标长度的第一编码比特序列直至达到预设目标次数，得到多个所述第一编码比特序列，根据多个所述第一编码比特序列按序生成所述第二编码比特序列。
第二方面，本申请实施例还提供了一种数据处理方法，所述数据处理方法包括：
接收由发送端发送的第二编码比特序列；
对所述第二编码比特序列进行处理；
其中，所述第二编码比特序列由所述发送端对目标长度的第一编码比特序列进行第一操作或第二操作而得到，所述第一编码比特序列由所述发送端对获取到的信息比特序列进行纠错编码得到；
所述第一操作，包括对于所述第一编码比特序列中的每个第一比特，重复生成另一个所述第一比特直至达到预设目标次数，得到包括多个所述第一比特的比特序列，根据各个所述比特序列按序生成所述第二编码比特序列；
所述第二操作，包括重复生成另一个所述目标长度的第一编码比特序列直至达到预设目标次数，得到多个所述第一编码比特序列，根据多个所述第一编码比特序列按序生成所述第二编码比特序列。
第三方面，本申请实施例还提供了一种电子设备，包括：至少一个处理器；至少一个存储器，用于存储至少一个程序；当至少一个所述程序被至少一个所述处理器执行时实现如前面所述的数据处理方法。
第四方面，本申请实施例还提供了一种计算机可读存储介质，其中存储有处理器可执行的程序，所述处理器可执行的程序被处理器执行时用于实现如前面所述的数据处理方法。
第五方面，本申请实施例还提供了一种计算机程序产品，计算机程序或所述计算机指令存储在计算机可读存储介质中，计算机设备的处理器从所述计算机可读存储介质读取所述计算机程序或所述计算机指令，所述处理器执行所述计算机程序或所述计算机指令，使得所述计算机设备执行如前面所述的数据处理方法。
本申请实施例中，通过对获取到的信息比特序列进行纠错编码得到第一编码比特序列，进而通过对得到的第一编码比特序列进行重复扩展得到第二编码比特序列，并将第二编码比特序列发送至作为标签设备的接收端，由于只需对目标长度的第一编码比特序列中的每个比特或者整体的第一编码比特序列按预设目标次数进行重复扩展，即可得到所需求的第二编码比特序列，因此使得接收端能够简单方便地接收该第二编码比特序列并对其进行处理，整体处理过程实现起来简单方便且对于硬件要求不高，也就是说，能够确保标签设备实现极简以及传输数据的可靠性，并且可以降低能量消耗，从而可以弥补相关方法中的技术空白。
附图说明
图1是本申请一个实施例提供的用于执行数据处理方法的实施环境的示意图；
图2是本申请另一个实施例提供的用于执行数据处理方法的实施环境的示意图；
图3是本申请一个实施例提供的用于执行数据处理方法的实施环境中IoT设备使用前向纠错编码的示意图；
图4是本申请一个实施例提供的数据处理方法的流程图；
图5是本申请一个实施例提供的数据处理方法中，对获取到的信息比特序列进行纠错编码得到目标长度的第一编码比特序列的流程图；
图6是本申请一个实施例提供的基于IoT通信的数据处理方法的示意图；
图7是本申请另一个实施例提供的基于IoT通信的数据处理方法的示意图；
图8是本申请另一个实施例提供的基于IoT通信的数据处理方法的示意图；
图9是本申请一个实施例提供的数据处理方法中，向接收端发送第二编码比特序列的流程图；
图10是本申请一个实施例提供的基于IoT通信采用反向散射原理进行数据发送的示意图；
图11是本申请一个实施例提供的对应不同预设目标次数下的第二编码比特序列的性能 对比示意图；
图12是本申请另一个实施例提供的数据处理方法的流程图；
图13是本申请一个实施例提供的数据处理方法中，对第二编码比特序列进行处理的流程图；
图14是本申请一个实施例提供的数据处理方法中，对第二编码比特序列进行解重复处理得到第一编码比特序列的流程图；
图15是本申请一个实施例提供的数据处理方法中，对第一编码比特序列进行卷积解码得到信息比特序列的流程图；
图16是本申请一个实施例提供的电子设备的示意图。
具体实施方式
为了使本申请的目的、技术方法及优点更加清楚明白，以下结合附图及实施例，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
需要说明的是，虽然在流程图中示出了逻辑顺序，但是在某些情况下，可以以不同于流程图中的顺序执行所示出或描述的步骤。说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。
本申请提供了一种数据处理方法、电子设备、计算机存储介质及计算机程序产品。其中一个实施例的数据处理方法，包括：对获取到的信息比特序列进行纠错编码得到目标长度的第一编码比特序列；对第一编码比特序列进行重复扩展得到第二编码比特序列；向接收端发送第二编码比特序列；其中，对第一编码比特序列进行重复扩展得到第二编码比特序列，包括；对于第一编码比特序列中的每个第一比特，重复生成另一个第一比特直至达到预设目标次数，得到包括多个第一比特的比特序列，根据各个比特序列按序生成第二编码比特序列；或者，重复生成另一个目标长度的第一编码比特序列直至达到预设目标次数，得到多个第一编码比特序列，根据多个第一编码比特序列按序生成第二编码比特序列。在该实施例中，通过对获取到的信息比特序列进行纠错编码得到第一编码比特序列，进而通过对得到的第一编码比特序列进行重复扩展得到第二编码比特序列，并将第二编码比特序列发送至作为标签设备的接收端，由于只需对目标长度的第一编码比特序列中的每个比特或者整体的第一编码比特序列按预设目标次数进行重复扩展，即可得到所需求的第二编码比特序列，因此使得接收端能够简单方便地接收该第二编码比特序列并对其进行处理，整体处理过程实现起来简单方便且对于硬件要求不高，也就是说，能够确保标签设备实现极简以及传输数据的可靠性，并且可以降低能量消耗，从而可以弥补相关方法中的技术空白。
下面结合附图，对本申请实施例作进一步阐述。
如图1所示，图1是本申请一个实施例提供的用于执行数据处理方法的实施环境的示意图。
在图1的示例中，该实施环境包括但不限于发送端100和接收端200，其中，接收端200和发送端100之间可以进行无线信号的发送、接收及相关交互等。
在一实施例中，接收端200和发送端100的相对位置、数量等可以在具体应用场景中相应设置，若存在多个接收端200且不同的接收端200按照上述方式进行设置，从而可以在不 同空间位置接收发送端100所发送的无线信号，值得注意的是，此处的空间位置可以为不同的地域条件。
在一实施方式中，发送端100和接收端200可以但不限于包括以下设备之一：基站(Base Station，BS)、接入点(Access Point，AP)、节点B(node B)、g节点B(g node B，generalized node B)、无线电网络控制器(Radio Network Controller，RNC)、演进型Node B(Evolved Node B，eNB)、基站控制器(Base Station Controller，BSC)、基站收发台(Base Transceiver Station，BTS)、收发机功能体(Transceiver Function，TF)、无线电路由器、无线电收发机、基本服务单元(Basic Service Set，BSS)、扩展服务单元(Extended Service Set，ESS)或无线电基站(Radio Base Station，RBS)，本实施例对此并不作具体限定。
在一实施方式中，发送端100和接收端200可以称为接入终端、用户设备(User Equipment，UE)、用户单元、用户站、移动站、移动台、远方站、远程终端、移动设备、用户终端、无线通信设备、用户代理或用户装置。例如，发送端100可以是蜂窝电话、无绳电话、会话启动协议(Session Initiation Protocol，SIP)电话、无线本地环路(Wireless Local Loop，WLL)站、个人数字处理(Personal Digital Assistant，PDA)、有无线通信功能的手持设备、计算设备或连接到无线调制解调器的其它处理设备、车载设备、可穿戴设备、5G网络或者未来5G以上网络中的终端设备等，本实施例对此并不作具体限定。
在一实施方式中，本实施例的用于执行数据处理方法的实施环境，可以但不限于为一些可以自动化适配无线通信设备的网络，例如物联网(Internet of Things，IoT)。发送端100和接收端200可以为通过IoT进行通信的设备(例如，为机器类型通信设备)，可以但不限于包括各类型传感器、水表、电表、商品标签或物品数据标签等，具体地：
在一些场景中，IoT中设备的电池电量较少，这些设备可以具有非常低的吞吐量数据量的应用，但是要求消耗非常少的能量，以便于在非常长时间内进行通信而无需更换电池，或者，IoT中的设备不需要电池存储能量，而是直接通过反向散射向接收端200(例如基站)发射信号，在标签(Tap)收集能量并反向散射信号至接收端200的情况下，此时该设备可以为无源的IoT设备，该设备可能可以在许可频谱中使用，例如向移动通信的基站(例如，node B或者G node B)发送信号，或者，接入已有的蜂窝移动网络；
在一些场景中，该IoT设备设备也可以采用非授权频谱进行通信；
在一些场景中，该IoT设备采用阻抗网络进行发送数据，依据阻抗网络参数的不同以指示不同的数据信号；
在一些场景中，该IoT设备可以对需要发送的数据进行前向纠错编码，以提高数据传输的可靠性，例如通过对需要发送的原始数据进行前向纠错编码，可以增加覆盖范围或者降低传输能量。其中，前向纠错编码可以但不限于为汉明编码、极化编码、低密度奇偶校验编码、里德所罗门编码、卷积编码或者turbo编码等。
如图2所示，图2是本申请另一个实施例提供的用于执行数据处理方法的实施环境的示意图。
在图2中，该实施环境包括基站210(即接收端200)、各类型的UE(包括图2中的120、130和140，即发送端100)以及核心网300。其中，各类型的UE可以是IoT设备，用于各种信息采集然后将数据信息进行前向纠错编码后将数据发送给基站210；基站210与各个UE进 行通信，且与核心网300进行联通；核心网300可以提供接入授权、用户认证、互联网协议连接性、跟踪以及其它接入、路由或移动性管理等功能。各类型的UE可以分散在整个实施环境中，并且每个UE可以是固定的或移动的，各类型的UE可以与各种类型的基站210和网络设备(包括宏eNB、小型小区eNB以及中继基站等)进行通信。
可以理解地是，用于IoT设备的应用的示例包括智能计量、库存监控、水位监控、温度监控、设备监控、医疗监控、野生动物监控、天气和地理事件监控、车队管理和跟踪、远程安全感知、物理访问控制以及基于交易的商业收费等，此处并未限制。
如图3所示，图3示出了实施环境中的IoT设备800使用前向纠错编码的示意图。其中，IoT设备800可以包括但不限于数据编码处理模块810和发射机820。并且，在IoT设备中还可以包括处理器、存储器等，其用于对数据进行处理操作，例如存储一些必要参数数据和信息比特序列，以及对输入的信息比特序列进行前向纠错编码处理、对编码后的数据按先后顺序进行发送等。IoT设备800中的每个组件可以彼此通信，发射机820可以包括单个天线或多个天线。
发送端100至少具有对信息比特序列进行纠错编码得到第一编码比特序列，以及对第一编码比特序列进行重复扩展得到第二编码比特序列，以及向接收端200发送第二编码比特序列等功能。
接收端200至少具有接收由发送端100发送的第二编码比特序列，并对第二编码比特序列进行处理等功能，其中，第二编码比特序列由发送端100对第一编码比特序列进行重复扩展得到，第一编码比特序列由发送端100对获取到的信息比特序列进行纠错编码得到。
在一实施例中，发送端100和接收端200所具有的上述功能，可以应用于不同的应用场景中，此处并未限制。
本领域技术人员可以理解的是，该实施环境可以应用于5G、6G通信网络系统以及后续演进的移动通信网络系统等，本实施例对此并不作具体限定。
本领域技术人员可以理解的是，图1、图2和图3中示出的实施环境并不构成对本申请实施例的限定，可以包括比图示更多或更少的部件，或者组合某些部件，或者不同的部件布置。
基于上述实施环境，下面提出本申请的数据处理方法的各个实施例。
如图4所示，图4是本申请一个实施例提供的数据处理方法的流程图，该数据处理方法可以包括但不限于步骤S110至步骤S130。
步骤S110：对获取到的信息比特序列进行纠错编码得到目标长度的第一编码比特序列。
在一实施例中，本实施例中的数据处理方法的执行主体可以但不限于为图1所示实施例中的发送端100，或者为图2所示实施例中的UE，或者为图3所示实施例中的IoT设备400；或者本领域的技术人员可以根据实际应用场景选择设置相应的执行主体，本实施例不做限制。为了更方便地描述本申请的应用场景及原理，以下各相关实施例中相应处以发送端作为数据处理方法的执行主体进行描述，但不应将其理解为对本申请实施例的限制。
本步骤中，通过对获取到的信息比特序列进行纠错编码以得到第一编码比特序列，以便于在后续步骤中对第一编码比特序列进行进一步地处理而得到新的编码比特序列。
在一实施例中，获取信息比特序列的方式可以为多种，本领域技术人员可以根据实际应用场景进行选择，此处不作具体限定。
在一实施例中，纠错编码包括如下至少之一：
低密度奇偶校验编码(Low Density Parity Check Code，LDPC)；
极化polar编码；
里德所罗门RS编码；
咬尾卷积编码(tail-biting convolutional code)；
turbo编码；
BCH编码。
其中，所述LDPC编码是由一个低密度的奇偶校验矩阵确定，通过奇偶校验矩阵对信息比特序列进行编码获得LDPC编码比特序列。一示例中，所述LDPC编码的奇偶校验矩阵可以由一个或者多个基础矩阵进行确定，所述基础矩阵维数可以为42行52列或者46行68列，基础矩阵中包括指示全零方阵的元素和指示单位阵循环移位的元素。
所述polar编码，即极化码，是基于信道极化理论提出的一种线性分组码。一示例中，polar编码由矩阵G的n阶克罗内克积进行定义，其中矩阵G是2行2列的矩阵；一示例中，所述G＝[1 0；1 1]。
所述RS编码，即Reed-solomon codes，可以称为里所码或里德所罗门码，该编码方法可以做到最小距离最大化的编码方法，所以RS编码纠正突发差错能力非常强。一示例中，一个码长为n1和信息长度为k1的RS码由生成多项式进行定义，RS编码输出的任意码字多项式都可以被生成多项式整除。一示例中，所述n1等于2的m次幂再减1，其中m等于以下之一：4、5、6、7、8、9、或10。
所述BCH编码是一种循环码，能纠正多个随机错误，由Bose、Chaudhur i及Hocquenghem各自独立发现的二元线性循环码，用他们名字首字母命名为BCH码。一示例中，BCH编码由一个生成多项式确定，所述生成多项式由多项本原多项式确定。
所述turbo编码是一种并行级联卷积码，即由两个或多个分量码并联，turbo编码输出可以是系统码。在一实施例中，所述turbo是LTE(Long Term Evolution)系统定义的turbo编码方法，其包括2路分量码和系统比特，母码码率为1/3。其中，LDPC编码由一个低密度的奇偶校验矩阵确定，通过奇偶校验矩阵对信息比特序列进行编码获得LDPC编码比特序列，polar编码是基于信道极化理论提出的一种线性分组码，当进行polar编码时，每进入1比特可以输出S比特的编码比特序列，其中S是正整数。
其中，当对获取到的信息比特序列进行咬尾卷积编码，即使得卷积编码码字格栅的首状态和尾状态相同，能够提高咬尾卷积编码的解码性能，例如，可以但不限于先将信息比特序列的尾部v-1比特依次存入卷积编码的寄存器中，然后信息比特序列的所有比特依次逐比特移位进入寄存器中并对其进行编码获得第一编码比特序列。
可以理解地是，纠错编码的具体方式还可以根据具体应用场景来进行选择设置，这在本实施例中并未限制。
如图5所示，本申请的一个实施例，对步骤S110进行进一步的说明，步骤S110可以包括但不限于步骤S1101。
步骤S1101：对于获取到的信息比特序列中的每个第二比特，对第二比特进行卷积编码得到目标长度的第一编码比特序列。
本步骤中，通过从获取到的信息比特序列中按顺序地依次选择一个比特进行卷积编码， 能够得到目标长度的第一编码比特序列，也就是说，通过这种方式能够对信息比特序列中的每一个比特分别进行卷积编码，从而分别得到各个比特相对应的目标长度的第一编码比特序列，以便于在后续步骤中对所需求的第一编码比特序列进行进一步地处理，例如，对信息比特序列中第k个比特进行卷积编码，可以获得目标长度为n比特的第一编码比特序列{c0、c1、c2、...、cn-1}，其中，k＝0、1、2…n-1。
步骤S120：对第一编码比特序列进行重复扩展，得到第二编码比特序列。
在一实施例中，对第一编码比特序列进行重复扩展得到第二编码比特序列，包括：
对于第一编码比特序列中的每个第一比特，重复生成另一个第一比特直至达到预设目标次数，得到包括多个第一比特的比特序列，根据各个比特序列按序生成第二编码比特序列；或者，
重复生成另一个目标长度的第一编码比特序列直至达到预设目标次数，得到多个第一编码比特序列，根据多个第一编码比特序列按序生成第二编码比特序列。
本步骤中，通过对第一编码比特序列进行重复扩展，也就是说，在原有的第一编码比特序列的基础上通过扩展自身而得到第二编码比特序列，所得到的第二编码比特序列能够符合编码需求，例如，在对信息比特序列中第k个比特进行纠错编码，可以获得长度为n比特的第一编码比特序列{c0、c1、c2、...、cn-1}的情况下，对第一编码比特序列进行重复预设的q次扩展获得长度为n×q比特的第二编码比特序列；具体地，通过对第一编码比特序列中的各个第一比特分别进行重复扩展，或者对第一编码比特序列整体进行重复扩展，就能够在不消耗过多能量的情况下达到重复编码的目的，也就是说，通过如上所述的方式进行重复扩展，不需要如传统卷积编码中一样进行子块交织、比特收集、比特选择等操作，而是通过更加简便地进行比特扩展或比特序列扩展就能够达到重复编码的目的，例如，对第一编码比特序列{c0、c1、c2、...、cn-1}的每一个比特分别单独重复扩展q次，获得长度为n×q比特的第二编码比特序列为{[c0、c0、...、c0]、[c1、c1、...、c1]、...、[cn-1、cn-1、...、cn-1]}，或者，对第一编码比特序列{c0、c1、c2、...、cn-1}的整体重扩展q次，获得长度为n×q比特的第二编码比特序列为{[c0、c1、c2、...、cn-1]、[c0、c1、c2、...、cn-1]、...、[c0、c1、c2、...、cn-1]}。
在一实施例中，目标长度由以下的至少一个确定：
预设目标次数；
预确定的目标阻抗网络的数目；
纠错编码的约束长度；
信息比特序列的长度；
高层配置信令。
在一实施方式中，目标长度n包括如下至少之一：2、3、4、5、6、7、8、9、10、11、12。
在一实施方式中，卷积编码的约束长度v包括如下至少之一：7、8、9、10、11
在一实施方式中，目标阻抗网络的数目包括如下至少之一：2、4、8、16、32。
以下给出具体示例以说明上述各实施例的原理及流程。
示例一
参照图6和图7，图6示出了本实施例在IoT通信中基于卷积编码的一种数据处理方法 的示意图，图7示出了本实施例在IoT通信中基于卷积编码的另一种数据处理方法的示意图。
如图6所示，信息比特序列410中的第k个比特进入卷积编码420，输出n比特，输出的n比特构成编码比特序列430，如{c0、c1、c2、...、cn-1}，然后进入重复扩展操作440，获得第二编码比特序列450，如{[c0、c0、...、c0]、[c1、c1、...、c1]、...、[cn-1、cn-1、...、cn-1]}。其中，在一实施例中，重复扩展操作440中对应的重复扩展次数q(也即预设目标次数)等于6。采用该方式进行重复扩展操作的好处在于，发送端可以直接连续重复地发送卷积编码输出的编码比特，非常简单和高效，硬件实现可以做到极简；并且，在接收端每接收到连续的q个数据信息时即可计算出第一编码比特序列中对应的第一比特的软信息数据，不需要进行缓存，硬件复杂度较低，实现起来更加简单。
如图7所示，信息比特序列510中的第k个比特进入卷积编码520，输出n比特，输出的n比特构成编码比特序列530，如{c0、c1、c2、...、cn-1}，然后进入重复扩展操作540，获得第二编码比特序列550，如{[c0、c1、c2、...、cn-1]、[c0、c1、c2、...、cn-1]、...、[c0、c1、c2、...、cn-1]}。采用该方式进行重复操作的好处在于，发送端连续发送编码比特序列，由于第一编码比特序列中的‘0’和‘1’出现概率基本相当，所以可以增强发送信号的随机性，增强信号覆盖范围，并且硬件方面更加容易实现。在一实施例中，重复扩展操作540中对应的重复扩展次数q(也即预设目标次数)等于6。
当q的具体数值由高层信令进行配置，即在确定预设目标次数q之后，进而依据q可以确定在图6中的卷积编码410或者图7中的卷积编码510的分量码数目n的具体数值。
在一实施例中，可以由图3所描述的数据编码处理模块410来执行图6或者图7所示方法的操作。IoT设备(或UE)可以执行代码集合以控制该IoT设备(或UE)的功能元件执行对应的数据处理功能。
在一实施方式中，预设目标次数由以下的至少一个确定：
目标长度；
预确定的目标阻抗网络的数目；
纠错编码的约束长度；
信息比特序列的长度；
高层配置信令。
其中，预设目标次数可以但不限于包括如下至少之一：4、5、6、7、8、12、16、24、32、48、64。在IoT设备(或UE)中可以对所生成的第二编码比特序列进行重复发送，能够增强接收端接收数据的鲁棒性。预设目标次数从2个或者多个整数中进行选择，可以增加对IoT设备(或UE)调度的自由度，例如若当前场景下的无线资源较紧张时，可以采用较小的预设目标次数；而在场景干扰较大的情况下时，可以采用较大的预设目标次数，以提高数据传输的可靠性和灵活性。
其中，目标长度n等于卷积编码的分量码数目，图8示出了在IoT通信中使用卷积编码的一种数据处理方法的示意图。如图8所示，卷积编码的约束长度v等于7，对应的移位寄存器的数量等于约束长度减去1，所以图8中包括6个移位寄存器610。一些示例中，卷积编码的约束长度v还可以但不限于等于其他数值，例如8、9、10、或11。示例图8中的目标长度n＝12(卷积编码的分量码数目为12，即卷积编码有12路编码输出)，即第一编码比特序列620为{c0、c1、c2、c3、c4、c5、c6、c7、c8、c9、c10、c11}，每一比特都是由一个生成 多项式进行编码获得，例如，参照如下表1，为对应卷积编码的约束长度为7的第一编码比特序列中所有比特的生成多项式的示例表，c0的生成由生成多项式G0获得，采用8进制表示为G0＝133，对应二进制为001 101 101；c1的生成由生成多项式G1获得，采用8进制表示为G0＝171，对应二进制为001 111 001。
表1对应卷积编码的约束长度为7的第一编码比特序列中所有比特的生成多项式的示例表
在一实施方式中，当对应卷积编码的约束长度为v＝9，其输出的编码比特序列包括12比特，即卷积编码的分量码数目等于12，如表2所示，为对应卷积编码的约束长度为9的第一编码比特序列中所有比特的生成多项式的示例表。
表2对应卷积编码的约束长度为9的第一编码比特序列中所有比特的生成多项式的示例表
在另一实施方式中，当第一编码比特序列包括2比特，相对应的卷积编码的约束长度为7时，其对应的生成多项式为表1中的G0和G1，输出的编码比特序列为{c0、c1}；或者，当编码比特序列仅包括6比特，相对应的卷积编码的约束长度为7时，其对应的生成多项式为表1中的G0～G5，输出的编码比特序列为{c0、c1、c2、c3、c4、c5}。编码比特序列长度越长，即对应卷积编码的码率越低，带来的编码增益越好，所以在发送相同能量情况下，码率越低越有利于增强IoT设备的信号覆盖范围；以及相反地，目标长度越短(即码率越高)，那么卷积编码的分量码越少，卷积编码和译码的复杂度也越低，对应地IoT设备实现越简单。
在另一实施方式中，当对应的卷积编码的约束长度为7，其对应的生成多项式包括表1中至少2个生成多项式，即包括以下中的至少2种：133、171、165、117、135、157、123、173。在一种示例中，对应卷积编码的约束长度为9，其对应的生成多项式包括表2中至少2个生成多项式，即包括以下中的至少2种：561、753、715、517、675、513、657、745、473。
在另一实施方式中，当对应的卷积编码的约束长度为7，卷积编码的分量码包数目为6，其对应的生成多项式为表1中的G0～G5，即生成多项式G0～G5分别为：133、171、165、117、135、和157，对应输出的编码比特序列为{c0、c1、c2、c3、c4、c5}。在一种示例中，当对应的卷积编码的约束长度为9，卷积编码的分量码包数目为6，其对应的生成多项式为表2中的G0～G5，即生成多项式G0～G5分别为：561、753、715、517、675、和513，对应输出的编码比特序列为{c0、c1、c2、c3、c4、c5}。卷积编码的分量码数目为6对应的编码码率为1/6，此时卷积编码的编码增益最大，当传输码率(即为信息比特序列的长度与第二编码比特序列的长度的比值)小于1/6时，采用重复第一编码比特序列实现。相比于采用更多分量码数目(如大于6)的卷积编码，采用分量码数目为6的卷积编码重复实现更低传输码率(小于1/6)可以减少解码复杂度，并且不损失解码性能。
在一实施例中，卷积编码的约束长度决定了码字格栅的状态数目，卷积编码的码字格栅状态数等于2的v-1次方，其中v即为卷积编码的约束长度。对于卷积编码的维特比译码来 说，状态数越多，那么译码复杂度越高，需要缓存的路径度量数目和幸存路径数目越多，度量计算的数量也会越多，意味着译码复杂度也越高。但是，约束长度越长，那么卷积编码的最小码距越大，那么其对应的卷积编码性能也会越好。在一种示例中，卷积编码的约束长度还可以包括以下至少之一：8、10、或11。
步骤S130:向接收端发送第二编码比特序列。
本步骤中，通过对获取到的信息比特序列进行纠错编码得到第一编码比特序列，进而通过对得到的第一编码比特序列进行重复扩展得到第二编码比特序列，并将第二编码比特序列发送至作为标签设备的接收端，由于只需对目标长度的第一编码比特序列中的每个比特或者整体的第一编码比特序列按预设目标次数进行重复扩展，即可得到所需求的第二编码比特序列，因此使得接收端能够简单方便地接收该第二编码比特序列并对其进行处理，整体处理过程实现起来简单方便且对于硬件要求不高，也就是说，能够确保标签设备实现极简以及传输数据的可靠性，并且可以降低能量消耗，从而可以弥补相关方法中的技术空白。
如图9所示，本申请的一个实施例，对步骤S130进行进一步的说明，步骤S130可以包括但不限于步骤S1301至S1302。
步骤S1301：根据第二编码比特序列确定目标阻抗网络；
步骤S1302：通过目标阻抗网络向接收端发送第二编码比特序列。
本步骤中，通过第二编码比特序列确定相关的目标阻抗网络，以便于基于目标阻抗网络向接收端发送第二编码比特序列，由于调整阻抗网络的电容参数用户可以实现多种电路调谐频率，使得发射的信号频率随着电路电容值的变化而改变，进而实现频移键控等信号调制，因此通过符合要求的目标阻抗网络向接收端发送第二编码比特序列，可以实现更为良好的信号发射效果。
在一实施例中，目标阻抗网络的数目由以下的至少一个确定：
目标长度；
预设目标次数；
纠错编码的约束长度；
信息比特序列的长度；
高层配置信令。
以下给出具体示例以说明上述各实施例的原理及流程。
示例二
图10示出了在IoT通信中采用反向散射原理进行数据发送的示意图。图10中，IoT设备740接收来自基站710发送的载波信号720，可以进行能量收集或者信号数据接收，通过发送电磁波信号730至基站710。其中，IoT设备740包括：阻抗网络7402、阻抗网络选择控制模块7404、数据编码处理模块7406和发射天线7408。其中，图10中的阻抗网络7402、阻抗网络选择控制模块7404和发射天线7408可以构成图4中的发射机420，其中，IoT设备还可以为UE，载波信号还可以为激励源信号。
IoT设备740中，阻抗网络选择控制模块7404依据数据编码处理模块7406输出的第二编码比特序列选择阻抗网络，通过调整阻抗网络的电容，实现多种电路调谐频率，使得发射的信号频率随着电路电容值的变化而改变，进而实现频移键控等的信号调制。在一实施例中，阻抗网络7402中包括t种阻抗网络，依据第二编码比特序列选择阻抗网络；t种阻抗网络中， 任意2种阻抗网络的参数不相同。其中，阻抗网络的参数可以包括以下至少之一：电阻值、电容值和电感值。
具体地，在一实施例中，包括2种阻抗网络，该2种阻抗网络的参数不相同，由第二编码比特序列中的1比特进行控制，例如该比特为‘0’时选择阻抗网络0，为‘1’时选择阻抗网络1。以及，在另一示例中，包括4种阻抗网络，该4种阻抗网络的参数不相同，由第二编码比特序列中2个连续比特进行控制，例如该2比特为‘00’时选择阻抗网络0，为‘01’时选择阻抗网络1，为‘10’时选择阻抗网络2，为‘11’时选择阻抗网络3；以此类推，还可以采用更多个比特进行控制，此处不再赘述。
在一实施例中，阻抗网络7402中阻抗网络的数目等于2的a次方，其中a是正整数。即在阻抗网络选择控制模块7404中依据第二编码比特序列中的a比特的状态对阻抗网络进行选择。其中，a等于以下至少之一：1、2、3、4、或者5。a或者阻抗网络的数目t由以下参数至少之一确定：信息比特序列的长度、目标长度n、预设目标次数q以及高层的控制信令等。由于存在多种阻抗网络选择，可以减少各个IoT设备发送信号之间的干扰，例如在大规模物联网中，可能需要一次获取较大数量的IoT设备的信息，那么不同IoT设备设备可以选择不同的阻抗网络进行发送数据，如果可供使用的阻抗网络数目越多，相关技术人员通过一定的控制选择，可以降低不同IoT设备的发送信号之间的干扰。
在一实施例中，在图6中的卷积编码420或者图7中的卷积编码520进行的卷积编码输出的目标长度为n，即卷积编码的分量码数目为n，n的具体数值由高层信令进行配置。在确定分量码数目n之后，进而依据分量码数目n确定在图6中执行重复扩展操作440或者图7中重复扩展操作540的预设目标次数q的具体数值。
在一实施例中，图6中的卷积编码420或者图7中的卷积编码520进行的卷积编码输出的目标长度n由信息比特序列的长度确定。具体地，对于信息比特序列长度为K1对应的分量码数目n1，对于信息比特序列长度为K2对应的分量码数目n2，至少满足以下条件之一：1、如果K1大于K2，则n1不小于n2；2、如果K1大于K2，则n1不大于n2。
在一实施例中，图6中的重复扩展操作440或者图7中的重复扩展操作540进行重复扩展的预设目标次数q由信息比特序列的长度K确定。图6或者图7中获得的第二编码比特序列，结合图10的阻抗网络进行发送第二编码比特序列，其中依据以下至少参数之一确定阻抗网络数目：目标长度、卷积编码的分量码数目n、预设目标次数q以及信息比特序列的长度K。以及，也可以通过高层配置信令配置所述阻抗网络数目。
在一实施例中，当确定的目标阻抗网络为多个时，任意两个目标阻抗网络的网络参数不相同，可以确保不同的目标阻抗网络的特性互不相同，因此在具体应用场景中存在可以搭配、组合运用各个目标阻抗网络的可能，从而能够更加适应于不同的、复杂的场景中。
示例三
以下给出一些具体示例说明如何确定数据处理方法中的一些相关参数的具体流程，例如预设目标次数q、目标长度n等。
卷积编码的编码复杂度和译码复杂度与分量码数目n(即目标长度n)直接相关，可以依据预设目标次数q确定n的具体数值。例如，在一物联网通信系统中，包括不同的UE，每种UE可以支持不同的预设目标次数q，当需要发送的总比特数目为Y，系统配置的或者高层信令配置的预设目标次数q，则分量码数目n可依据预设目标次数q、信息比特序列长度K和发 送的总比特数目Y进行确定。具体在一实施例中，采用如下公式进行计算：
n＝function(Y/(q·K))；
其中，函数function(x)表示大于等于实数x的最小整数、对实数x进行四舍五入获得的整数、或者小于等于实数x的最大整数。所述的总比特数目Y可以是第二编码比特序列的长度。其中，当信息比特序列的长度K是大于1且小于或等于512放入整数，信息比特序列长度K等于24到512之间间隔为8的所有整数。信息比特序列长度K等于以下至少之一：24、64、96、128、192、256、288、384、512。可以由信息比特序列的长度K确定分量码数目n，这样设置的好处在于，在发送的总比特数目Y固定情况下，可以采用比较合理的分量码数目n值，减少编码或译码的能量消耗。可以理解地是，当如上确定的分量码数目n大于卷积编码的生成多项式数目，则分量码数目n可以等于卷积编码的生成多项式数目，即卷积编码的生成多项式数目和生成多项式都可以被统一地预先定义。
在一实施例中，依据预设目标次数q确定分量码数目n的具体数值。例如，预设目标次数包括4种：4、8、16、24，该预设目标次数由高层信令进行配置，IoT设备获取预设目标次数q后，依据如下对应的表3确定分量码数目n。
表3分量码数目n与预设目标次数q的一种对应映射关系表
在一实施例中，可以由信令直接指示预设目标次数q和分量码数目n的组合，例如以2比特的信令进行指示。这样设置的好处在于，可以减少信令开销，由于信令在通信中一般占用较多资源，因此通过压缩信令可以增强通信系统的鲁棒性。
示例四
在一实施例中，依据分量码数目n确定预设目标次数q的具体数值。；例如，当需要发送的总比特数目为Y，外部系统或高层信令配置分量码数目n，则预设目标次数q可依据分量码数目n、信息比特序列长度K和发送的总比特数目Y进行确定。具体地，采用如下公式进行计算：
q＝function(Y/(n·K))；
其中，函数function(x)表示大于等于实数x的最小整数、对实数x进行四舍五入获得的整数、或者小于等于实数x的最大整数。信息比特序列长度K和发送的总比特数目Y可以由外部系统配置的或者高层信令配置获得。
在一实施例中，依据分量码数目n确定预设目标次数q的具体数值。例如，分量码的数目包括4种：4、7、9、11。分量码的数目由高层信令进行配置选择，当IoT设备获取到具体n值后，依据如下对应的表4确定预设目标次数q。
表4分量码数目n与重复扩展次数q的另一种对应映射关系表
在一实施例中，可以直接由信令直接指示分量码数目n和预设目标次数q的组合，例如以2比特的信令进行指示。信令可以是RRC信令、MAC信令或者DCI信令等。
示例五
在如图10所示的通信系统中，IoT设备740向基站710发送信号730，其中需要传输长 度为K比特的信息比特序列，信息比特序列长度也可以被称为传输块大小。当仅有2个阻抗网络进行选择，即t＝2，如果第二编码比特序列的当前比特为‘0’，则选择第0个阻抗网络，为‘1’时选择第1个阻抗网络。在一个示例中，数据编码处理模块中的卷积编码的分量码数目为7，预设目标次数为6，需要传输的总比特数为Y的第二编码比特序列。阻抗网络选择控制模块7404依据第二编码比特序列控制选择对应的阻抗网络，通过反向散射向基站710发射出信号730。
如图11所示为在信息比特序列长度为K＝64，第二编码比特序列长度为Y＝3648情况下，对比不同预设目标次数下的第二编码比特序列的性能示意图。其中，图11中的横坐标为加性高斯白噪声(Additive White Gaussian NoiseAWGN)信噪比SNR，纵坐标为误块率((Block Error Rate，BLER)，BLER曲线越靠近左边性能越好。图11中所示的5条BLER曲线，分别对应预设目标次数(Rep)为5次、6次、8次、12次和16次，可以发现当预设目标次数为6次时，第二编码比特序列可以获得较好性能。
如图12所示，图12是本申请另一个实施例提供的数据处理方法的流程图，该数据处理方法可以包括但不限于步骤S210至步骤S220。
步骤S210：接收由发送端发送的第二编码比特序列；
步骤S220：对第二编码比特序列进行处理。
其中，第二编码比特序列由发送端对目标长度的第一编码比特序列进行第一操作或第二操作而得到，第一编码比特序列由发送端对获取到的信息比特序列进行纠错编码得到；
第一操作，包括对于第一编码比特序列中的每个第一比特，重复生成另一个第一比特直至达到预设目标次数，得到包括多个第一比特的比特序列，根据各个比特序列按序生成第二编码比特序列；
第二操作，包括重复生成另一个目标长度的第一编码比特序列直至达到预设目标次数，得到多个第一编码比特序列，根据多个第一编码比特序列按序生成第二编码比特序列。
在一实施例中，本实施例中的数据处理方法的执行主体可以但不限于为图1所示实施例中的接收端200，或者图2所示实施例中的基站210，或者本领域的技术人员可以根据实际应用场景选择设置相应的执行主体，本实施例不做限制。为了更方便地描述本申请的应用场景及原理，以下各相关实施例中相应处以接收端作为数据处理方法的执行主体进行描述，但不应将其理解为对本申请实施例的限制。
本步骤中，由于发送端通过对获取到的信息比特序列进行纠错编码得到第一编码比特序列，进而通过对得到的第一编码比特序列进行重复扩展得到第二编码比特序列，并将第二编码比特序列发送至作为标签设备的接收端，也就是说，发送端只需对目标长度的第一编码比特序列中的每个比特或者整体的第一编码比特序列按预设目标次数进行重复扩展，即可得到所需求的第二编码比特序列，进而使得接收端能够简单方便地接收该第二编码比特序列并对其进行处理，整体处理过程实现起来简单方便且对于硬件要求不高，也就是说，能够确保标签设备实现极简以及传输数据的可靠性，并且可以降低能量消耗，从而可以弥补相关方法中的技术空白。
如图13所示，本申请的一个实施例，对步骤S220进行进一步的说明，步骤S220可以包括但不限于步骤S221至S222。
步骤S221：对第二编码比特序列进行解重复处理得到第一编码比特序列；
步骤S222：对第一编码比特序列进行卷积解码得到信息比特序列。
本步骤中，通过对接收到的第二编码比特序列依次进行解重复处理和卷积解码，能够将第二编码比特序列还原为初始的信息比特序列，因此能够获知信息比特序列的来源和内容，以便于更准确可靠地了解第二编码比特序列和信息比特序列的性能。
如图14所示，本申请的一个实施例，对步骤S221进行进一步的说明，步骤S221可以包括但不限于步骤S2210。
步骤S2210：根据预确定的目标长度和预设目标次数，对第二编码比特序列进行解重复处理得到第一编码比特序列。
本步骤中，通过预确定目标长度和预设目标次数，以便于基于目标长度和预设目标次数对第二编码比特序列进行解重复处理得到第一编码比特序列，也就是说，通过上述的还原操作可以进一步得到中间化的第一编码比特序列。
本申请的一个实施例，对步骤S221进行进一步的说明，步骤S221可以包括但不限于如下至少之一:
当第二编码比特序列包括多个比特序列且比特序列包括多个第一比特时，对于第二编码比特序列中的每个比特序列，从比特序列中提取得到多个第一比特，根据多个第一比特按序生成第一编码比特序列；
当第二编码比特序列包括多个第一编码比特序列时，对第二编码比特序列进行拆分和合并处理得到第一编码比特序列。
本步骤中，一种方式为通过对第二编码比特序列中的各个比特序列进行提取和合并处理以得到第一编码比特序列，可以较好地关联第二编码比特序列中的各个比特序列，得到的第一编码比特序列能够良好地体现其特性；另一种方式为对第二编码比特序列进行拆分和合并处理得到第一编码比特序列，可以较好地关联第二编码比特序列中的各个第一编码比特序列，得到的第一编码比特序列能够良好地体现其特性。
如图15所示，本申请的一个实施例，对步骤S222进行进一步的说明，步骤S222可以包括但不限于步骤S2220。
步骤S2220：根据预确定的目标长度、纠错编码的约束长度以及信息比特序列的长度，对第一编码比特序列进行卷积解码得到信息比特序列。
本步骤中，通过预确定第一编码比特序列的长度、卷积编码的约束长度以及信息比特序列的长度，以便于基于第一编码比特序列的长度、卷积编码的约束长度以及信息比特序列的长度，对第一编码比特序列进行卷积解码得到信息比特序列，也就是说，通过上述的还原操作可以进一步得到初始化的信息比特序列。
本申请的一个实施例，对步骤S210进行进一步的说明，步骤S210可以包括但不限于步骤S211。
步骤S211：根据预确定的目标阻抗网络的数目，接收由发送端发送的第二编码比特序列。
本步骤中，通过预确定与相关的目标阻抗网络的数目，以便于基于目标阻抗网络的数目，接收由发送端发送的第二编码比特序列，也就是说，通过上述的还原操作可以稳定可靠地接收到由发送端发送的第二编码比特序列，例如，当目标阻抗网络的数目为多个时，任意两个目标阻抗网络的网络参数不相同，此时可以从多个目标阻抗网络中选择出所需的一个目标阻抗网络。
在一实施例中，上述各实施例中预确定各个参数的方式不限制，例如可以为基于外部操作系统控制发送而确定，或者可以为基于高层信令管控而确定，或者可以根据实际应用场景进行设置预确定方式等，这并未限制。
在一实施例中，目标长度由以下的至少一个确定：
预设目标次数；
预确定的目标阻抗网络的数目；
纠错编码的约束长度；
信息比特序列的长度；
高层配置信令。
在一实施例中，预设目标次数由以下的至少一个确定：
目标长度；
预确定的目标阻抗网络的数目；
纠错编码的约束长度；
信息比特序列的长度；
高层配置信令。
在一实施例中，目标阻抗网络的数目由以下的至少一个确定：
目标长度；
预设目标次数；
纠错编码的约束长度；
信息比特序列的长度；
高层配置信令。
在一实施例中，纠错编码包括如下至少之一：
低密度奇偶校验编码；
极化编码；
里德所罗门编码；
咬尾卷积编码；
turbo编码。
在一实施方式中，目标长度包括如下至少之一：2、3、4、5、6、7、8、9、10、11、12。
在一实施方式中，预设目标次数包括如下至少之一：4、5、6、7、8、12、16、24、32、48、64。
在一实施方式中，当纠错编码包括卷积编码，卷积编码的约束长度包括如下至少之一：7、8、9、10、11。
在一实施方式中，目标阻抗网络的数目包括如下至少之一：2、4、8、16、32。
在一实施例中，由于目标长度、预设目标次数、目标阻抗网络的数目和纠错编码的类型等在上述各实施例中已经详细阐述，且上述各实施例与本实施例的区别仅在于执行主体的不同，即一个为发送端，另一个为接收端，因此本实施例中的相关实施方式与上述实施例的相对应，为免冗余，对于目标长度、预设目标次数、目标阻抗网络的数目和纠错编码的类型等不再赘述。
另外，如图16所示，本申请的一个实施例还公开了一种电子设备900，包括：至少一个 处理器910；至少一个存储器920，用于存储至少一个程序；当至少一个程序被至少一个处理器910执行时实现如前面任意实施例中的数据处理方法。
另外，本申请的一个实施例还公开了一种计算机可读存储介质，其中存储有计算机可执行指令，计算机可执行指令用于执行如前面任意实施例中的数据处理方法。
此外，本申请的一个实施例还公开了一种计算机程序产品，包括计算机程序或计算机指令，计算机程序或计算机指令存储在计算机可读存储介质中，计算机设备的处理器从计算机可读存储介质读取计算机程序或计算机指令，处理器执行计算机程序或计算机指令，使得计算机设备执行如前面任意实施例中的数据处理方法。
本领域普通技术人员可以理解，上文中所公开方法中的全部或某些步骤、系统可以被实施为软件、固件、硬件及其适当的组合。某些物理组件或所有物理组件可以被实施为由处理器，如中央处理器、数字信号处理器或微处理器执行的软件，或者被实施为硬件，或者被实施为集成电路，如专用集成电路。这样的软件可以分布在计算机可读介质上，计算机可读介质可以包括计算机存储介质(或非暂时性介质)和通信介质(或暂时性介质)。如本领域普通技术人员公知的，术语计算机存储介质包括在用于存储信息(诸如计算机可读指令、数据结构、程序模块或其他数据)的任何方法或技术中实施的易失性和非易失性、可移除和不可移除介质。计算机存储介质包括但不限于RAM、ROM、EEPROM、闪存或其他存储器技术、CD-ROM、数字多功能盘(DVD)或其他光盘存储、磁盒、磁带、磁盘存储或其他磁存储装置、或者可以用于存储期望的信息并且可以被计算机访问的任何其他的介质。此外，本领域普通技术人员公知的是，通信介质通常包含计算机可读指令、数据结构、程序模块或者诸如载波或其他传输机制之类的调制数据信号中的其他数据，并且可包括任何信息递送介质。

Claims (30)

  1. 一种数据处理方法，包括：
    对获取到的信息比特序列进行纠错编码得到目标长度的第一编码比特序列；
    对所述第一编码比特序列进行重复扩展得到第二编码比特序列；
    向接收端发送所述第二编码比特序列；
    其中，所述对所述第一编码比特序列进行重复扩展得到第二编码比特序列，包括；
    对于所述第一编码比特序列中的每个第一比特，重复生成另一个所述第一比特直至达到预设目标次数，得到包括多个所述第一比特的比特序列，根据各个所述比特序列按序生成所述第二编码比特序列；或者，
    重复生成另一个所述目标长度的第一编码比特序列直至达到预设目标次数，得到多个所述第一编码比特序列，根据多个所述第一编码比特序列按序生成所述第二编码比特序列。
  2. 根据权利要求1所述的数据处理方法，其中，所述对获取到的信息比特序列进行纠错编码得到目标长度的第一编码比特序列，包括：
    对于获取到的信息比特序列中的每个第二比特，对所述第二比特进行卷积编码得到目标长度的所述第一编码比特序列。
  3. 根据权利要求1所述的数据处理方法，其中，所述向接收端发送所述第二编码比特序列，包括：
    根据所述第二编码比特序列确定目标阻抗网络；
    通过所述目标阻抗网络向接收端发送所述第二编码比特序列。
  4. 根据权利要求1所述的数据处理方法，其中，所述目标长度由以下的至少一个确定：
    所述预设目标次数；
    预确定的目标阻抗网络的数目；
    所述纠错编码的约束长度；
    所述信息比特序列的长度；
    高层配置信令。
  5. 根据权利要求1所述的数据处理方法，其中，所述预设目标次数由以下的至少一个确定：
    所述目标长度；
    预确定的目标阻抗网络的数目；
    所述纠错编码的约束长度；
    所述信息比特序列的长度；
    高层配置信令。
  6. 根据权利要求3所述的数据处理方法，其中，所述目标阻抗网络的数目由以下的至少一个确定：
    所述目标长度；
    所述预设目标次数；
    所述纠错编码的约束长度；
    所述信息比特序列的长度；
    高层配置信令。
  7. 根据权利要求1所述的数据处理方法，其中，所述纠错编码包括如下至少之一：
    低密度奇偶校验编码；
    极化编码；
    里德所罗门编码；
    咬尾卷积编码；
    turbo编码。
  8. 根据权利要求1所述的数据处理方法，其中，所述目标长度包括如下至少之一：2、3、4、5、6、7、8、9、10、11、12。
  9. 根据权利要求1所述的数据处理方法，其中，所述预设目标次数包括如下至少之一：4、5、6、7、8、12、16、24、32、48、64。
  10. 根据权利要求2所述的数据处理方法，其中，所述卷积编码的约束长度包括如下至少之一：7、8、9、10、11。
  11. 根据权利要求3所述的数据处理方法，其中，所述目标阻抗网络的数目包括如下至少之一：2、4、8、16、32。
  12. 根据权利要求3所述的数据处理方法，其中，当所述目标阻抗网络为多个时，任意两个所述目标阻抗网络的网络参数不相同。
  13. 一种数据处理方法，包括：
    接收由发送端发送的第二编码比特序列；
    对所述第二编码比特序列进行处理；
    其中，所述第二编码比特序列由所述发送端对目标长度的第一编码比特序列进行第一操作或第二操作而得到，所述第一编码比特序列由所述发送端对获取到的信息比特序列进行纠错编码得到；
    所述第一操作，包括对于所述第一编码比特序列中的每个第一比特，重复生成另一个所述第一比特直至达到预设目标次数，得到包括多个所述第一比特的比特序列，根据各个所述比特序列按序生成所述第二编码比特序列；
    所述第二操作，包括重复生成另一个所述目标长度的第一编码比特序列直至达到预设目标次数，得到多个所述第一编码比特序列，根据多个所述第一编码比特序列按序生成所述第二编码比特序列。
  14. 根据权利要求13所述的数据处理方法，其中，所述对所述第二编码比特序列进行处理，包括：
    对所述第二编码比特序列进行解重复处理得到所述第一编码比特序列；
    对所述第一编码比特序列进行卷积解码得到所述信息比特序列。
  15. 根据权利要求14所述的数据处理方法，其中，所述对所述第二编码比特序列进行解重复处理得到所述第一编码比特序列，包括：
    根据预确定的所述目标长度和所述预设目标次数，对所述第二编码比特序列进行解重复处理得到所述第一编码比特序列。
  16. 根据权利要求14所述的数据处理方法，其中，所述对所述第一编码比特序列进行卷积解码得到所述信息比特序列，包括：
    根据预确定的所述目标长度、所述纠错编码的约束长度以及所述信息比特序列的长度，对所述第一编码比特序列进行卷积解码得到所述信息比特序列。
  17. 根据权利要求14所述的数据处理方法，其中，所述对所述第二编码比特序列进行解重复处理得到所述第一编码比特序列，包括如下至少之一：
    当所述第二编码比特序列包括多个比特序列且所述比特序列包括多个第一比特时，对于所述第二编码比特序列中的每个所述比特序列，从所述比特序列中提取得到多个所述第一比特，根据多个所述第一比特按序生成所述第一编码比特序列；
    当所述第二编码比特序列包括多个所述第一编码比特序列时，对所述第二编码比特序列进行拆分和合并处理得到所述第一编码比特序列。
  18. 根据权利要求13所述的数据处理方法，其中，所述接收由发送端发送的第二编码比特序列，包括：
    根据预确定的目标阻抗网络的数目，接收由发送端发送的第二编码比特序列。
  19. 根据权利要求13所述的数据处理方法，其中，所述目标长度由以下的至少一个确定：
    所述预设目标次数；
    预确定的目标阻抗网络的数目；
    所述纠错编码的约束长度；
    所述信息比特序列的长度；
    高层配置信令。
  20. 根据权利要求13所述的数据处理方法，其中，所述预设目标次数由以下的至少一个确定：
    所述目标长度；
    预确定的目标阻抗网络的数目；
    所述纠错编码的约束长度；
    所述信息比特序列的长度；
    高层配置信令。
  21. 根据权利要求18所述的数据处理方法，其中，所述目标阻抗网络的数目由以下的至少一个确定：
    所述目标长度；
    所述预设目标次数；
    所述纠错编码的约束长度；
    所述信息比特序列的长度；
    高层配置信令。
  22. 根据权利要求13所述的数据处理方法，其中，所述纠错编码包括如下至少之一：
    低密度奇偶校验编码；
    极化编码；
    里德所罗门编码；
    咬尾卷积编码；
    turbo编码。
  23. 根据权利要求13所述的数据处理方法，其中，所述目标长度包括如下至少之一：2、 3、4、5、6、7、8、9、10、11、12。
  24. 根据权利要求13所述的数据处理方法，其中，所述预设目标次数包括如下至少之一：4、5、6、7、8、12、16、24、32、48、64。
  25. 根据权利要求13所述的数据处理方法，其中，当所述纠错编码包括卷积编码，所述卷积编码的约束长度包括如下至少之一：7、8、9、10、11。
  26. 根据权利要求18所述的数据处理方法，其中，所述目标阻抗网络的数目包括如下至少之一：2、4、8、16、32。
  27. 根据权利要求18所述的数据处理方法，其中，当所述目标阻抗网络为多个时，任意两个所述目标阻抗网络的网络参数不相同。
  28. 一种电子设备，包括：
    至少一个处理器；
    至少一个存储器，用于存储至少一个程序；
    当至少一个所述程序被至少一个所述处理器执行时实现如权利要求1至27任意一项所述的数据处理方法。
  29. 一种计算机可读存储介质，其中存储有处理器可执行的程序，所述处理器可执行的程序被处理器执行时用于实现如权利要求1至27任意一项所述的数据处理方法。
  30. 一种计算机程序产品，包括计算机程序或计算机指令，所述计算机程序或所述计算机指令存储在计算机可读存储介质中，计算机设备的处理器从所述计算机可读存储介质读取所述计算机程序或所述计算机指令，所述处理器执行所述计算机程序或所述计算机指令，使得所述计算机设备执行如权利要求1至27任意一项所述的数据处理方法。
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