WO2024000399A1 - 太阳能电池结构及其制作方法 - Google Patents

太阳能电池结构及其制作方法 Download PDF

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Publication number
WO2024000399A1
WO2024000399A1 PCT/CN2022/102807 CN2022102807W WO2024000399A1 WO 2024000399 A1 WO2024000399 A1 WO 2024000399A1 CN 2022102807 W CN2022102807 W CN 2022102807W WO 2024000399 A1 WO2024000399 A1 WO 2024000399A1
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Prior art keywords
doped region
passivation layer
region
semiconductor substrate
heavily doped
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English (en)
French (fr)
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方超炎
陈德爽
任勇
何悦
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Hengdian Group DMEGC Magnetics Co Ltd
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Hengdian Group DMEGC Magnetics Co Ltd
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Priority to US17/912,040 priority Critical patent/US20240222539A1/en
Priority to EP22765738.4A priority patent/EP4322227A4/en
Publication of WO2024000399A1 publication Critical patent/WO2024000399A1/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • H10F77/219—Arrangements for electrodes of back-contact photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/14—Photovoltaic cells having only PN homojunction potential barriers
    • H10F10/146—Back-junction photovoltaic cells, e.g. having interdigitated base-emitter regions on the back side
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H10F10/166—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H10F71/1221—The active layers comprising only Group IV materials comprising polycrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/129—Passivating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/10—Semiconductor bodies
    • H10F77/14—Shape of semiconductor bodies; Shapes, relative sizes or dispositions of semiconductor regions within semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/30—Coatings
    • H10F77/306—Coatings for devices having potential barriers
    • H10F77/311—Coatings for devices having potential barriers for photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/93—Interconnections
    • H10F77/933—Interconnections for devices having potential barriers
    • H10F77/935—Interconnections for devices having potential barriers for photovoltaic devices or modules

Definitions

  • the present disclosure relates to the field of photovoltaic technology, and specifically, to a solar cell structure and a manufacturing method thereof.
  • XBC cells based on full back contact solar cells have PN junctions and electrodes on the back. This will cause the photogenerated carriers generated inside the cell, especially on the front, to be transported across the entire thickness of the silicon wafer before they can be separated and collected. Therefore, the cell Passivation of the backside is critical. However, the backside passivation layer in current full back contact solar cells can easily lead to a reduction in conversion efficiency.
  • the main purpose of the present disclosure is to provide a solar cell structure and a manufacturing method thereof to solve the problem of low conversion efficiency of full back contact solar cells in the prior art.
  • a solar cell structure including: a semiconductor substrate, a first doped region and a second doped region formed on the back of the semiconductor substrate; a first heavily doped region A region is formed in the semiconductor substrate, and the first heavily doped region is contact-disposed on a side of the first doped region away from the back surface, the first heavily doped region and the first doped region are both P-type doped, and The doping concentration of the first heavily doped region is greater than the doping concentration of the first doped region; the second heavily doped region is formed in the semiconductor substrate, and the second heavily doped region is disposed in contact with the second doped region On the side away from the back, the second heavily doped region and the second doped region are both N-type doped, and the doping concentration of the second heavily doped region is greater than the doping concentration of the second doped region; the first passivation region The first passivation layer is formed on the side of the first doped region away from the first
  • the back side of the semiconductor substrate has a groove
  • the first doping region is formed in a region on the back side corresponding to the groove
  • the second doping region is formed on the back side in regions on both sides of the groove
  • the first passivation The layer is formed in grooves, preferably with a groove depth of 10 to 100 ⁇ m.
  • a part of the second passivation layer is formed on a side of the second doped region away from the second heavily doped region, and another part of the second passivation layer is formed on a side of the first passivation layer away from the first doped region.
  • One side of the complex is formed on a part of the second passivation layer on a side of the second doped region away from the second heavily doped region, and another part of the second passivation layer is formed on a side of the first passivation layer away from the first doped region.
  • the doping concentrations of the first doped region and the second doped region are independently selected from 10 18 to 10 20 cm -3 ; the doping concentrations of the first heavily doped region and the second heavily doped region are independently selected.
  • the ground is selected from 10 20 to 10 22 cm -3 .
  • the first doped region and the second doped region are polysilicon doped structures
  • the solar cell structure further includes: a tunnel oxide layer covering the polysilicon doped structure away from the first passivation layer and the second passivation layer.
  • the thickness of the tunnel oxide layer is preferably 1 to 2 nm.
  • the first passivation layer includes any one or more of an aluminum oxide layer, a gallium oxide layer, a stack of aluminum oxide and silicon nitride, and a stack of gallium oxide and silicon nitride.
  • the second passivation layer includes a silicon nitride layer and/or a hydrogenated amorphous silicon layer.
  • the semiconductor substrate is a silicon substrate
  • the solar cell structure further includes: a silicon dioxide layer, the silicon dioxide layer covers the back side, and a part of the silicon dioxide layer is located in the first doping region and the first passivation layer. The other part of the silicon dioxide layer is located between the second doped region and the second passivation layer.
  • the thickness of the silicon dioxide layer is 2 to 10 nm.
  • the solar cell structure also includes: a front surface field formed on the front side of the semiconductor substrate, the semiconductor substrate is a doped substrate, the front surface field is of the same doping type as the doped substrate, and the front surface field is The doping concentration is greater than the doping concentration of the doped substrate; or the front floating junction is formed on the front side of the semiconductor substrate, the semiconductor substrate is a doped substrate, and the doping type of the front floating junction and the doped substrate is opposite, and The doping concentration of the front floating junction is greater than that of the doped substrate.
  • a method for manufacturing the above-mentioned solar cell structure including the following steps: forming a first doped region and a second doped region on the back side of a semiconductor substrate; The first heavily doped region and the first heavily doped region, the first heavily doped region is in contact with the side of the first doped region away from the back, the second heavily doped region is in contact with the side of the second doped region away from the back Contact, wherein the first heavily doped region and the first doped region are both P-type doped, the second heavily doped region and the second doped region are both N-type doped, and the first heavily doped region
  • the doping concentration is greater than the doping concentration of the first doped region, the doping concentration of the second heavily doped region is greater than the doping concentration of the second doped region; the first doped region is far away from the first heavily doped region.
  • a first passivation layer is formed on the side of the second doped region, and the first passivation layer has a fixed negative charge; a second passivation layer is formed on at least one side of the second doped region away from the second heavily doped region, and the second passivation layer has a fixed positive charge. charge.
  • the step of forming the first doped region and the second doped region includes: depositing intrinsic polysilicon material on the back side of the semiconductor substrate, and performing N-type ion diffusion and P-type ion diffusion on the polysilicon material respectively to form the first doping region and the second doping region; or using N-type ions and P-type ions to perform in-situ doping on the back side of the semiconductor substrate to form the first doping region and the second doping region, wherein,
  • the semiconductor substrate is a polysilicon substrate.
  • the manufacturing method before forming the first doped region and the second doped region, further includes the following steps: forming a tunnel oxide layer on the back side of the semiconductor substrate, and forming the first passivation layer and the second doped region. After the step of passivating the layer, a part of the tunnel oxide layer and the first passivation layer are located on both sides of the first doped region, and the other part of the tunnel oxide layer and the second passivation layer are located in the second doped region. both sides.
  • the manufacturing method further includes the following steps: etching the back side of the semiconductor substrate to form a groove; forming the first doped region In the step of forming the second doped region, a first doped region is formed in the region on the back surface corresponding to the groove, and a second doped region is formed in the region on both sides of the groove on the back surface.
  • the step of forming the first passivation layer and the second passivation layer includes: covering a silicon dioxide layer on the back side of the semiconductor substrate, so that a part of the silicon dioxide layer covers the bottom surface and inner wall of the groove and is in contact with the groove.
  • the first doping region is in contact, and another part of the silicon dioxide layer is in contact with the second doping region; a first passivation layer is formed in the groove; and a second passivation layer is covered on the surface of the first passivation layer and the silicon dioxide layer. chemical layer.
  • the steps of forming the first heavily doped region and the first heavily doped region include: using P-type ions to perform selective emitter laser doping on the back side of the semiconductor substrate to form the first heavily doped region, It is preferred to use a 355nm picosecond laser with a pulse width of 10-20ps and an operating frequency of 10-80MHz; N-type ions are used to selectively emitter laser dope the back side of the semiconductor substrate to form the second heavily doped region , it is preferred to use a 532nm nanosecond laser with a pulse width of 6 to 20ns and an operating frequency of 50 to 200KHz.
  • a solar cell structure including a semiconductor substrate.
  • a first doped region and a second doped region are formed on the back of the semiconductor substrate.
  • the solar cell structure also includes a semiconductor substrate formed in the semiconductor substrate.
  • the first heavily doped region and the first heavily doped region, the first heavily doped region contact is provided on the side of the first doped region away from the back surface, the first heavily doped region and the first heavily doped region are both P type doping, and the doping concentration of the first heavily doped region is greater than the doping concentration of the first doped region
  • the second heavily doped region contact is provided on the side of the second doped region away from the back surface, the second heavily doped region Both the doped region and the second doped region are N-type doped, and the doping concentration of the second heavily doped region is greater than the doping concentration of the second doped region.
  • the structure also includes a first passivation layer with fixed negative charge and a second passivation layer with fixed positive charge.
  • the first passivation layer is formed on a side of the first doped region away from the first heavily doped region, and the second passivation layer has a fixed negative charge.
  • the passivation layer is formed at least on the side of the second doped region away from the second heavily doped region, thereby achieving zoned passivation of the P/N region, improving the collection efficiency of photogenerated carriers, and thereby improving the above-mentioned solar energy efficiency. Conversion efficiency of battery structure.
  • Figure 1 shows a schematic structural diagram of a solar cell structure according to an embodiment of the present disclosure
  • FIG. 2 shows a schematic structural diagram of another solar cell according to an embodiment of the present disclosure.
  • the biggest feature of the full back contact battery is that the emitter and metal contact are both on the back of the battery.
  • the PN junction and electrodes are on the back that it will cause internal problems within the battery, especially in The photogenerated carriers generated on the front face need to be transported through the entire thickness of the silicon wafer before they can be separated and collected.
  • the back passivation layer in current full back contact solar cells can easily lead to a reduction in conversion efficiency.
  • the structure includes a semiconductor substrate 1, a first heavily doped region 5, a second heavily doped region 7, a first passivation region passivation layer 9 and second passivation layer 10, wherein the first doped region 4 and the second doped region 6 are formed on the back side of the semiconductor substrate 1; the first heavily doped region 5 is formed in the semiconductor substrate 1, And the first heavily doped region 5 is disposed in contact with the side of the first doped region 4 away from the back surface.
  • Both the first heavily doped region 5 and the first doped region 4 are P-type doped, and the first heavily doped region 5
  • the doping concentration of the region 5 is greater than the doping concentration of the first doped region 4
  • the second heavily doped region 7 is formed in the semiconductor substrate 1, and the second heavily doped region 7 is provided in contact with the second doped region 6
  • the second heavily doped region 7 and the second doped region 6 are both N-type doped, and the doping concentration of the second heavily doped region 7 is greater than the doping concentration of the second doped region 6
  • the first passivation layer 9 is formed on the side of the first doped region 4 away from the first heavily doped region 5.
  • the first passivation layer 9 has a fixed negative charge; the second passivation layer 10 is formed on at least the second doped region. On the side of the impurity region 6 away from the second heavily doped region 7, the second passivation layer 10 has a fixed positive charge.
  • the doping of the first heavily doped region 5 is greater than the doping concentration of the first doped region 4, and the doping concentration of the second heavily doped region 7 is greater than the doping concentration of the second doped region 6.
  • the first doped region 4 and the second doped region 6 are separately passivated, wherein the first passivation layer 9 contains a large amount of negative charge, and the second passivation layer 10 contains a large amount of positive charge, which can avoid the formation of an inversion layer in the N region by the negatively charged aluminum oxide passivation layer in the current conventional passivation method. It is not conducive to the phenomenon of electron collection, thereby increasing the collection rate of photogenerated carriers, achieving excellent field passivation effect, and thereby improving the conversion efficiency of the solar cell structure.
  • the back surface of the above-mentioned semiconductor substrate 1 has a groove
  • the first doped region 4 is formed on the back surface corresponding to the groove
  • the second doped region 6 is formed on the back surface at both sides of the groove.
  • the first passivation layer 9 is formed in the groove
  • the depth of the groove is preferably 10 ⁇ m to 100 ⁇ m. Since the P region and N region in a full back contact solar cell are arranged at interdigitated intervals inside the cell, battery leakage is prone to occur.
  • grooves are created to form the P region and the N region using height differences. Physical isolation to avoid leakage.
  • the above-mentioned semiconductor substrate 1 is a silicon substrate. Since the position of the PN junction of the full back contact solar cell is on the back of the cell, and the photogenerated carriers are mainly generated on the front surface of the cell, it requires The back emitter is reached through the semiconductor substrate 1 which has a certain thickness. In order to reduce the recombination of photogenerated carriers during the process, the substrate needs to have a longer minority carrier diffusion length. Therefore, high-quality single crystal silicon wafers are used to prepare high-efficiency full back-contact solar cells.
  • the substrate silicon wafer of the semiconductor substrate 1 can be either a P-type silicon wafer or an N-type silicon wafer. After selecting different types of substrate silicon wafers, the doping of the battery will be different. If an N-type silicon wafer is selected, a certain area on the back of the battery will be doped with boron to form a P + area, which serves as the emitter. If a P-type silicon wafer is used, a certain area on the back of the battery will be doped with phosphorus to form an N + region, which serves as the emitter and forms a PN junction with the silicon wafer substrate. Compared with P-type silicon wafers, N-type silicon wafers have the advantages of high minority carrier lifetime, no light attenuation, and good low-light performance. However, P-type silicon wafers have advantages on the cost side.
  • a part of the second passivation layer 10 is formed on a side of the second doped region 6 away from the second heavily doped region 7
  • another part of the second passivation layer 10 is formed on a side of the second doped region 6 away from the second heavily doped region 7 . on the side of the first passivation layer 9 away from the first doping region 4 .
  • the second doped region 6 is N-type doped, and a part of the second passivation layer 10 formed on the side of the second doped region 6 away from the second heavily doped region 7 is due to the fact that the second passivation layer 10 has a higher
  • the fixed positive charge density can show significant field effect passivation characteristics by shielding the minority carrier electrons on the surface of the N-type doped region, and is formed on another part of the first passivation layer 9 on the side away from the first doped region 4
  • the second passivation layer 10 also has the first passivation layer 9 between the first doped region 4 and the second passivation layer 10, which prevents the positively charged second passivation layer 10 from forming an inverse reaction in the P region.
  • the type layer is not conducive to the phenomenon of electron collection, thereby increasing the collection rate of photogenerated carriers, achieving excellent field passivation effect, and thus improving the conversion efficiency of the solar cell structure.
  • the doping concentrations of the first doped region 4 and the second doped region 6 in the above solar cell structure are independently selected from 10 18 cm -3 ⁇ 10 20 cm -3
  • the first doping concentration is
  • the doping concentrations of the doped region 5 and the second heavily doped region 7 are independently selected from 10 20 cm -3 to 10 22 cm -3 .
  • the ohmic contact of the device is enhanced and reduces the The resistance of the series resistor in the device is reduced, thereby reducing the recombination rate of carriers and increasing the short-circuit current, which is beneficial to increasing the conversion power of the solar cell.
  • the first doped region 4 and the second doped region 6 are polysilicon doped structures.
  • the solar cell structure also includes a tunnel oxide layer 13 .
  • the layer 13 covers the side surface of the polysilicon doped structure away from the first passivation layer 9 and the second passivation layer 10.
  • the thickness of the tunnel oxide layer 13 is 1 nm to 2 nm.
  • the above-mentioned polysilicon doping structure and the tunnel oxide layer 13 together constitute the backside passivation contact structure of the solar cell. This structure enables the solar cell to have a lower carrier recombination rate and better contact, thereby obtaining higher conversion efficiency. .
  • the first doped region 4 is boron-doped polysilicon 41
  • the second doped region 6 is phosphorus-doped polysilicon 61, as shown in FIG. 2 .
  • the tunnel oxide layer 13 can be a silicon oxide layer, which can tunnel majority carriers into the polysilicon doped structure while blocking minority carrier recombination.
  • the good passivation effect of ultra-thin silicon oxide and heavily doped regions makes The surface energy band of the silicon wafer is bent, resulting in a field passivation effect.
  • the probability of electron tunneling is greatly increased, the contact resistance is reduced, and the open circuit voltage and short circuit current of the battery are increased, thereby improving the battery conversion efficiency.
  • the first passivation layer 9 includes any one or more of an aluminum oxide layer, a gallium oxide layer, a stack of aluminum oxide and silicon oxide, and a stack of gallium oxide and silicon nitride. .
  • the second passivation layer 10 includes a silicon nitride layer and/or a hydrogenated amorphous silicon layer.
  • the above solar cell structure also includes a silicon dioxide layer 8 covering the back surface, and a part of the silicon dioxide layer 8 is located between the first doping region 4 and the first passivation region. Between the layers 9, another part of the silicon dioxide layer 8 is located between the second doped region 6 and the second passivation layer 10.
  • the thickness of the silicon dioxide layer 8 is 2 nm to 10 nm.
  • the passivation of the passivation layer When the passivation of the passivation layer is activated during the annealing process, the crystallinity of the silicon surface changes, from a microcrystalline amorphous mixture to a polycrystalline one. , at the same time, the hydrogen ions in the passivation layer will diffuse to the interface, and the silicon dioxide layer 8 can effectively prevent excessive hydrogen ions from penetrating into the semiconductor silicon substrate, thereby avoiding the more serious photothermal-induced attenuation LeTTD effect.
  • the above-mentioned solar cell structure also includes a front surface field 2, which is formed on the front surface of the semiconductor substrate 1.
  • the semiconductor substrate 1 is a doped substrate, and the front surface field 2 and the doped substrate The doping type of the hybrid substrate is the same.
  • the doping concentration of the above-mentioned front surface field 2 is greater than the doping concentration of the semiconductor substrate 1.
  • the difference in concentration between the front surface field 2 and the semiconductor substrate 1 can be used to facilitate the movement of carriers to the back side of the solar cell and transfer them to the back side of the solar cell. Collect on the back.
  • the above solar cell structure also includes a front floating junction (not shown in the figure), the front floating junction is formed on the front side of the semiconductor substrate 1, and the semiconductor substrate 1 is a doped substrate, The front floating junction is the opposite doping type of the doped substrate.
  • the doping concentration of the above-mentioned front floating junction is greater than the doping concentration of the semiconductor substrate 1.
  • the difference between the high and low concentrations of the front floating junction and the semiconductor substrate 1 is used to assist in the separation of carriers, thereby enhancing carrier collection. efficiency.
  • the above-mentioned solar cell structure also includes an anti-reflection film 3 , which is disposed on the side of the front surface field 2 or the front floating junction away from the semiconductor substrate 1 , that is, it is disposed on the semiconductor substrate. 1, as shown in Figures 1 and 2.
  • the above-mentioned anti-reflective film 3 can effectively reduce the reflectivity of the cell, allowing more light to be absorbed by the silicon matrix.
  • a first electrode 12 and a second electrode 11 are provided on the back side of the semiconductor substrate 1 , the first electrode 12 is in contact with the first doped region 4 , and the second electrode 11 is in contact with the second doped region 4 .
  • the first electrode 12 sequentially penetrates the second passivation layer 10 , the first passivation layer 9 and the silicon dioxide layer 8 to the first doped region 4 .
  • the electrode 11 sequentially penetrates the second passivation layer 10 and the silicon dioxide layer 8 to the second doped region 6 .
  • a method for manufacturing a solar cell structure including the following steps: forming a first doped region and a second doped region on the back side of a semiconductor substrate; A first heavily doped region and a first heavily doped region are formed in the semiconductor substrate, the first heavily doped region is in contact with a side of the first doped region away from the back, and the second heavily doped region is in contact with the second doped region The side away from the back surface is contacted, wherein the first heavily doped region and the first doped region are both P-type doped, the second heavily doped region and the second doped region are both N-type doped, and the first The doping concentration of the heavily doped region is greater than the doping concentration of the first heavily doped region, the doping concentration of the second heavily doped region is greater than the doping concentration of the second heavily doped region; the first heavily doped region is far away from the first heavily doped region.
  • a first passivation layer is formed on one side of the doped region, and the first passivation layer has a fixed negative charge; a second passivation layer is formed on at least one side of the second doped region away from the second heavily doped region, and the second passivation layer
  • the chemical layer has a fixed positive charge.
  • the above-mentioned semiconductor substrate is a silicon substrate
  • the silicon wafer surface of the above-mentioned silicon substrate is subjected to texturing treatment to remove the damage layer on the silicon wafer surface, reduce the recombination center on the silicon wafer surface, and at the same time, in the silicon wafer surface A textured surface is formed on the surface of the sheet, which can increase the absorption of sunlight and reduce reflection, thereby increasing the short-circuit current and helping to improve the conversion efficiency of the solar cell.
  • the above-mentioned semiconductor silicon substrate may be an N-type silicon substrate or a P-type silicon substrate.
  • the resistivity of the above-mentioned semiconductor substrate is 0.3 ⁇ cm ⁇ 3 ⁇ cm.
  • the thickness of the above-mentioned semiconductor substrate is 150 ⁇ m ⁇ 180 ⁇ m.
  • the above-mentioned silicon substrate is subjected to a back polishing process.
  • the mirror reflection principle is used to increase the back reflectivity of light and reduce the transmission loss, thereby increasing the output current.
  • the recombination rate on the back surface is reduced, and the minority carrier lifetime of the silicon wafer is significantly improved.
  • intrinsic polysilicon material is deposited on the back side of the above-mentioned semiconductor substrate, and N-type ion diffusion and P-type ion diffusion are performed on the polysilicon material respectively to form the first doped region and the second doped region. region; or respectively use N-type ions and P-type ions to in-situ dope the back side of the semiconductor substrate to form the first doping region and the second doping region, wherein the semiconductor substrate is a polysilicon substrate.
  • a first doped region doped with boron and a second doped region doped with phosphorus are formed respectively, and the first doped region and the second doped region are arranged in a cross arrangement on the back side of the semiconductor substrate.
  • the effective doping concentration of the above-mentioned first doping region and the second doping region is 10 18 cm -3 ⁇ 10 20 cm -3 , corresponding to the first doping region and the second doping region
  • the width is 400 ⁇ m to 2000 ⁇ m. In this embodiment, the recombination loss during the carrier diffusion process can be effectively reduced, thereby improving the conversion efficiency of the solar cell.
  • the doping thickness of the above-mentioned first doping region and the second doping region is 60 nm to 200 nm, and both the first doping region and the second doping region can be enhanced by low pressure chemical vapor deposition (LPCVD) or plasma.
  • LPCVD low pressure chemical vapor deposition
  • PECVD chemical vapor deposition
  • PVD physical vapor deposition
  • APCVD atmospheric pressure chemical vapor deposition
  • the first doped region and the second doped region are formed using screen printing + thermal pushing. That is, screen printing is used to print boron-containing slurry in the first doping area, and phosphorus-containing slurry is printed in the second doping area. Then, under high temperature conditions, the boron atoms and phosphorus atoms inside are pushed to the semiconductor silicon substrate. A first doped region and a second doped region are formed therein.
  • the first doped region and the second doped region are formed using a mask + two ion implantations. That is, a mask is used to cover unnecessary areas, an ion cavity is used to inject corresponding boron atoms and phosphorus atoms into the semiconductor silicon substrate, and then a high-temperature advancement process is performed to form the corresponding first doping and second doping regions.
  • the first doped region and the second doped region are formed by thermal diffusion.
  • the gas used to form the first doped region is boron tribromide or boron trichloride
  • the gas used to form the second doped region is phosphorus oxychloride.
  • two masking + cleaning processes are used. That is, when forming the first doped region, use a mask to cover the second doped region, and then introduce boron tribromide or boron trichloride for thermal diffusion. The diffusion temperature is 900°C to 1100°C, and finally mask of cleaning.
  • a mask is used to cover the first doped region, and then phosphorus oxychloride is introduced for thermal diffusion at a diffusion temperature of 700°C to 900°C. Finally, the mask is cleaned.
  • the method of manufacturing the solar cell structure before the step of forming the first doped region and the second doped region, the method of manufacturing the solar cell structure further includes forming a tunnel oxide layer on the back side of the semiconductor substrate, and before forming the first doped region. After the steps of the passivation layer and the second passivation layer, a part of the tunnel oxide layer and the first passivation layer are located on both sides of the first doped region, and the other part of the tunnel oxide layer and the second passivation layer Located on both sides of the second doped region.
  • the tunnel oxide layer can jointly form the backside passivation contact structure of the solar cell with the above-mentioned polysilicon substrate, forming a full-area passivation on the backside, further improving the conversion efficiency of the solar cell.
  • the tunnel oxide layer is a silicon dioxide structure with a thickness of 1 cm to 2 cm.
  • thermal oxidation thermal oxidation, ozone oxidation, wet oxidation, low pressure chemical vapor deposition (LPCVD), plasma enhanced chemical vapor deposition (PECVD), physical vapor deposition (PVD), atmospheric pressure chemical vapor deposition (APCVD), etc.
  • LPCVD low pressure chemical vapor deposition
  • PECVD plasma enhanced chemical vapor deposition
  • PVD physical vapor deposition
  • APCVD atmospheric pressure chemical vapor deposition
  • the above method of manufacturing the solar cell structure further includes etching the back side of the semiconductor substrate to form a groove, In the step of forming the first doped region and the second doped region, the first doped region is formed in the area on the back surface corresponding to the groove, and the second doped region is formed in the area on both sides of the groove in the back surface.
  • first doped region and the second doped region are arranged in a cross arrangement, in order to avoid battery leakage, laser grooving can be used to form a groove, and then the first doped region is formed in the groove, so that the first doped region There is a certain height difference between the first doped region and the second doped region to achieve effective physical isolation, and the gap area between the first doped region and the second doped region using groove isolation is small, which can make the surface It has a good passivation effect to avoid the recombination of minority carriers. Too wide may cause the effective area of the back contact battery to be wasted and effective carriers to be difficult to collect, thereby reducing battery performance.
  • the groove depth of the groove is 10 ⁇ m to 100 ⁇ m.
  • the step of forming the first passivation layer and the second passivation layer includes: covering a silicon dioxide layer on the back side of the semiconductor substrate, so that a part of the silicon dioxide layer covers the groove.
  • the bottom surface and the inner wall are in contact with the first doped region, and another part of the silicon dioxide layer is in contact with the second doped region; a first passivation layer is formed in the groove; between the first passivation layer and the silicon dioxide layer The surface is covered with a second passivation layer.
  • the silicon dioxide layer can be formed by thermal oxidation, low pressure chemical vapor deposition (LPCVD), or plasma enhanced chemical vapor deposition (PECVD).
  • LPCVD low pressure chemical vapor deposition
  • PECVD plasma enhanced chemical vapor deposition
  • the thickness of the silicon dioxide layer is 2 nm to 10 nm.
  • the silicon-oxygen tetrahedral structure in the silicon dioxide layer has a good match with the silicon in the semiconductor silicon substrate, and can provide excellent passivation and protection.
  • the thickness of the oxide layer is thin, which can prevent subsequent deposition processes. Excessive hydrogen ions penetrate into the semiconductor silicon substrate, causing a serious photothermal-induced attenuation LeTID effect.
  • a mask when forming the first passivation layer, is used to block the second doped region so that the hollowed region of the mask coincides with the first doped region, and then the second doped region is deposited in the hollowed region.
  • the above-mentioned first passivation layer is a negatively charged passivation layer
  • the first passivation layer may include a single layer or a multi-layer stack of aluminum oxide, gallium oxide, aluminum oxide + silicon nitride, gallium oxide + silicon nitride, etc. structure.
  • a mask is used to shield the first doped region so that the hollowed region overlaps the second doped region, and then the hollowed region is deposited corresponding to the second doped region. passivation film to form a second passivation layer.
  • the above-mentioned second passivation layer is a positively charged passivation layer
  • the second passivation layer may include a single layer or a multi-layer stacked structure such as silicon oxide, silicon nitride, hydrogenated amorphous silicon, etc.
  • the thicknesses of the first passivation layer and the second passivation layer are both 60 nm to 200 nm.
  • the steps of forming the first heavily doped region and the first heavily doped region include: selective emitter laser doping of the backside of the semiconductor substrate with P-type ions to form the first In the heavily doped area, it is preferred to use a 355nm picosecond laser with a pulse width of 10 to 20 ps and an operating frequency of 10 to 80 MHz; N-type ions are used to selectively emitter laser dope the back side of the semiconductor substrate to form the third For the double doped region, it is preferred to use a 532nm nanosecond laser with a pulse width of 6 to 20ns and a frequency of 50 to 200KHz.
  • SE laser is used to heavily dope the first doping region and the second doping region, with a doping concentration of 10 20 -10 22 cm -3 .
  • This step combines the more mature SE in PERC with The technology is introduced into the back contact battery to form a heavily doped area, enhance ohmic contact, reduce series resistance, and reduce the probability of carrier recombination.
  • the boron emitter in the first doped region and the phosphorus emitter in the second doped region have different characteristics, different lasers are used for doping to form the first heavily doped region and the second heavily doped region.
  • the phosphorus emitter generally uses nanosecond-level 532 green light.
  • the surface concentration of the boron emitter is low and the junction is relatively deep.
  • the solubility of boron in borosilicate glass is greater than that of silicon, so more laser energy is needed to transfer boron to silicon.
  • excessive nanosecond laser energy will cause damage to the silicon wafer, so picosecond lasers need to be used for boron doping.
  • the above manufacturing method further includes: forming a front surface field or a front floating junction on the front side of the semiconductor substrate.
  • the positive surface field is the P + -type region formed by boron doping.
  • the positive surface field is It is a phosphorus-doped N + type region.
  • the front-side floating junction when the semiconductor substrate is P-type doped, the front-side floating junction is an N-type region formed by phosphorus doping. When the semiconductor substrate is N-type doped, the front-side floating junction is an N-type region formed by phosphorus doping. Boron doped P-type region.
  • screen printing + thermal propulsion, ion implantation and diffusion can also be used to form the above-mentioned front surface field or front floating junction.
  • an anti-reflection film is formed on the side of the front surface field or front floating junction away from the semiconductor substrate, and the anti-reflection film is disposed on the semiconductor substrate.
  • the front side it can effectively reduce the reflectivity of the cell, allowing more light to be absorbed by the semiconductor silicon substrate, reducing energy waste, thereby improving the conversion efficiency of the solar cell.
  • the above-mentioned anti-reflection film may include materials with anti-reflection function such as magnesium fluoride, silicon nitride, silicon oxide, etc.
  • the thickness of the anti-reflection film is 60 to 150 nm.
  • the refractive index of the anti-reflective film is 1.8 to 2.5.
  • the manufacturing method of the solar cell structure also includes backside metallization, that is, printing the same or different types of paste on the side of the first doped region and the second doped region away from the semiconductor silicon substrate. material to form the back metal electrode.
  • the metal electrode can be formed by laser transfer, screen printing, electroplating, etc.
  • the above-mentioned paste can include silver paste, penetrating aluminum paste or silver-aluminum paste.
  • the manufacturing method further includes sintering to form the final solar cell structure.
  • This embodiment provides a method for manufacturing a solar cell structure, which includes the following steps:
  • S2 Etch the back of the P-type semiconductor silicon substrate to form a groove P area and an N area outside the groove.
  • the depth of the groove is 20 ⁇ m.
  • S3 Use a 355nm picosecond laser with a pulse width of 10-20ps and a frequency of 10-80MHz to dope the P region.
  • the doping concentration is 10 21 cm -3 to form a heavily doped P + region; use a 532nm nanosecond laser.
  • Class laser with a pulse width of 6-20ns and a frequency of 50-200KHz, is used to dope the N region with a doping concentration of 10 21 cm -3 to form a heavily doped N + region;
  • S6 Use a mask to cover the N area so that the hollow area coincides with the P area, and then use plasma enhanced chemical vapor deposition (PECVD) to deposit an aluminum oxide + silicon nitride passivation layer.
  • PECVD plasma enhanced chemical vapor deposition
  • the thickness of aluminum oxide is 10nm and the thickness of silicon nitride is 80nm;
  • S7 Use a mask to cover the P area so that the hollow area overlaps the N area, and then deposit a silicon nitride passivation layer using plasma enhanced chemical vapor deposition (PECVD).
  • PECVD plasma enhanced chemical vapor deposition
  • PCVD plasma enhanced chemical vapor deposition
  • S9 Print silver paste on both the N area and P area on the back side of the P-type semiconductor silicon substrate to form N area electrodes and P area electrodes;
  • Example 1 The difference between this comparative example and Example 1 is that there is no step S4, that is, there is no front surface field.
  • Example 1 The difference between this comparative example and Example 1 is that there is no step S5, that is, there is no silicon dioxide layer on the back side.
  • step S3 that is, there is no heavily doped region on the first doped region and the second doped region on the back side.
  • PECVD plasma enhanced chemical vapor deposition
  • Uov is the open circuit voltage
  • Isc is the short circuit current
  • FF is the fill factor
  • Example 1 has varying degrees of efficiency advantages compared to Comparative Example 1, Comparative Example 3 and Comparative Example 4, indicating that positive surface field FSF, heavy doping and zoned passivation are effective in The battery has advantages in open circuit voltage, short circuit current and conversion efficiency.
  • NCell is the conversion efficiency
  • Example 1 decreases less than that of Comparative Example 2, indicating that the silicon dioxide layer has a certain improvement effect on LeTID.
  • the above-mentioned embodiments of the present disclosure achieve the following technical effects: by adding a first layer with a higher doping concentration on the basis of the above-mentioned first doped region and the above-mentioned second doped region.
  • the doped region and the second heavily doped region can enhance the ohmic contact of the device, reduce the series resistance, and reduce the probability of carrier recombination; at the same time, because the solar cell structure has a first passivation layer with a fixed negative charge and a fixed positive charge
  • the second passivation layer of charges realizes zoned passivation of the first doped region and the second doped region, improves the collection efficiency of photogenerated carriers, and thereby improves the conversion efficiency of the solar cell structure.

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Abstract

本公开提供了一种太阳能电池结构及其制作方法。该太阳能电池结构包括：半导体衬底，半导体衬底的背面形成有第一掺杂区和第二掺杂区；第一重掺杂区，形成于半导体衬底中，且第一重掺杂区接触设置于第一掺杂区远离背面的一侧，第一重掺杂区与第一掺杂区均为P型掺杂，并大于第一掺杂区的掺杂浓度；第二重掺杂区，形成于半导体衬底中，且第二重掺杂区接触设置于第二掺杂区远离背面的一侧，第二重掺杂区与第二掺杂区均为N型掺杂，并大于第二掺杂区的掺杂浓度；具有固定负电荷的第一钝化层，形成于第一掺杂区远离第一重掺杂区的一侧；具有固定正电荷的第二钝化层，形成于第二掺杂区远离第二重掺杂区的一侧。上述太阳能电池结构具有较高的转换效率。

Description

太阳能电池结构及其制作方法 技术领域
本公开涉及光伏技术领域，具体而言，涉及一种太阳能电池结构及其制作方法。
背景技术
随着低碳能源和绿色环境成为全球发展的大方向，我国亟需使用新能源来替代传统的化石燃料，太阳能以其安全可靠、分布广泛及成本低等优势，成为最具有发展前景的能源之一。全背接触(Back Contact，BC)太阳能电池相较于目前产业化主流的PERC晶硅太阳能技术有着明显的优势。全背接触电池最大的特点是发射极和金属接触都处于电池的背面，正面没有金属电极的遮挡，因此具有更高的短路电流Jsc，同时背面可以容许较宽的金属栅线来降低串联电阻Rs从而提高填充因子FF，并且这种正面无遮挡的电池不仅转换效率高，而且看上去更美观，深受欧洲屋顶市场的追捧，成为下一代技术革命研究的热点。
基于全背接触太阳能电池的XBC电池，PN结和电极均在背部，这会导致电池内部，尤其是在正面产生的光生载流子需要传输一整个硅片的厚度才能被分离收集起来，因此电池背面的钝化至关重要。然而，目前全背接触太阳能电池中的背面钝化层易导致转换效率降低。
发明内容
本公开的主要目的在于提供一种太阳能电池结构及其制作方法，以解决现有技术中全背接触式太阳能电池的转换效率较低的问题。
为了实现上述目的，根据本公开的一个方面，提供了一种太阳能电池结构，包括：半导体衬底，半导体衬底的背面形成有第一掺杂区和第二掺杂区；第一重掺杂区，形成于半导体衬底中，且第一重掺杂区接触设置于第一掺杂区远离背面的一侧，第一重掺杂区与第一掺杂区均为P型掺杂，且第一重掺杂区的掺杂浓度大于第一掺杂区的掺杂浓度；第二重掺杂区，形成于半导体衬底中，且第二重掺杂区接触设置于第二掺杂区远离背面的一侧，第二重掺杂区与第二掺杂区均为N型掺杂，且第二重掺杂区的掺杂浓度大于第二掺杂区的掺杂浓度；第一钝化层，形成于第一掺杂区远离第一重掺杂区的一侧，第一钝化层具有固定负电荷；第二钝化层，至少形成于第二掺杂区远离第二重掺杂区的一侧，第二钝化层具有固定正电荷。
可选地，半导体衬底的背面具有凹槽，第一掺杂区形成于背面中与凹槽对应的区域，第二掺杂区形成于背面中位于凹槽两侧的区域，第一钝化层形成于凹槽中，优选凹槽深度为10～100μm。
可选地，第二钝化层中的一部分形成于第二掺杂区远离第二重掺杂区的一侧，第二钝化层中的另一部分形成于第一钝化层远离第一掺杂区的一侧。
可选地，第一掺杂区和第二掺杂区的掺杂浓度独立地选自10 18～10 20cm -3；第一重掺杂区和第二重掺杂区的掺杂浓度独立地选自10 20～10 22cm -3。
可选地，第一掺杂区和第二掺杂区为多晶硅掺杂结构，太阳能电池结构还包括：隧穿氧化层，覆盖于多晶硅掺杂结构的远离第一钝化层和第二钝化层的一侧表面，优选隧穿氧化层的厚度为1～2nm。
可选地，第一钝化层包括氧化铝层、氧化镓层、氧化铝与氮化硅的叠层以及氧化镓与氮化硅的叠层中的任一种或多种。
可选地，第二钝化层包括氮化硅层和/或氢化非晶硅层。
可选地，半导体衬底为硅衬底，太阳能电池结构还包括：二氧化硅层，二氧化硅层覆盖于背面，二氧化硅层中的一部分位于第一掺杂区与第一钝化层之间，二氧化硅层中的另一部分位于第二掺杂区与第二钝化层之间，优选二氧化硅层的厚度为2～10nm。
可选地，太阳能电池结构还包括：正表面场，形成于半导体衬底的正面，半导体衬底为掺杂衬底，正表面场与掺杂衬底的掺杂类型相同，且正表面场的掺杂浓度大于掺杂衬底的掺杂浓度；或正面浮动结，形成于半导体衬底的正面，半导体衬底为掺杂衬底，正面浮动结与掺杂衬底的掺杂类型相反，且正面浮动结的掺杂浓度大于掺杂衬底的掺杂浓度。
根据本公开的另一方面，提供了一种上述的太阳能电池结构的制作方法，包括以下步骤：在半导体衬底的背面形成第一掺杂区和第二掺杂区；在半导体衬底中形成第一重掺杂区和第一重掺杂区，第一重掺杂区与第一掺杂区远离背面的一侧接触，第二重掺杂区与第二掺杂区远离背面的一侧接触，其中，第一重掺杂区与第一掺杂区均为P型掺杂，第二重掺杂区与第二掺杂区均为N型掺杂，且第一重掺杂区的掺杂浓度大于第一掺杂区的掺杂浓度，第二重掺杂区的掺杂浓度大于第二掺杂区的掺杂浓度；在第一掺杂区远离第一重掺杂区的一侧形成第一钝化层，第一钝化层具有固定负电荷；至少在第二掺杂区远离第二重掺杂区的一侧形成第二钝化层，第二钝化层具有固定正电荷。
可选地，形成第一掺杂区和第二掺杂区的步骤包括：在半导体衬底的背面沉积本征多晶硅材料，并分别对多晶硅材料进行N型离子扩散和P型离子扩散，以形成第一掺杂区和第二掺杂区；或分别采用N型离子和P型离子对半导体衬底的背面进行原位掺杂，以形成第一掺杂区和第二掺杂区，其中，半导体衬底为多晶硅衬底。
可选地，在形成第一掺杂区和第二掺杂区的步骤之前，制作方法还包括以下步骤：在半导体衬底的背面形成隧穿氧化层，在形成第一钝化层和第二钝化层的步骤之后，隧穿氧化层中的一部分与第一钝化层位于第一掺杂区的两侧，隧穿氧化层中的另一部分与第二钝化层位于第二掺杂区的两侧。
可选地，在形成第一掺杂区和第二掺杂区的步骤之前，制作方法还包括以下步骤：对半导体衬底的背面进行刻蚀，以形成凹槽；在形成第一掺杂区和第二掺杂区的步骤中，在背面中与凹槽对应的区域形成第一掺杂区，在背面中位于凹槽两侧的区域形成第二掺杂区。
可选地，形成第一钝化层和第二钝化层的步骤包括：在半导体衬底的背面覆盖二氧化硅层，以使二氧化硅层中的一部分覆盖凹槽的底面和内壁并与第一掺杂区接触，二氧化硅层中的另一部分与第二掺杂区接触；在凹槽中形成第一钝化层；在第一钝化层和二氧化硅层表面覆盖第二钝化层。
可选地，形成第一重掺杂区和第一重掺杂区的步骤包括：采用P型离子对半导体衬底的背面进行选择性发射极激光掺杂，以形成第一重掺杂区，优选采用355nm的皮秒级激光，脉冲宽度为10～20ps，工作频率为10～80MHz；采用N型离子对半导体衬底的背面进行选择性发射极激光掺杂，以形成第二重掺杂区，优选采用532nm的纳秒级激光，脉冲宽度为6～20ns，工作频率50～200KHz。
应用本公开的技术方案，提供了一种包括半导体衬底的太阳能电池结构，半导体衬底的背面形成有第一掺杂区和第二掺杂区，太阳能电池结构还包括形成于半导体衬底中的第一重掺杂区和第一重掺杂区，第一重掺杂区接触设置于第一掺杂区远离背面的一侧，第一重掺杂区与第一掺杂区均为P型掺杂，且第一重掺杂区的掺杂浓度大于第一掺杂区的掺杂浓度，第二重掺杂区接触设置于第二掺杂区远离背面的一侧，第二重掺杂区与第二掺杂区均为N型掺杂，且第二重掺杂区的掺杂浓度大于第二掺杂区的掺杂浓度，通过在上述第一掺杂区和上述第二掺杂区的基础上增加掺杂浓度更高的第一重掺杂区和第二重掺杂区，能够增强器件的欧姆接触，降低串联电阻，减少载流子复合几率；同时，由于阳能电池结构还包括具有固定负电荷的第一钝化层以及具有固定正电荷的第二钝化层，第一钝化层形成于第一掺杂区远离第一重掺杂区的一侧，第二钝化层至少形成于第二掺杂区远离第二重掺杂区的一侧，从而实现了对P/N区的分区钝化，提高了光生载流子的收集效率，进而提高了上述太阳能电池结构的转换效率。
附图说明
构成本公开的一部分的说明书附图用来提供对本公开的进一步理解，本公开的示意性实施例及其说明用于解释本公开，并不构成对本公开的不当限定。在附图中：
图1示出了根据本公开实施例提供的一种太阳能电池结构的结构示意图；
图2示出了根据本公开实施例提供的另一种太阳能电池的结构示意图。
其中，上述附图包括以下附图标记：
1、半导体衬底；2、正表面场；3、减反膜；4、第一掺杂区；41、硼掺杂多晶硅；5、第一重掺杂区；6、第二掺杂区；61、磷掺杂多晶硅；7、第二重掺杂区；8、二氧化硅层；9、第一钝化层；10、第二钝化层；11、第二电极；12、第一电极；13、隧穿氧化层。
具体实施方式
需要说明的是，在不冲突的情况下，本公开中的实施例及实施例中的特征可以相互组合。下面将参考附图并结合实施例来详细说明本公开。
为了使本技术领域的人员更好地理解本公开方案，下面将结合本公开实施例中的附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分的实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都应当属于本公开保护的范围。
需要说明的是，本公开的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的数据在适当情况下可以互换，以便这里描述的本公开的实施例。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，例如，包含了一系列步骤或单元的过程、方法、系统、产品或设备不必限于清楚地列出的那些步骤或单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它步骤或单元。
正如背景技术中提到的，全背接触电池最大的特点是发射极和金属接触都处于电池的背面，但也正是因为其PN结和电极均在背部，将会导致电池内部，尤其是在正面产生的光生载流子需要传输一整个硅片的厚度才能被分离收集起来，然而，目前全背接触太阳能电池中的背面钝化层易导致转换效率降低。
本公开的申请人为了解决上述技术问题，提出一种太阳能结构，如图1所示，该结构包括半导体衬底1、第一重掺杂区5、第二重掺杂区7、第一钝化层9、第二钝化层10，其中，半导体衬底1的背面形成有第一掺杂区4和第二掺杂区6；第一重掺杂区5形成于半导体衬底1中，且第一重掺杂区5接触设置于第一掺杂区4远离背面的一侧，第一重掺杂区5与第一掺杂区4均为P型掺杂，且第一重掺杂区5的掺杂浓度大于第一掺杂区4的掺杂浓度；第二重掺杂区7形成于半导体衬底1中，且第二重掺杂区7接触设置于第二掺杂区6远离背面的一侧，第二重掺杂区7与第二掺杂区6均为N型掺杂，且第二重掺杂区7的掺杂浓度大于第二掺杂区6的掺杂浓度；第一钝化层9形成于第一掺杂区4远离第一重掺杂区5的一侧，第一钝化层9具有固定负电荷；第二钝化层10至少形成于第二掺杂区6远离第二重掺杂区7的一侧，第二钝化层10具有固定正电荷。
上述结构中，由于对应第一掺杂区4和第二掺杂区6分别接触设置了第一重掺杂区5和第二重掺杂区7，其第一重掺杂区5的掺杂浓度大于第一掺杂区4的掺杂浓度，第二重掺杂区7的掺杂浓度大于第二掺杂区6的掺杂浓度，这种设置增强了器件的欧姆接触，降低了器件中船串联电阻的阻值，进而减少了载流子的复合速率，能够提高短路电流，从而有利于提升太阳能电池的转换功率。
上述结构中，还由于设置了第一钝化层9和第二钝化层10，分别对第一掺杂区4和第二掺杂区6实现了分区钝化，其中，第一钝化层9中带有大量的负电荷，第二钝化层10中带有大量的正电荷，能够避免目前常规钝化方式中，带负电荷的氧化铝钝化层在N区形成一个反 型层，不利于电子收集的现象，从而提高了光生载流子的收集速率，起到优异的场钝化效果，进而提高了太阳能电池结构的转换效率。
在一些可实施的方式中，上述半导体衬底1的背面具有凹槽，第一掺杂区4形成于背面中与凹槽对应的区域，第二掺杂区6形成于背面中位于凹槽两侧的区域，第一钝化层9形成于凹槽中，优选凹槽深度为10μm～100μm。由于全背接触太阳能电池中的P区和N区呈叉指状间隔排列在电池内部，容易发生电池漏电的现象，本实施例中通过开设凹槽，将P区与N区利用高度差的形成物理隔离，从而避免漏电的产生。
在一些可选的实施方式中，上述半导体衬底1为硅衬底，由于全背接触太阳能电池的PN结的位置处于电池背面，而光生载流子主要是在电池的前表面产生，其需要穿过具有一定厚度的半导体衬底1到达背面发射极。为了减少期间光生载流子的复合，就需要衬底具有较长的少子扩散长度，因此制备高效全背接触太阳能电池采用高质量的单晶硅片。
其中，该半导体衬底1的衬底硅片既可以是P型硅片，也可以是N型硅片。选用不同类型的衬底硅片后，其在电池的掺杂上会有所不同。如果选用N型硅片，则在电池背面一定区域硼掺杂形成P +区，作为发射极。如果选用P型硅片，则电池背面一定区域进行磷掺杂形成N +区，作为发射极，与硅片基底形成PN结。相对P型硅片，N型硅片具有少子寿命高、无光衰、弱光性能好等优点，但P型硅片在成本端具备优势。
在一些可选的实施方式中，上述第二钝化层10中的一部分形成于第二掺杂区6远离第二重掺杂区7的一侧，第二钝化层10中的另一部分形成于第一钝化层9远离第一掺杂区4的一侧。其中，第二掺杂区6为N型掺杂，形成于第二掺杂区6远离第二重掺杂区7一侧的一部分第二钝化层10由于第二钝化层10具有较高固定正电荷密度，能够通过屏蔽N型掺杂区表面的少子电子而表现出显著的场效应钝化特性，形成于第一钝化层9远离第一掺杂区4的一侧的另一部分第二钝化层10，也由于在第一掺杂区4和第二钝化层10之间具有第一钝化层9，避免了带正电荷的第二钝化层10在P区形成一个反型层，不利于电子收集的现象，从而提高了光生载流子的收集速率，起到优异的场钝化效果，进而提高了太阳能电池结构的转换效率。
在一些可选的实施方式中，上述太阳能电池结构中第一掺杂区4和第二掺杂区6的掺杂浓度独自地选自10 18cm -3～10 20cm -3，第一重掺杂区5和第二重掺杂区7的掺杂浓度独立地选自10 20cm -3～10 22cm -3。通过设置第一重掺杂区5的浓度高于第一掺杂区4，第二重掺杂区7的掺杂浓度高于第二掺杂区6的浓度，增强了器件的欧姆接触，降低了器件中串联电阻的阻值，进而减少了载流子的复合速率，能够提高短路电流，从而有利于提升太阳能电池的转换功率。
在一些可选的实施方式中，如图2所示，第一掺杂区4和第二掺杂区6为多晶硅掺杂结构，该太阳能电池结构还包括隧穿氧化层13，该隧穿氧化层13覆盖于多晶硅掺杂结构的远离第一钝化层9和第二钝化层10的一侧表面，优选隧穿氧化层13的厚度为1nm～2nm。上述多晶硅掺杂结构和隧穿氧化层13共同构成太阳能电池的背面钝化接触结构，这种结构使得太阳能电池具有更低的载流子复合率，更好的接触，从而获得更高的转化效率。
示例性的，上述第一掺杂区4为硼掺杂多晶硅41，上述第二掺杂区6为磷掺杂多晶硅61，如图2所示。
其中，隧穿氧化层13可以为氧化硅层，其可以使多数载流子隧穿进入多晶硅掺杂结构同时阻挡少数载流子复合，超薄氧化硅和重掺杂区良好的钝化效果使得硅片表面能带产生弯曲，从而形成场钝化效果，电子隧穿的几率大幅增加，接触电阻下降，提升了电池的开路电压和短路电流，从而提升电池转化效率。
在一些可选的实施方式中，第一钝化层9包括氧化铝层、氧化镓层、氧化铝与氧化硅的叠层以及氧化镓与氮化硅的叠层中的任一种或多种。
在一些可选的实施方式中，第二钝化层10包括氮化硅层和/或氢化非晶硅层。
在一些可选的实施方式中，上述太阳能电池结构还包括二氧化硅层8，二氧化硅层8覆盖于背面，二氧化硅层8中的一部分位于第一掺杂区4与第一钝化层9之间，二氧化硅层8中的另一部分位于第二掺杂区6与第二钝化层10之间，优选二氧化硅层8的厚度为2nm～10nm。通过在第一掺杂区4与第一钝化层9以及第二掺杂区6与第二钝化层10之间引入设置二氧化硅层8，由于钝化层中具有一定含量的氢，其中氧化铝层的含氢量约在2％～4％，当钝化层的钝化性在退火过程中被激活时，硅表面的结晶性发生变化，由微晶非晶混合转变为多晶，同时，钝化层中的氢离子将扩散到界面，该二氧化硅层8能够有效阻止过量的氢离子渗透到半导体硅衬底中，从而避免引发较为严重的光热致衰减LeTTD效应。
在一些可实施的方式中，上述太阳能电池结构还包括正表面场2，该正表面场2形成于半导体衬底1的正面，该半导体衬底1为掺杂衬底，正表面场2与掺杂衬底的掺杂类型相同。
其中，上述正表面场2的掺杂浓度大于半导体衬底1的掺杂浓度，利用正表面场2与半导体衬底1的高低浓度差，可以有利于载流子向太阳能电池的背面移动并在背面进行收集。
在另一些可实施的方式中，上述太阳能电池结构还包括正面浮动结(图中未示出)，该正面浮动结形成于半导体衬底1的正面，该半导体衬底1为掺杂衬底，正面浮动结与掺杂衬底的掺杂类型相反。
其中，上述正面浮动结的掺杂浓度大于半导体衬底1的掺杂浓度，利用正面浮动结与半导体衬底1的高低浓度差，起到辅助分离载流子的功能，从而增强载流子收集效率。
在一些可选的实施方式中，上述太阳能电池结构还包括减反膜3，该减反膜3设置于正表面场2或正面浮动结远离半导体衬底1的一侧，即设置于半导体衬底1的正面，如图1和图2所示。上述减反膜3可以有效降低电池片的反射率，使更多的光被硅基体所吸收。
在一些可选的实施方式中，在半导体衬底1的背面设置有第一电极12和第二电极11，第一电极12与第一掺杂区4接触，第二电极11与第二掺杂区6接触。示例性的，如图1和图2所示，上述第一电极12顺序贯穿第二钝化层10、第一钝化层9以及二氧化硅层8至第一掺杂区4，上述第二电极11顺序贯穿第二钝化层10和二氧化硅层8至第二掺杂区6。
为了形成上述太阳能电池结构，根据本公开的另一方面，还提出一种太阳能电池结构的制作方法，包括以下步骤：在半导体衬底的背面形成第一掺杂区和第二掺杂区；在半导体衬底中形成第一重掺杂区和第一重掺杂区，第一重掺杂区与第一掺杂区远离背面的一侧接触，第二重掺杂区与第二掺杂区远离背面的一侧接触，其中，第一重掺杂区与第一掺杂区均为P型掺杂，第二重掺杂区与第二掺杂区均为N型掺杂，且第一重掺杂区的掺杂浓度大于第一掺杂区的掺杂浓度，第二重掺杂区的掺杂浓度大于第二掺杂区的掺杂浓度；在第一掺杂区远离第一重掺杂区的一侧形成第一钝化层，第一钝化层具有固定负电荷；至少在第二掺杂区远离第二重掺杂区的一侧形成第二钝化层，第二钝化层具有固定正电荷。
下面将更详细地描述根据本公开提供的一种太阳能电池结构的制作方法的示例性实施方式。然而，这些示例性实施方式可以由多种不同的形式来实施，并且不应当被解释为只限于这里所阐述的实施方式。应当理解的是，提供这些实施方式是为了使得本申请的公开彻底且完整，并且将这些示例性实施方式的构思充分传达给本领域普通技术人员。
在一些可实施的方式中，上述半导体衬底为硅衬底，对上述硅衬底的硅片表面进行制绒处理，以去除硅片表面的损伤层，减少硅片表面复合中心，同时在硅片表面形成绒面，该绒面可以增加太阳光的吸收减少反射，从而提高短路电流，有利于提升太阳能电池的转换效率。
其中，上述半导体硅衬底可以为N型硅衬底，也可以为P型硅衬底。
在一些可选的实施方式中，上述半导体衬底的电阻率为0.3Ω·cm～3Ω·cm。
在一些可选的实施方式中，上述半导体衬底的厚度为150μm～180μm。
在一些可选的实施方式中，对上述硅衬底进行背抛光工艺，硅片背抛光后，利用镜面反射原理，光的背面反射率增加，透射损失减小，从而增加了输出电流。同时由于抛光后背面的比表面积较少，使得背表面复合速率减小，硅片少子寿命显著提升。
在一些可选的实施方式中，在上述半导体衬底的背面沉积本征多晶硅材料，并分别对多晶硅材料进行N型离子扩散和P型离子扩散，以形成第一掺杂区和第二掺杂区；或分别采用N型离子和P型离子对半导体衬底的背面进行原位掺杂，以形成第一掺杂区和第二掺杂区，其中，半导体衬底为多晶硅衬底。
在一些可选的实施方式中，分别形成掺硼的第一掺杂区和掺磷的第二掺杂区，且上述第一掺杂区和第二掺杂区为交叉排列在半导体衬底背面区域，进一步可选的，上述第一掺杂区和第二掺杂区的有效掺杂浓度为10 18cm -3～10 20cm -3，相应第一掺杂区和第二掺杂区的宽度为400μm～2000μm，在该实施例中，能有效降低载流子扩散过程中的复合损失，从而提高太阳能电池的转换效率。
其中，上述第一掺杂区和第二掺杂区的掺杂厚度均为60nm～200nm，且第一掺杂区和第二掺杂区均可通过低压化学气相沉积(LPCVD)、等离子体增强化学气相沉积法(PECVD)、物理气相沉积(PVD)、常压化学气相沉积(APCVD)等方式形成。
在一些可选的实施方式中，上述第一掺杂区和第二掺杂区采用丝网印刷+热推进的方式形成。即用丝网印刷的方式在第一掺杂区印刷含硼浆料，在第二掺杂区印刷含磷浆料，随后在高温条件下，里面的硼原子和磷原子推进至半导体硅衬底中形成第一掺杂区和第二掺杂区。
在一些可选的实施方式中，上述第一掺杂区和第二掺杂区采用掩膜板+两次离子注入的方式形成。即用掩膜板遮住不需要的区域，用离子腔将相应的硼原子和磷原子注入半导体硅衬底中，随后进行高温推进过程形成相应的第一掺杂和第二掺杂区。
在一些可选的实施方式中，上述第一掺杂区和第二掺杂区采用热扩散的方式形成。其中，形成第一掺杂区用到的气体为三溴化硼或者三氯化硼，形成第二掺杂区用到的气体为三氯氧磷。进一步可选地，在进行热扩散的过程中，采用两次掩膜+清洗的过程。即形成第一掺杂区时，用掩膜遮住第二掺杂区区域，随后通入三溴化硼或三氯化硼进行热扩散，扩散温度为900℃～1100℃，最后进行掩膜的清洗。形成第二掺杂区时，用掩膜遮住第一掺杂区区域，随后通入三氯氧磷进行热扩散，扩散温度为700℃～900℃，最后进行掩膜的清洗。
在一些可选的实施方式中，形成第一掺杂区和第二掺杂区的步骤之前，该太阳能电池结构的制作方法还包括在半导体衬底的背面形成隧穿氧化层，在形成第一钝化层和第二钝化层的步骤之后，隧穿氧化层中的一部分与第一钝化层位于第一掺杂区的两侧，隧穿氧化层中的另一部分与第二钝化层位于第二掺杂区的两侧。
其中，该隧穿氧化层可以与上述多晶硅衬底共同构成太阳能电池的背面钝化接触结构，形成背面全区域钝化，进一步提升了太阳能电池的转换效率。
在一些可选的实施方式中，该隧穿氧化层为二氧化硅结构，其厚度为1cm～2cm。
其中，可以采用热氧化、臭氧氧化、湿法氧化、低压化学气相沉积(LPCVD)、等离子体增强化学气相沉积法(PECVD)、物理气相沉积(PVD)、常压化学气相沉积(APCVD)等方式形成上述隧穿氧化层。
在一些可选的实施方式中，在形成第一掺杂区和第二掺杂区的步骤之前，上述太阳能电池结构的制作方法还包括对半导体衬底的背面进行刻蚀，以形成凹槽，在形成第一掺杂区和第二掺杂区的步骤中，在背面中与凹槽对应的区域形成第一掺杂区，在背面中位于凹槽两侧的区域形成第二掺杂区。
其中，由于第一掺杂区和第二掺杂区呈交叉排列，为了避免电池漏电，可以采用激光开槽形成凹槽，进而在凹槽中形成第一掺杂区，以使第一掺杂区和第二掺杂区之间具有一定的高度差，从而进行有效的物理隔离，且采用凹槽隔离的第一掺杂区和第二掺杂区之间的空隙区域较小，能够使得表面具有良好的钝化效果，从而避免少数载流子的复合，太宽可能会导致背接触电池的有效面积被浪费，有效载流子也难以被收集，从而降低电池性能。
在一些可选的实施方式中，上述凹槽的开槽深度为10μm～100μm。
在一些可选的实施方式中，形成第一钝化层和第二钝化层的步骤包括：在半导体衬底的背面覆盖二氧化硅层，以使二氧化硅层中的一部分覆盖凹槽的底面和内壁并与第一掺杂区接触，二氧化硅层中的另一部分与第二掺杂区接触；在凹槽中形成第一钝化层；在第一钝化层和二氧化硅层表面覆盖第二钝化层。
其中，上述二氧化硅层可以采用热氧化、低压化学气相沉积(LPCVD)、等离子体增强化学气相沉积法(PECVD)的方式形成，可选地，该二氧化硅层的厚度为2nm～10nm。
上述二氧化硅层中的硅氧四面体结构和半导体硅衬底中的硅的匹配性较好，能提供优异的钝化和保护作用，且该氧化层厚度较薄，可阻止后续沉积过程中过多的氢离子渗透到半导体硅衬底中从而引发较为严重的光热致衰减LeTID效应。
在一些可选的实施方式中，形成第一钝化层时，利用掩膜板遮挡第二掺杂区，使掩膜板的镂空区域与第一掺杂区重合，随后在镂空区域沉积与第一掺杂区对应的钝化膜，以形成第一钝化层。
其中，上述第一钝化层为带负电的钝化层，该第一钝化层可以包括氧化铝、氧化镓、氧化铝+氮化硅、氧化镓+氮化硅等单层或多层堆叠结构。
在一些可是实施的方式中，形成第二钝化层时，利用掩模板遮挡第一掺杂区，使其镂空区域与第二掺杂区重合，随后在镂空区域沉积于第二掺杂区对应的钝化膜，以形成第二钝化层。
其中，上述第二钝化层为带正电的钝化层，该第二钝化层可以包括氧化硅、氮化硅、氢化非晶硅等单层或多层堆叠结构。
在一些可选的实施方式中，上述第一钝化层和第二钝化层的厚度均为60nm～200nm。
在一些可选的实施方式中，形成第一重掺杂区和第一重掺杂区的步骤包括：采用P型离子对半导体衬底的背面进行选择性发射极激光掺杂，以形成第一重掺杂区，优选采用355nm的皮秒级激光，脉冲宽度为10～20ps，工作频率为10～80MHz；采用N型离子对半导体衬底的背面进行选择性发射极激光掺杂，以形成第二重掺杂区，优选采用532nm的纳秒级激光，脉冲宽度为6～20ns，频率50～200KHz。
在一些可选的实施方式中，利用SE激光进行第一掺杂区和第二掺杂区的重掺，掺杂浓度为10 20-10 22cm -3，该步骤将PERC中较为成熟的SE技术引入到背接触电池中，形成重掺区域，增强欧姆接触，降低串联电阻，减少载流子复合几率。
在一些可选的实施方式中，由于第一掺杂区中的硼发射极和第二掺杂区中的磷发射极有着不同的特性，因此采用不同的激光进行掺杂形成第一重掺杂区和第二重掺杂区。其中，磷发射极一般采用纳秒级别的532绿光，硼发射极表面浓度低，结比较深，且硼在硼硅玻璃中的溶解度大于硅，所以需要更大的激光能量才能使硼向硅片进行扩散，但纳秒级激光能量过大时会造成硅片损伤，因此需要选用皮秒级激光进行硼掺杂。
在一些可选的实施方式中，形成第一重掺杂区和第二重掺杂区的步骤之后，上述制作方法还包括：在半导体衬底的正面形成正表面场或正面浮动结。
在一些可选的实施方式中，当半导体衬底为P型掺杂时，正表面场即为硼掺杂形成的P +型区域，当半导体衬底为N型掺杂时，正表面场即为磷掺杂的N +型区域。
在一些可选的实施方式中，当半导体衬底为P型掺杂时，正面浮动结即为磷掺杂形成的N型区域，当半导体衬底为N型掺杂时，正面浮动结即为硼掺杂的P型区域。
另外，还可以采用丝网印刷+热推进、离子注入以及扩散等方式形成上述正表面场或正面浮动结。
在一些可选的实施方式中，形成上述正表面场或正面浮动结之后，在正表面场或正面浮动结远离半导体衬底的一侧形成减反膜，该减反膜设置在半导体衬底的正面，可以有效降低电池片的反射率，使更多的光被半导体硅衬底所吸收，减少能量的浪费，从而提升太阳能电池的转换效率。
其中，上述减反膜可以包括氟化镁，氮化硅，氧化硅等具有减反功能的材料。
在一些可选的实施方式中，上述减反膜的厚度为60～150nm。
在一些可选的实施方式中，上述减反膜的折射率为1.8～2.5。
在一些可选的实施方式中，太阳能电池结构的制作方法还包括背面金属化，即在第一掺杂区和第二掺杂区远离半导体硅衬底的一侧分别印刷同种或不同种浆料，以形成背面金属电极。
其中，可以采用激光转印、丝网印刷、电镀等方式形成金属电极，且上述浆料可以包括银浆、穿透型铝浆或银铝浆。
在一些可选的实施方式中，形成上述太阳能电池结构之后，该制作方法还包括烧结，以形成最终太阳能电池结构。
实施例1
本实施例提供了一种太阳能电池结构的制作方法，包括以下步骤：
S1：对P型半导体硅衬底进行制绒处理，以去除硅片表面的损伤层，其中，该P型半导体硅衬底的电阻率为0.8Ω·cm，厚度为160μm；
S2：在P型半导体硅衬底的背面刻蚀形成凹槽P区域以及凹槽之外的N区域，该凹槽的深度为20μm，采用丝网印刷+热推进的方式在P区域印刷含硼浆料，并在高温推进下，将硼远离推进P型硅衬底中形成P区，在N区域印刷含磷浆料，并在高温推进下，将磷原子推进P型硅衬底中形成N区，其中，P区和N区的有效掺杂浓度均为10 19cm -3，且P区宽度为600μm，n区的宽度为1000μm；
S3：选用355nm的皮秒级激光，脉冲宽度10-20ps，频率10-80MHz对P区进行掺杂，掺杂浓度为10 21cm -3，形成重掺杂P +区；选用532nm的纳秒级激光，脉冲宽度6-20ns，频率50-200KHz对N区进行掺杂，掺杂浓度为10 21cm -3，形成重掺杂N +区；
S4：在P型半导体硅衬底的正面通入三氯化硼和氧气，在1050℃的高温条件下，采用热扩散的方式推进形成正表面场(Front Surface Field，FSF)，正表面场的掺杂浓度大于半导体硅衬底的掺杂浓度；
S5：采用等离子体增强化学气相沉积法(PECVD)的方式沉积一层5nm的二氧化硅层；
S6：利用掩膜板遮住N区，使其镂空区域与P区重合，随后用等离子体增强化学气相沉积法(PECVD)的方式沉积氧化铝+氮化硅钝化层。氧化铝的厚度为10nm，氮化硅的厚度为80nm；
S7：利用掩膜板遮住P区，使其镂空区域与N区重合，随后用等离子体增强化学气相沉积法(PECVD)的方式沉积氮化硅钝化层。氮化硅的厚度为100nm；
S8：采用等离子体增强化学气相沉积法(PECVD)的方式沉积氮化硅减反膜，厚度为80nm，折射率为2.3；
S9：在P型半导体硅衬底的背面N区和P区均印刷银浆，形成N区电极和P区电极；
S10：烧结。
对比例1
本对比例与实施例1的区别在于没有步骤S4，即没有正表面场。
对比例2
本对比例与实施例1的区别在于没有步骤S5，即背面没有二氧化硅层。
对比例3
本对比例与实施例1的区别在于没有步骤S3，即背面第一掺杂区和第二掺杂区上不存在重掺区域。
对比例4
本对比例与实施例1的区别在于没有步骤S6和S7，即背面第一掺杂区和第二掺杂区不采用分区钝化。而是采用等离子体增强化学气相沉积法(PECVD)在半导体硅衬底背面一整面顺序沉积氧化铝和氮化硅钝化膜，氧化铝厚度为10nm，氮化硅厚度为80nm，进行了全局统一的沉积。
对上述实施例1以及对比例1-4中的太阳能电池结构进行性能测试，得到如表1所示的电性能数据。
表1
  Uoc(V) Isc(A) FF(％) NCell
实施例1 0.6961 13.539 81.61 23.30％
对比例1 0.6959 13.536 81.60 23.28％
对比例2 0.6960 13.541 81.63 23.30％
对比例3 0.6945 13.521 81.35 23.14％
对比例4 0.6941 13.509 81.25 23.08％
上表中，Uov为开路电压，Isc为短路电流，FF为填充因子。
从上表中可以看出，电性能数据中实施例1相比于对比例1、对比例3以及对比例4有不同程度的效率优势，表明正表面场FSF、重掺杂和分区钝化在电池的开路电压、短路电流和转换效率方面有优势。
进一步对上述实施例1与对比例2中的太阳能电池结构进行性能测试，得到如表2所示的光热致衰减LeTID数据(2.5kwh)。
表2
  NCell(初始) NCell(光衰后) 功率下降/％
实施例1 23.30％ 23.22％ 0.34％
对比例2 23.30％ 23.10％ 0.86％
上表中，NCell为转换效率。
从上表中可以看出，实施例1相比于对比例2功率下降较少，表明二氧化硅层对LeTID有一定的改善作用。
从以上的描述中，可以看出，本公开上述的实施例实现了如下技术效果：通过在上述第一掺杂区和上述第二掺杂区的基础上增加掺杂浓度更高的第一重掺杂区和第二重掺杂区，能够增强器件的欧姆接触，降低串联电阻，减少载流子复合几率；同时，由于太阳能电池结构中具有固定负电荷的第一钝化层以及具有固定正电荷的第二钝化层，从而实现了对第一掺杂区和第二掺杂区的分区钝化，提高了光生载流子的收集效率，进而提高了太阳能电池结构的转换效率。
以上所述仅为本公开的优选实施例而已，并不用于限制本公开，对于本领域的技术人员来说，本公开可以有各种更改和变化。凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的保护范围之内。

Claims (15)

  1. 一种太阳能电池结构，包括：
    半导体衬底，所述半导体衬底的背面形成有第一掺杂区和第二掺杂区；
    第一重掺杂区，形成于所述半导体衬底中，且所述第一重掺杂区接触设置于所述第一掺杂区远离所述背面的一侧，所述第一重掺杂区与所述第一掺杂区均为P型掺杂，且所述第一重掺杂区的掺杂浓度大于所述第一掺杂区的掺杂浓度；
    第二重掺杂区，形成于所述半导体衬底中，且所述第二重掺杂区接触设置于所述第二掺杂区远离所述背面的一侧，所述第二重掺杂区与所述第二掺杂区均为N型掺杂，且所述第二重掺杂区的掺杂浓度大于所述第二掺杂区的掺杂浓度；
    第一钝化层，形成于所述第一掺杂区远离所述第一重掺杂区的一侧，所述第一钝化层具有固定负电荷；
    第二钝化层，至少形成于所述第二掺杂区远离所述第二重掺杂区的一侧，所述第二钝化层具有固定正电荷。
  2. 根据权利要求1所述的太阳能电池结构，其中，所述半导体衬底的背面具有凹槽，所述第一掺杂区形成于所述背面中与所述凹槽对应的区域，所述第二掺杂区形成于所述背面中位于所述凹槽两侧的区域，所述第一钝化层形成于所述凹槽中，优选所述凹槽深度为10～100μm。
  3. 根据权利要求2所述的太阳能电池结构，其中，所述第二钝化层中的一部分形成于所述第二掺杂区远离所述第二重掺杂区的一侧，所述第二钝化层中的另一部分形成于所述第一钝化层远离所述第一掺杂区的一侧。
  4. 根据权利要求1所述的太阳能电池结构，其中，
    所述第一掺杂区和所述第二掺杂区的掺杂浓度独立地选自10 18～10 20cm -3；
    所述第一重掺杂区和所述第二重掺杂区的掺杂浓度独立地选自10 20～10 22cm -3。
  5. 根据权利要求1所述的太阳能电池结构，其中，所述第一掺杂区和所述第二掺杂区为多晶硅掺杂结构，所述太阳能电池结构还包括：
    隧穿氧化层，覆盖于所述多晶硅掺杂结构的远离所述第一钝化层和所述第二钝化层的一侧表面，优选所述隧穿氧化层的厚度为1～2nm。
  6. 根据权利要求1所述的太阳能电池结构，其中，所述第一钝化层包括氧化铝层、氧化镓层、氧化铝与氮化硅的叠层以及氧化镓与氮化硅的叠层中的任一种或多种。
  7. 根据权利要求1所述的太阳能电池结构，其中，所述第二钝化层包括氮化硅层和/或氢化非晶硅层。
  8. 根据权利要求1至7中任一项所述的太阳能电池结构，其中，所述半导体衬底为硅衬底，所述太阳能电池结构还包括：
    二氧化硅层，所述二氧化硅层覆盖于所述背面，所述二氧化硅层中的一部分位于所述第一掺杂区与所述第一钝化层之间，所述二氧化硅层中的另一部分位于所述第二掺杂区与所述第二钝化层之间，优选所述二氧化硅层的厚度为2～10nm。
  9. 根据权利要求1至7中任一项所述的太阳能电池结构，其中，所述太阳能电池结构还包括：
    正表面场，形成于所述半导体衬底的正面，所述半导体衬底为掺杂衬底，所述正表面场与所述掺杂衬底的掺杂类型相同，且所述正表面场的掺杂浓度大于所述掺杂衬底的掺杂浓度；或
    正面浮动结，形成于所述半导体衬底的正面，所述半导体衬底为掺杂衬底，所述正面浮动结与所述掺杂衬底的掺杂类型相反，且所述正面浮动结的掺杂浓度大于所述掺杂衬底的掺杂浓度。
  10. 一种权利要求1至9中任一项所述的太阳能电池结构的制作方法，包括以下步骤：
    在半导体衬底的背面形成第一掺杂区和第二掺杂区；
    在所述半导体衬底中形成第一重掺杂区和第一重掺杂区，所述第一重掺杂区与所述第一掺杂区远离所述背面的一侧接触，所述第二重掺杂区与所述第二掺杂区远离所述背面的一侧接触，其中，所述第一重掺杂区与所述第一掺杂区均为P型掺杂，所述第二重掺杂区与所述第二掺杂区均为N型掺杂，且所述第一重掺杂区的掺杂浓度大于所述第一掺杂区的掺杂浓度，所述第二重掺杂区的掺杂浓度大于所述第二掺杂区的掺杂浓度；
    在所述第一掺杂区远离所述第一重掺杂区的一侧形成第一钝化层，所述第一钝化层具有固定负电荷；
    至少在所述第二掺杂区远离所述第二重掺杂区的一侧形成第二钝化层，所述第二钝化层具有固定正电荷。
  11. 根据权利要求10所述的制作方法，其中，形成所述第一掺杂区和所述第二掺杂区的步骤包括：
    在所述半导体衬底的背面沉积本征多晶硅材料，并分别对所述多晶硅材料进行N型离子扩散和P型离子扩散，以形成所述第一掺杂区和所述第二掺杂区；或
    分别采用N型离子和P型离子对所述半导体衬底的背面进行原位掺杂，以形成所述第一掺杂区和所述第二掺杂区，其中，所述半导体衬底为多晶硅衬底。
  12. 根据权利要求11所述的制作方法，其中，在形成所述第一掺杂区和所述第二掺杂区的步骤之前，所述制作方法还包括以下步骤：
    在所述半导体衬底的背面形成隧穿氧化层，
    在形成所述第一钝化层和所述第二钝化层的步骤之后，所述隧穿氧化层中的一部分与所述第一钝化层位于所述第一掺杂区的两侧，所述隧穿氧化层中的另一部分与所述第二钝化层位于所述第二掺杂区的两侧。
  13. 根据权利要求10至12中任一项所述的制作方法，其中，在形成所述第一掺杂区和所述第二掺杂区的步骤之前，所述制作方法还包括以下步骤：
    对所述半导体衬底的背面进行刻蚀，以形成凹槽；
    在形成所述第一掺杂区和所述第二掺杂区的步骤中，在所述背面中与所述凹槽对应的区域形成所述第一掺杂区，在所述背面中位于所述凹槽两侧的区域形成所述第二掺杂区。
  14. 根据权利要求13所述的制作方法，其中，形成所述第一钝化层和所述第二钝化层的步骤包括：
    在所述半导体衬底的背面覆盖二氧化硅层，以使所述二氧化硅层中的一部分覆盖所述凹槽的底面和内壁并与所述第一掺杂区接触，所述二氧化硅层中的另一部分与所述第二掺杂区接触；
    在所述凹槽中形成所述第一钝化层；
    在所述第一钝化层和所述二氧化硅层表面覆盖所述第二钝化层。
  15. 根据权利要求10至12中任一项所述的制作方法，其中，形成所述第一重掺杂区和所述第一重掺杂区的步骤包括：
    采用P型离子对所述半导体衬底的背面进行选择性发射极激光掺杂，以形成所述第一重掺杂区，优选采用355nm的皮秒级激光，脉冲宽度为10～20ps，工作频率为10～80MHz；
    采用N型离子对所述半导体衬底的背面进行选择性发射极激光掺杂，以形成所述第二重掺杂区，优选采用532nm的纳秒级激光，脉冲宽度为6～20ns，工作频率50～200KHz。
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