WO2024017073A1 - 一种存储器件共享的方法、装置及系统 - Google Patents

一种存储器件共享的方法、装置及系统 Download PDF

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Publication number
WO2024017073A1
WO2024017073A1 PCT/CN2023/106221 CN2023106221W WO2024017073A1 WO 2024017073 A1 WO2024017073 A1 WO 2024017073A1 CN 2023106221 W CN2023106221 W CN 2023106221W WO 2024017073 A1 WO2024017073 A1 WO 2024017073A1
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WIPO (PCT)
Prior art keywords
target data
management unit
storage device
modules
integrated
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Ceased
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PCT/CN2023/106221
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English (en)
French (fr)
Inventor
雷虎宝
包云兵
陈卓伟
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to EP23842138.2A priority Critical patent/EP4542364A4/en
Publication of WO2024017073A1 publication Critical patent/WO2024017073A1/zh
Priority to US19/022,429 priority patent/US20250156367A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0626—Reducing size or complexity of storage systems
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/0292—User address space allocation, e.g. contiguous or non contiguous base addressing using tables or multilevel address translation means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1652—Handling requests for interconnection or transfer for access to memory bus based on arbitration in a multiprocessor architecture
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    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
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    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1684—Details of memory controller using multiple buses
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/404—Coupling between buses using bus bridges with address mapping
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0604—Improving or facilitating administration, e.g. storage management
    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
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    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0673—Single storage device
    • G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/12—Arrangements for remote connection or disconnection of substations or of equipment thereof
    • G—PHYSICS
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    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0002—Serial port, e.g. RS232C
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016—Inter-integrated circuit (I2C)

Definitions

  • the present application relates to the field of storage, and in particular, to a method, device and system for sharing storage devices.
  • each integrated module is connected to a corresponding storage device, which is used to save the integrated module connected to it. configuration files, firmware and other data.
  • configuration files, firmware and other data As the number of integrated modules in the system increases, the number of storage devices also increases. The increase in the number of storage devices further leads to an increase in production costs.
  • Embodiments of the present application provide a method, device and system for sharing a storage device.
  • multiple integrated modules can share a storage device through a management unit through address remapping, which can reduce the number of integrated module connections.
  • the number of storage devices reduces costs.
  • this application provides a multi-integrated module system, which includes a plurality of integrated modules, a management unit and a storage device.
  • multiple integrated modules are respectively connected to the management unit, and the management unit is connected to the storage device.
  • multiple integrated modules can be connected through the serial peripheral interface (SPI) or the two-wire serial bus interface (inter- Low-speed interfaces such as integrated circuit (I2C) are connected to the management unit.
  • SPI serial peripheral interface
  • I2C integrated circuit
  • multiple integrated modules can be connected to the management unit through high-speed interfaces such as parallel ports.
  • the storage device can be connected to the management unit through SPI or I2C, or the storage device can be directly integrated into the management unit. In this case, the management unit and the storage device do not need to be connected through an interface.
  • each of the multiple integrated modules can be a device implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD).
  • ASIC application-specific integrated circuit
  • PLD programmable logic device
  • the above-mentioned PLD can be a complex programmable logical device (CPLD), a field-programmable gate array (field-programmable gate array, FPGA), a general array logic (generic array logic, GAL), or any combination thereof.
  • CPLD complex programmable logical device
  • FPGA field-programmable gate array
  • GAL general array logic
  • BMC baseboard management controller
  • MCU microcontroller unit
  • the storage device can be a volatile storage medium or a non-volatile storage medium, such as flash memory (flash), programmable read-only memory (PROM), electrically rewritable read-only memory Memory (electrically alterable read only memory, EAROM), erasable programmable read only memory (erasable programmable read only memory, EPROM), etc.
  • flash flash
  • PROM programmable read-only memory
  • EAROM electrically rewritable read-only memory
  • EPROM erasable programmable read only memory
  • multiple integration modules are used to issue read or write requests for multiple target data, where there is a one-to-one correspondence between multiple integration modules and multiple target data;
  • the management unit used to connect storage devices, and to connect multiple integrated modules respectively, used to receive read or write requests for multiple target data sent by multiple integrated modules, and determine multiple target addresses corresponding to multiple target data, where , there is a one-to-one correspondence between multiple target data and multiple target addresses;
  • multiple physical addresses in the storage device are determined according to multiple target addresses, where there is a one-to-one correspondence between multiple target addresses and multiple physical addresses; according to multiple target addresses, there is a one-to-one correspondence between multiple target addresses and multiple physical addresses.
  • a physical address is used to read or write multiple target data in the storage device; the storage device is used to store or write multiple target data.
  • the management unit before the management unit is used to receive read or write requests for multiple target data sent by the multiple integrated modules, the management unit is configured to perform a power-on reset on the multiple integrated modules. .
  • the management unit can perform power-on reset on multiple integrated modules at the same time, or can perform power-on reset on each integrated module in sequence, or can perform power-on reset on some of the multiple integrated modules in sequence.
  • the management unit is configured to receive multiple read or write requests for target data sent by multiple integration modules, and determine multiple target data based on the read or write requests for multiple target data. Multiple target addresses corresponding to each target data, wherein each target data in the multiple target data may be the configuration file of the integrated module, or the firmware data of the integrated module, etc.
  • the management unit is configured to determine multiple target addresses corresponding to the multiple target data according to the multiple target data.
  • the target address of each target data in the multiple target addresses may include the starting address of the target data and the length of the target data, or, Including the starting address and last address of the target data, etc.
  • the management unit is configured to determine multiple physical addresses in the storage device according to multiple target addresses.
  • the physical address may include the physical start address and target data length of the target data, or may include the physical start address and physical last address of the target data, etc.
  • the management unit is used to determine multiple physical addresses in the storage device based on multiple target addresses and a mapping table, where the mapping table includes the data address corresponding to each integrated module in the multiple integrated modules and the physical address in the storage device. mapping relationship between.
  • the management unit is configured to receive a read request for the first target data sent by the first integration module and a write request for the second target data sent by the second integration module.
  • the management unit is configured to determine a first target address corresponding to the first target data according to the first target data, where the first target address includes a starting address 0 of the first target data and a length 60 of the first target data. Afterwards, the management unit is used to determine the first physical address in the storage device according to the first target address and the mapping table.
  • the management unit is used to determine the physical starting address of the first target data in the storage device to be 0 according to the starting address of the first target data and the mapping table, and the length of the first target data remains unchanged, that is, to obtain the first physical address. . Thereafter, the management unit is configured to determine a second target address corresponding to the second target data according to the second target data, where the second target address includes a starting address 0 of the second target data and a length 30 of the second target data. Afterwards, the management unit is used to determine the second physical address in the storage device according to the second target address and the mapping table. The management unit is used to determine the physical starting address of the second target data in the storage device to be 100 according to the starting address of the second target data and the mapping table, and the length of the second target data remains unchanged at 60, that is, determine the second physical address. .
  • the management unit is used to read multiple target data in the storage device according to multiple physical addresses.
  • the management unit when the management unit sequentially receives multiple read requests for target data sent by multiple integration modules, the management unit sequentially determines the corresponding multiple target addresses based on the multiple target data. , determining multiple physical addresses in multiple storage devices based on multiple target addresses. The management unit reads a corresponding target data in the storage device according to one of the multiple physical addresses, and sends the target data to the corresponding integrated module. After that, the management unit continuously repeats the above steps to complete the reading of multiple target data. The specific process will not be described one by one in this application.
  • the management unit in the case where the management unit simultaneously receives multiple target data read requests sent by multiple integrated modules, the management unit reads multiple target data from the storage device. Cache into the buffer, and then send multiple target data in parallel to their corresponding integration modules through their corresponding integration module interfaces. For example, the management unit simultaneously receives a read request for the first target data sent by the first integration module and a read request for the second target data sent by the second integration module, and the management unit obtains the read request from the first target data based on the first physical address corresponding to the first target data. The first target data is read from the storage device, and the first target data is cached in the buffer.
  • the management unit reads the second target data from the storage device according to the second physical address corresponding to the second target data, and caches the second target data into the cache. Afterwards, the management unit sends the first target data to the first integration module through the first integration module interface, and at the same time, the management unit sends the second target data to the second integration module through the second integration module interface.
  • the management unit is used to write multiple target data in the storage device according to multiple physical addresses.
  • the management unit when the management unit sequentially receives write requests for multiple target data sent by multiple integration modules, the management unit is configured to determine the corresponding multiple target data based on the multiple target data in sequence. Target addresses, multiple physical addresses in multiple storage devices are determined based on multiple target addresses. The management unit sequentially writes multiple target addresses into corresponding physical addresses in the storage device according to the multiple physical addresses.
  • the management unit when the management unit simultaneously receives write requests for multiple target data sent by multiple integration modules, the management unit is configured to cache the multiple target data into the buffer. , sequentially obtain a target data in the buffer, and write the target data into the physical address of the corresponding storage device. The management unit is used to continuously repeat the above process to write multiple target data into the storage device.
  • each integrated module is connected to a corresponding storage device.
  • the storage device is used to store the configuration file, firmware and other data of the integrated module. Multiple integrated modules do not need to share the storage device. Conflicts may occur between multiple integrated modules concurrently reading or writing.
  • the management unit in the system is also connected to a corresponding storage device for storing information such as management unit firmware and logs. As the number of integrated modules integrated in the system increases, the number of storage devices in the system increases, resulting in an increase in the printed circuit board (PCB) area and cost.
  • PCB printed circuit board
  • the management unit can enable multiple modules to be integrated through address remapping.
  • Integrated modules can share a storage device. There is no need to connect corresponding storage devices to each integrated module in the system. This can greatly reduce the number of storage devices in a multi-integrated module scenario, which can save costs, and multiple integrated modules share one memory.
  • the device can avoid the problem of poor uniformity caused by different specifications of multiple storage devices when there are multiple storage devices.
  • the present application provides a method for sharing a storage device.
  • the method includes: a management unit receiving read or write requests for multiple target data sent by multiple integrated modules, and determining multiple target data corresponding to the multiple target data.
  • Target address where there is a one-to-one correspondence between multiple integrated modules and multiple read or write requests for target data, and there is a one-to-one correspondence between multiple target data and multiple target addresses;
  • the management unit determines based on multiple target addresses Multiple physical addresses in the storage device, where there is a one-to-one correspondence between multiple target addresses and multiple physical addresses; the management unit reads or writes multiple target data in the storage device based on the multiple physical addresses.
  • the management unit before the management unit receives multiple read or write requests for target data sent by the multiple integrated modules, the management unit performs a power-on reset on the multiple integrated modules through the IO interface.
  • the management unit determines multiple target addresses corresponding to the multiple target data according to the read or write requests of the multiple target data, wherein each target in the multiple target data
  • the data can be the configuration file of the integrated module, or the firmware data of the integrated module, etc.
  • the management unit determines multiple target addresses corresponding to the multiple target data according to the multiple target data.
  • the target address of each target data in the multiple target addresses may include the starting address of the target data and the length of the target data, or include the target data. The starting address and last address of the data, etc.
  • the management unit can perform address remapping and determine multiple physical addresses in the storage device according to multiple target addresses, where the physical addresses can include the physical starting address of the target data and the target address.
  • the data length, or including the physical starting address and physical last address of the target data is not specifically limited here.
  • the management unit determines the physical starting addresses of multiple target data in the storage device according to the starting addresses of the target data in the multiple target addresses. If the lengths of the multiple target data remain unchanged, multiple physical addresses can be determined.
  • the management unit reads multiple target data in the storage device according to multiple physical addresses.
  • the management unit when the management unit sequentially receives multiple read requests for target data sent by multiple integrated modules, the management unit sequentially reads multiple read requests from the storage device based on multiple physical addresses. Target data is sent to multiple corresponding integration modules in sequence.
  • the management unit in the case where the management unit simultaneously receives write requests for multiple target data sent by multiple integrated modules, the management unit reads multiple write requests from the storage device based on multiple physical addresses. target data, cache multiple target data into the buffer, and send multiple target data to corresponding multiple integrated modules in parallel.
  • the management unit writes multiple target data in the storage device according to multiple physical addresses.
  • the management unit when the management unit sequentially receives multiple write requests for target data sent by multiple integrated modules, the management unit sequentially writes multiple write requests to the storage device based on multiple physical addresses. target data.
  • the management unit when the management unit simultaneously receives write requests for multiple target data sent by multiple integration modules, the management unit caches the multiple target data into the buffer, in sequence. Obtain a target data in the buffer and write the target data to the physical address of the corresponding storage device. The management unit continuously repeats the above process to write multiple target data into the storage device.
  • the management unit receives read or write requests for multiple target data sent by multiple integrated modules in a multi-integrated module scenario, and transfers the multiple target data
  • the target address is mapped to multiple different physical addresses in a storage device to realize address remapping of target data and multiple integrated modules to share a storage device.
  • the storage device sharing method can enable multiple integrated modules to read or write multiple target data in a storage device connected to the management unit in the scenario of multiple integrated modules. , which can significantly reduce the number of storage devices in a multi-integrated module scenario and save costs.
  • inventions of the present application provide a storage device sharing device.
  • the storage device sharing device includes: an integrated module interface controller, configured to receive read or write requests for multiple target data sent by multiple integrated modules. , determine multiple target addresses corresponding to multiple target data, where there is a one-to-one correspondence between multiple integrated modules and multiple read or write requests for target data, and there is a one-to-one correspondence between multiple target data and multiple target addresses. relationship; the controller module is used to determine multiple physical addresses in the storage device based on multiple target addresses, where there is a one-to-one correspondence between multiple target addresses and multiple physical addresses; the storage device interface controller is used to determine multiple physical addresses based on multiple target addresses.
  • a physical address is used to read or write multiple target data in the storage device; the IO controller module is used to power on and reset multiple integrated modules; the cache module is used to cache multiple target data; the routing module is It is used to establish multiple communication connections between multiple integrated modules and storage devices corresponding to the management unit, where there is a one-to-one correspondence between the multiple integrated modules and the multiple communication connections.
  • Each integrated module interface controller is used to connect to the routing module and the controller module.
  • the storage device interface controller is used to connect to the storage device and communicate with the routing module and control module. controller module connection. controller module Blocks are used to connect with all devices in the device and to control the work of all devices in the device.
  • the present application provides a device for sharing storage devices.
  • the integrated module interface controller Through the cooperation of the integrated module interface controller, the controller module, the storage device interface controller, the IO controller module, the routing module and the cache module, multiple
  • the integrated module scenario it is possible to receive multiple target data access requests sent by multiple integrated modules, map the target addresses of multiple target data to different physical addresses of a storage device, realize address remapping of target data, and realize multiple integrations.
  • Modules share memory devices, which can reduce the number of memory devices in multi-integrated module scenarios and help reduce costs.
  • Figure 1 is a schematic structural diagram of a typical multi-integrated module system provided by an embodiment of the present application
  • Figure 2 is a schematic circuit diagram of a single integrated module provided by an embodiment of the present application.
  • Figure 3 is a schematic structural diagram of a multi-integrated module system provided by an embodiment of the present application.
  • Figure 4 is a schematic circuit diagram of a typical single integrated module firmware upgrade provided by an embodiment of the present application.
  • Figure 5 is a flow chart of a storage device sharing method provided by an embodiment of the present application.
  • FIG. 6 is a schematic structural diagram of a storage device sharing device provided by an embodiment of the present application.
  • FIG. 1 is a schematic structural diagram of a typical multi-integrated module system provided by this application.
  • a typical multi-integrated module system includes multiple integrated modules, management units and multiple storage devices. Each of the multiple integrated modules is connected to a corresponding storage device. The multiple integrated modules are respectively connected to the management unit. The management unit is connected to the storage device. The storage device connected to the integrated module is used to store the corresponding storage device. Integrate the configuration file, firmware and other data of the module, and the storage device connected to the management unit is used to store the configuration file, firmware and other data of the management unit.
  • the circuit schematic diagram of a single integrated module is shown in Figure 2.
  • the integrated module communicates through the serial peripheral interface (SPI) or the two-wire serial bus (inter-integrated circuit, I2C). ) is connected to the corresponding storage device and the power-on reset (POR) module of the microcontroller. In fact, it is connected to the management unit, which performs a power-on reset on the integrated module.
  • the integrated module can also be connected to the corresponding memory through an improved two-wire serial bus interface (improved inter-integrated circuit, I3C).
  • the POR module is used to realize the management unit's control of power-on or reset of the microcontroller or integrated module.
  • the POR module can be implemented through general purpose input output (GPIO).
  • the management unit supports GPIO signals, thereby enabling the management unit to control the status of devices (such as peripherals) in the entire machine, for example, GPIO
  • the signal can be generated independently or in combination with other signals (for example, the power button touch signal of the entire machine panel) to generate a power/reset control signal.
  • the above-mentioned POR module can also be used to connect the management unit to other devices.
  • PCB printed circuit board
  • FIG. 3 is a schematic structural diagram of a multi-integrated module system provided by this application.
  • the multi-integrated module system includes multiple integrated modules 310 , a management unit 320 and a storage device 330 .
  • multiple integrated modules 310 are respectively connected to the management unit 320, and the management unit 320 is connected to the storage device 330.
  • the multiple integrated modules 310 can respectively pass the serial peripheral interface (serial peripheral interface, SPI) or the two-wire serial bus interface ( Low-speed interfaces such as inter-integrated circuit (I2C) are connected to the management unit 320.
  • SPI serial peripheral interface
  • I2C inter-integrated circuit
  • multiple integrated modules 310 can be connected to the management unit 320 through high-speed interfaces such as parallel ports.
  • the storage device 330 can be connected to the management unit 320 through SPI or I2C, or the storage device 330 can be directly integrated in the management unit 320. In this case, the management unit 320 and the storage device 330 do not need to be connected through an interface.
  • each of the multiple integrated modules 310 may be a device implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD).
  • ASIC application-specific integrated circuit
  • PLD programmable logic device
  • the above-mentioned PLD may be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a general array logic (GAL) or Any combination of them can be achieved.
  • CPLD complex programmable logical device
  • FPGA field-programmable gate array
  • GAL general array logic
  • the management unit 320 can be a complex programmable logic device (CPLD), a baseboard management controller (BMC) or a microcontroller unit (microcontroller unit, MCU) or any other device with management characteristics. part.
  • CPLD complex programmable logic device
  • BMC baseboard management controller
  • MCU microcontroller unit
  • the storage device 330 can be a volatile storage medium or a non-volatile storage medium, such as flash memory (flash), programmable read-only memory (PROM), electrically rewritable memory.
  • flash flash
  • PROM programmable read-only memory
  • Read memory electrically alterable read only memory, EAROM
  • erasable programmable read only memory erasable programmable read only memory, EPROM
  • the BMC when the management unit 320 is implemented by the BMC, the BMC supports 2 SPIs, in which SPI0 is a serial peripheral interface flash controller (SFC) interface, which is mainly used for motherboard firmware such as Upgrade of basic input output system (BIOS) and flash memory (Flash).
  • SPI0 is a serial peripheral interface flash controller (SFC) interface, which is mainly used for motherboard firmware such as Upgrade of basic input output system (BIOS) and flash memory (Flash).
  • SFC serial peripheral interface flash controller
  • BIOS basic input output system
  • flash flash memory
  • the BMC security core outputs 1 GPIO for upgrade switching (SWITCH) control.
  • SWITCH upgrade switching
  • the system when the integrated module is connected to the corresponding storage device through I2C, for example, the system supports a total of 10 I2C interfaces for communicating with the motherboard through the Intelligent Platform Management Interface (IPMI), Peripheral management and other functions.
  • IPMI Intelligent Platform Management Interface
  • Peripheral management Peripheral management and other functions.
  • Table 2 for signal description:
  • multiple integration modules 310 are used to issue read or write requests for multiple target data, where there is a one-to-one correspondence between multiple integration modules and multiple target data;
  • the management unit 320 Used to connect storage devices, and to connect multiple integrated modules respectively, used to receive read or write requests for multiple target data sent by multiple integrated modules, and determine multiple target addresses corresponding to the multiple target data, where, There is a one-to-one correspondence between multiple target data and multiple target addresses;
  • multiple physical addresses in the storage device are determined based on multiple target addresses, where there is a one-to-one correspondence between multiple target addresses and multiple physical addresses; based on multiple The physical address reads or writes multiple target data in the storage device;
  • the storage device 330 is used to store or write multiple target data.
  • the management unit before the management unit is used to receive read or write requests for multiple target data sent by the multiple integrated modules, the management unit is configured to perform a power-on reset on the multiple integrated modules.
  • the management unit can perform power-on reset on multiple integrated modules at the same time, or it can perform power-on reset on each integrated module in sequence, or it can perform power-on reset on some of the integrated modules in sequence, which is not done here. Specific limitations.
  • the management unit is configured to receive read or write requests for multiple target data sent by multiple integration modules, and determine the corresponding data for the multiple target data based on the read or write requests for the multiple target data.
  • Multiple target addresses, wherein each target data in the multiple target data may be the configuration file of the integrated module, or the firmware data of the integrated module, etc., which are not specifically limited here.
  • the management unit is configured to determine multiple target addresses corresponding to the multiple target data according to the multiple target data.
  • the target address of each target data in the multiple target addresses may include the starting address of the target data and the length of the target data, or, Including the starting address and last address of the target data, etc., there are no specific limitations here.
  • the management unit is configured to determine multiple physical addresses in the storage device according to multiple target addresses.
  • the physical address may include the physical start address and target data length of the target data, or may include the physical start address and physical last address of the target data, etc., which are not specifically limited here.
  • the management unit is used to determine multiple physical addresses in the storage device based on multiple target addresses and a mapping table, where the mapping table includes the data address corresponding to each integrated module in the multiple integrated modules and the physical address in the storage device. mapping relationship between.
  • the management unit is configured to receive a read request for the first target data sent by the first integration module and a write request for the second target data sent by the second integration module.
  • the management unit is used to determine the first target corresponding to the first target data according to the first target data.
  • the first target address includes the starting address 0 of the first target data, and the length 60 of the first target data.
  • the management unit is used to determine the first physical address in the storage device according to the first target address and the mapping table.
  • the management unit is used to determine the physical starting address of the first target data in the storage device to be 0 according to the starting address of the first target data and the mapping table, and the length of the first target data remains unchanged, that is, to obtain the first physical address. .
  • the management unit is configured to determine a second target address corresponding to the second target data according to the second target data, where the second target address includes a starting address 0 of the second target data and a length 30 of the second target data. Afterwards, the management unit is used to determine the second physical address in the storage device according to the second target address and the mapping table. The management unit is used to determine the physical starting address of the second target data in the storage device to be 100 according to the starting address of the second target data and the mapping table, and the length of the second target data remains unchanged at 60, that is, determine the second physical address. .
  • the management unit is used to read multiple target data in the storage device according to multiple physical addresses.
  • the management unit when the management unit sequentially receives read requests for multiple target data sent by multiple integration modules, the management unit determines the corresponding multiple target addresses based on the multiple target data in sequence, and determines the corresponding multiple target addresses based on the multiple target data.
  • the target address determines multiple physical addresses in multiple storage devices.
  • the management unit reads a corresponding target data in the storage device according to one of the multiple physical addresses, and sends the target data to the corresponding integrated module. After that, the management unit continuously repeats the above steps to complete the reading of multiple target data. The specific process will not be described one by one in this application.
  • the management unit when the management unit receives read requests for multiple target data sent by multiple integrated modules at the same time, the management unit caches the multiple target data read from the storage device into the buffer. , and then send multiple target data in parallel to their corresponding integration modules through their corresponding integration module interfaces. For example, the management unit simultaneously receives a read request for the first target data sent by the first integration module and a read request for the second target data sent by the second integration module, and the management unit obtains the read request from the first target data based on the first physical address corresponding to the first target data. The first target data is read from the storage device, and the first target data is cached in the buffer.
  • the management unit reads the second target data from the storage device according to the second physical address corresponding to the second target data, and caches the second target data into the cache. Afterwards, the management unit sends the first target data to the first integration module through the first integration module interface, and at the same time, the management unit sends the second target data to the second integration module through the second integration module interface.
  • the management unit is used to write multiple target data in the storage device according to multiple physical addresses.
  • the management unit when the management unit sequentially receives write requests for multiple target data sent by multiple integration modules, the management unit is configured to determine corresponding multiple target addresses based on the multiple target data in sequence, according to Multiple target addresses determine multiple physical addresses in multiple memory devices. The management unit sequentially writes multiple target addresses into corresponding physical addresses in the storage device according to the multiple physical addresses.
  • the management unit when the management unit receives write requests for multiple target data sent by multiple integration modules at the same time, the management unit is configured to cache the multiple target data into the cache, and obtain the cache in sequence. A target data in the device, write the target data into the physical address of the corresponding storage device. The management unit is used to continuously repeat the above process to write multiple target data into the storage device.
  • FIG. 4 is a method provided by this application. Typical circuit diagram for firmware upgrade of a single integrated module.
  • the storage device corresponding to the management unit is connected to the management unit, the management unit is connected to a multiplexer (MUX), and the multiplexer is connected to the integrated module and the storage device corresponding to the integrated module respectively.
  • MUX multiplexer
  • the management unit controls the multiplexer through the selection control signal SEL and determines whether the main line of the storage device corresponding to the integrated module is connected to the management unit or to the integrated module.
  • the management unit writes the newly upgraded firmware data of the integrated module into the storage device configured by the integrated module to complete the upgrade of the integrated module firmware.
  • the storage device connected to the management unit stores firmware data of multiple integrated modules.
  • the management unit is used to obtain the firmware data of the first integrated module.
  • the firmware data writing request and the newly upgraded first firmware data determine the first target address of the first firmware data, determine the first physical address in the storage device according to the first target address, and the management unit is first used to determine the first physical address according to the first physical address.
  • the corresponding original firmware data in the storage device is erased, and then the newly upgraded first firmware data is written in the first physical address of the storage device.
  • the management unit is used to send an instruction indicating a successful firmware upgrade to the first integrated module. middle.
  • This application implements the firmware upgrade of multiple integrated modules by repeating the above steps. The specific process will not be described one by one.
  • the storage device since multiple integrated modules in the system share the storage device connected to the management unit, the storage device stores firmware data of multiple integrated modules, and the management unit is used to erase the original data of the integrated module in the storage device connected to itself. Some firmware data can be written into the corresponding newly upgraded firmware data.
  • the firmware upgrade can be realized without adding a multiplexer in the system. This can simplify the firmware upgrade process and improve the firmware upgrade. Software upgrade efficiency.
  • the management unit can enable multiple integrated modules to share a storage device through address remapping, and there is no need to connect a corresponding storage device to each integrated module in the system.
  • the number of storage devices can be greatly reduced, which can save costs, and multiple integrated modules share one storage device, which can avoid the problem caused by the different specifications of multiple storage devices when there are multiple storage devices.
  • the problem of poor uniformity can be avoided.
  • Figure 5 is a flow chart of a storage device sharing method provided by an embodiment of the present application. The method includes the following steps S510 ⁇ S540.
  • S510 The management unit performs power-on reset for multiple integrated modules.
  • the management unit is connected to multiple integrated modules through IO interfaces and performs power-on reset on multiple integrated modules.
  • the management unit can perform power-on reset on multiple integrated modules at the same time, or it can perform power-on reset on each integrated module in sequence, or it can perform power-on reset on some of the integrated modules in sequence, which is not done here. Specific limitations.
  • the management unit can control the startup sequence of multiple integrated modules and avoid concurrent access of multiple integrated modules.
  • the management unit receives multiple read or write requests for target data sent by multiple integrated modules, and determines multiple target addresses corresponding to the multiple target data, where the read or write requests for multiple integrated modules and multiple target data There is a one-to-one correspondence between write requests, and there is a one-to-one correspondence between multiple target data and multiple target addresses.
  • the management unit determines multiple target addresses corresponding to the multiple target data according to the read or write requests of the multiple target data, where each target data in the multiple target data may be The configuration file of the integrated module, or the firmware data of the integrated module, etc. are not specifically limited here.
  • the management unit determines multiple target addresses corresponding to the multiple target data according to the multiple target data.
  • the target address of each target data in the multiple target addresses may include the starting address of the target data and the length of the target data, or include the target data. The starting address and last address of the data are not specifically limited here.
  • the management unit determines multiple physical addresses in the storage device based on multiple target addresses, where there is a one-to-one correspondence between multiple target addresses and multiple physical addresses.
  • the management unit can perform address remapping and determine multiple physical addresses in the storage device according to multiple target addresses, where the physical addresses can include the physical starting address of the target data and the target data length, Or, it includes the physical starting address and physical last address of the target data, etc., which are not specifically limited here.
  • the management unit determines the physical starting addresses of multiple target data in the storage device according to the starting addresses of the target data in the multiple target addresses. If the lengths of the multiple target data remain unchanged, multiple physical addresses can be determined.
  • S540 The management unit reads or writes multiple target data in the storage device according to multiple physical addresses.
  • the management unit reads multiple target data in the storage device according to multiple physical addresses.
  • the management unit when the management unit sequentially receives multiple read requests for target data sent by multiple integrated modules, the management unit sequentially reads multiple target data in the storage device based on multiple physical addresses. , sending multiple target data to multiple corresponding integration modules in sequence.
  • the management unit when the management unit simultaneously receives write requests for multiple target data sent by multiple integrated modules, the management unit reads multiple target data in the storage device according to multiple physical addresses. , cache multiple target data into the buffer, and send multiple target data to multiple corresponding integrated modules in parallel.
  • the management unit writes multiple target data in the storage device according to multiple physical addresses.
  • the management unit when the management unit sequentially receives write requests for multiple target data sent by multiple integrated modules, the management unit sequentially writes multiple target data in the storage device based on multiple physical addresses. .
  • the management unit when the management unit receives write requests for multiple target data sent by multiple integration modules at the same time, the management unit caches the multiple target data into the buffer and obtains the buffer in sequence. A target data in , write the target data into the physical address of the corresponding storage device. The management unit continuously repeats the above process to write multiple target data into the storage device.
  • the management unit receives the read or write requests of multiple target data sent by multiple integrated modules in a multi-integrated module scenario, and transfers the target data of the multiple target data to Address mapping is multiple different physical addresses in a storage device, achieving address remapping of target data and allowing multiple integrated modules to share a storage device.
  • the storage device sharing method can enable the data of multiple integrated modules to be read or written in a storage device configured by the management unit in a multi-integrated module scenario, and can be used in large quantities. Reducing the number of storage devices in multi-integrated module scenarios can save costs.
  • FIG. 6 is a schematic structural diagram of a storage device sharing device provided by this application. This device can be applied to the device shown in Figure 3 In the management unit of the multi-integrated module system.
  • the storage device sharing device 600 includes: an integrated module interface controller 610, configured to receive read or write requests for multiple target data sent by multiple integrated modules, and determine multiple target addresses corresponding to the multiple target data, wherein, There is a one-to-one correspondence between multiple integrated modules and multiple read or write requests for target data, and there is a one-to-one correspondence between multiple target data and multiple target addresses; the controller module 620 is used to determine the Multiple physical addresses in the storage device, where there is a one-to-one correspondence between multiple target addresses and multiple physical addresses; the storage device interface controller 630 is used to read or write multiple physical addresses in the storage device according to the multiple physical addresses.
  • an integrated module interface controller 610 configured to receive read or write requests for multiple target data sent by multiple integrated modules, and determine multiple target addresses corresponding to the multiple target data, wherein, There is a one-
  • IO controller module 640 used to power on and reset multiple integrated modules
  • cache module 650 used to cache multiple target data
  • routing module 660 used to establish multiple integrated modules and management units Multiple communication connections between corresponding storage devices, wherein there is a one-to-one correspondence between multiple integrated modules and multiple communication connections.
  • Each integrated module interface controller is used to connect to the routing module and the controller module.
  • the storage device interface controller is used to connect to the storage device and communicate with the routing module and control module. controller module connection.
  • the controller module is used to connect with all devices in the device and control the work of all devices in the device.
  • the controller module is used to control the IO controller module, and the IO controller The module is used to simultaneously control the startup sequence of four ASICs connected to four ASIC interface controllers.
  • the first ASIC interface controller is first used to receive the read request of the first target data sent by the first ASIC and determine the first target address corresponding to the first target data.
  • the routing module is used to pass The communication connection corresponding to the first ASIC interface controller transmits the first target address to the controller module.
  • the controller module is used to determine the first physical address according to the first target address and send the first physical address to the Flash interface controller.
  • the Flash interface controller is used to access the first target data in the Flash device according to the first physical address.
  • the Flash interface controller can send the first target data to the routing module, and the routing module sends it to the corresponding first ASIC interface controller through the corresponding communication connection, and then the first ASIC interface controller sends the first target data to the routing module.
  • the integrated module interface controller is transferred to the first ASIC.
  • the second ASIC interface controller may be used to receive the write request of the second target data and the second target data sent by the second ASIC, and determine the second target address of the second target data.
  • the third ASIC The interface controller may be configured to receive the write request of the third target data and the third target data sent by the third ASIC, and determine the third target address of the third target data.
  • the controller module may be configured to receive a write request for the second target data, the second target data, the second target address, and a write request for the third target data, the third target data, and the third target address.
  • the controller module Since there is only one Flash interface controller, the controller module is first used to store the write request of the third target data, the third target data and the third target address in the cache module, and determine the second physical address according to the second target address. , the Flash interface controller writes the second target data into the connected Flash device according to the second physical address.
  • the controller module may be configured to obtain the write request for the third target data, the third target data and the third target address from the cache module, and determine according to the third target address.
  • the third physical address the Flash interface controller writes the third target data into the connected Flash device according to the third physical address.
  • the present application provides a device for sharing storage devices.
  • the integrated module interface controller Through the cooperation of the integrated module interface controller, the controller module, the storage device interface controller, the IO controller module, the routing module and the cache module, multiple
  • the integrated module scenario it is possible to receive multiple target data access requests sent by multiple integrated modules, map the target addresses of multiple target data to different physical addresses of a storage device, realize address remapping of target data, and realize multiple integrations.
  • Modules share memory devices, which can reduce the number of memory devices in multi-integrated module scenarios and help reduce costs.
  • Embodiments of the present application provide a chip, which may include the above-mentioned device or logic circuit.
  • the chip When the chip is run on a server, it causes the server to perform the storage device sharing method described in the above method embodiment.
  • the chip may be the chip where the management unit is located in the aforementioned content.

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Abstract

本申请公开了一种存储器件共享的方法、装置及系统，该存储器件共享的方法应用于多集成模块系统中，该系统包括多个集成模块、管理单元以及存储器件，多个集成模块分别与管理单元连接，管理单元与存储器件进行连接，该方法包括：管理单元接收多个集成模块发送的多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址；根据多个目标地址确定存储器件中的多个物理地址；根据多个物理地址在存储器件中读取或者写入多个目标数据。该方法通过地址重映射的方式，将目标数据的目标地址映射为存储器件中的物理地址，可以实现多个集成模块共享一个存储器件，可以在多集成模块的场景下减少存储器件的数量，降低成本。

Description

一种存储器件共享的方法、装置及系统
本申请要求于2022年7月19日提交中国专利局、申请号为202210849179.2、申请名称为“一种存储器件共享的方法、装置及系统”的中国专利申请的优先权，其全部内容均通过引用结合在本申请中。
技术领域
本申请涉及存储领域，尤其涉及一种存储器件共享的方法、装置及系统。
背景技术
目前，随着芯片工艺的飞速发展，一个系统内可以集成越来越多的集成模块，通常情况下，每个集成模块连接一个对应的存储器件，该存储器件用于保存与之连接的集成模块的配置文件、固件等数据，随着系统中集成模块数量的增加，存储器件的数量也随之增加，存储器件数量的增加进一步导致生产成本的增加。
因此，如何在多集成模块的场景下减少存储器件的数量是一个需要解决的问题。
发明内容
本申请实施例提供一种存储器件共享的方法、装置及系统，可以在多集成模块的场景下，通过地址重映射的方式使得多个集成模块通过管理单元共用一个存储器件，可以减少集成模块连接的存储器件的数量，降低成本。
第一方面，本申请提供了一种多集成模块系统，该多集成模块系统包括多个集成模块、管理单元以及存储器件。其中，多个集成模块分别与管理单元连接，管理单元与存储器件连接。具体实现中，在多个集成模块对启动速度的要求不高的情况下，多个集成模块可以分别通过串行外设接口(serial peripheral interface，SPI)、两线式串行总线接口(inter-integrated circuit，I2C)等低速接口与管理单元连接，在多个集成模块对启动速度要求较高的情况下，多个集成模块可以分别通过并口等高速接口与管理单元连接。存储器件可以通过SPI或者I2C与管理单元连接，或者，存储器件可以直接集成在管理单元中，此时管理单元和存储器件可以无需通过接口进行连接。
具体实现中，多个集成模块中每个集成模块可以是利用专用集成电路(application-specific integrated circuit，ASIC)实现、或可编程逻辑器件(programmable logic device，PLD)实现的设备等。其中，上述PLD可以是复杂程序逻辑器件(complex programmable logical device，CPLD)、现场可编程门阵列(field-programmable gate array，FPGA)、通用阵列逻辑(generic array logic，GAL)或其任意组合实现。
具体实现中，管理单元可以是复杂可编程逻辑器件(complex programmable logic device，CPLD)、基板管理控制器(baseboard management controller，BMC)或者微控制单元(microcontroller unit，MCU)等任意具备管理特性的部件。
具体实现中，存储器件可以是易失性存储介质，也可以是非易失性存储介质，例如，闪存(flash)、可编程只读内存(programmable read-only memory，PROM)、电可改写只读内存(electrically alterable read only memory，EAROM)、可擦可编程只读内存(erasable programmable read only memory，EPROM)等。
在第一方面一具体的实现方式中，多个集成模块，用于发出多个目标数据的读取或者写入请求，其中，多个集成模块和多个目标数据存在一一对应关系；管理单元，用于连接存储器件，以及，分别连接多个集成模块，用于接收多个集成模块发送的多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个目标数据和多个目标地址存在一一对应关系；根据多个目标地址确定存储器件中的多个物理地址，其中，多个目标地址和多个物理地址存在一一对应关系；根据多个物理地址在存储器件中读取或者写入多个目标数据；存储器件，用于存储或者写入多个目标数据。
在第一方面一种可能的实现方式中，在管理单元用于接收多个集成模块发送的多个目标数据的读取或者写入请求之前，管理单元用于对多个集成模块进行上电复位。管理单元可以同时对多个集成模块进行上电复位，或者，可以依次对每个集成模块进行上电复位，或者，可以依次对多个集成模块中的部分集成模块进行上电复位。
在第一方面一种可能的实现方式中，管理单元用于接收多个集成模块发送的多个目标数据的读取或者写入请求，根据多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个目标数据中的每个目标数据可以是集成模块的配置文件，或者，是集成模块的固件数据等。
管理单元用于根据多个目标数据确定多个目标数据对应的多个目标地址，多个目标地址中的每个目标数据的目标地址可以包括目标数据的起始地址和目标数据的长度，或者，包括目标数据的起始地址和末位地址等。
在第一方面一种可能的实现方式中，管理单元用于根据多个目标地址确定存储器件中的多个物理地址。其中，物理地址可以包括目标数据的物理起始地址和目标数据长度，或者，包括目标数据的物理起始地址和物理末位地址等。管理单元用于根据多个目标地址以及映射表，确定在存储器件中的多个物理地址，其中，映射表包括多个集成模块中每个集成模块对应的数据地址与存储器件中的物理地址之间的映射关系。
在第一方面一种具体的实现方式中，管理单元用于接收第一集成模块发送的第一目标数据的读取请求和第二集成模块发送的第二目标数据的写入请求。管理单元用于根据第一目标数据，确定第一目标数据对应的第一目标地址，其中，第一目标地址包括第一目标数据的起始地址0，以及第一目标数据的长度60。之后，管理单元用于根据第一目标地址和映射表，确定存储器件中的第一物理地址。管理单元用于根据第一目标数据的起始地址和映射表，确定存储器件中的第一目标数据的物理起始地址为0，第一目标数据的长度60不变，即获取第一物理地址。之后，管理单元用于根据第二目标数据，确定第二目标数据对应的第二目标地址，其中，第二目标地址包括第二目标数据的起始地址0，以及第二目标数据的长度30。之后，管理单元用于根据第二目标地址和映射表，确定存储器件中的第二物理地址。管理单元用于根据第二目标数据的起始地址和映射表，确定存储器件中的第二目标数据的物理起始地址为100，第二目标数据的长度60不变，即确定第二物理地址。
管理单元用于根据多个物理地址在存储器件中读取多个目标数据。
在第一方面一种可能的实现方式中，在管理单元依次接收多个集成模块发送的多个目标数据的读取请求的情况下，管理单元依次根据多个目标数据确定对应的多个目标地址，根据多个目标地址确定多个存储器件中的多个物理地址。管理单元根据多个物理地址中的一个物理地址读取存储器件中对应的一个目标数据，将目标数据发送至对应的集成模块中，之后，管理单元不断重复上述步骤，完成多个目标数据的读取，具体过程本申请不一一赘述。
在第一方面另一种可能的实现方式中，在管理单元同时接收多个集成模块发送的多个目标数据的读取请求的情况下，管理单元将从存储器件中读取的多个目标数据缓存至缓存器中，之后，将多个目标数据通过各自对应的集成模块接口并行发送至各自对应的集成模块中。例如，管理单元同时接收第一集成模块发送的第一目标数据的读取请求和第二集成模块发送的第二目标数据的读取请求，管理单元根据第一目标数据对应的第一物理地址从存储器件中读取第一目标数据，将第一目标数据缓存至缓存器中。之后，管理单元根据第二目标数据对应的第二物理地址从存储器件中读取第二目标数据，将第二目标数据缓存至缓存器中。之后，管理单元将第一目标数据通过第一集成模块接口发送至第一集成模块中，同时，管理单元将第二目标数据通过第二集成模块接口发送至第二集成模块中。
管理单元用于根据多个物理地址在存储器件中写入多个目标数据。
在第一方面一种可能的实现方式中，在管理单元依次接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元用于依次根据多个目标数据确定对应的多个目标地址，根据多个目标地址确定多个存储器件中的多个物理地址。管理单元根据多个物理地址，依次将多个目标地址写入存储器件中各自对应的物理地址中。
在第一方面另一种可能的实现方式中，在管理单元同时接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元用于将多个目标数据缓存至缓存器中，依次获取缓存器中的一个目标数据，将目标数据写入对应的存储器件的物理地址中。管理单元用于不断重复上述过程，将多个目标数据写入存储器件中。
目前，典型的多集成模块的系统中，每个集成模块都连接有对应的一个存储器件，存储器件用于存储集成模块的配置文件，固件等数据，多个集成模块不需要共享存储器件，不会出现多个集成模块并发读取或者写入的冲突。系统中的管理单元也连接有对应的一个存储器件，用于存储管理单元固件和日志等信息。随着系统中集成的集成模块数量越多，系统中的存储器件也越多，造成印制电路板(printed circuit board，PCB)面积的增加，造成成本增加。
综上所述，在第一方面提供的多集成模块的系统中，管理单元可以通过地址重映射的方式使得多个集 成模块可以共享一个存储器件，系统中不需要为每个集成模块连接对应的存储器件，可以在多集成模块的场景下大量减少存储器件的数量，可以节约成本，并且多个集成模块共享一个存储器件，可以避免存在多个存储器件的情况下，由于多个存储器件的规格不同造成的归一性较差的问题。
第二方面，本申请提供了一种存储器件共享的方法，该方法包括：管理单元接收多个集成模块发送的多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个集成模块和多个目标数据的读取或者写入请求存在一一对应关系，多个目标数据和多个目标地址存在一一对应关系；管理单元根据多个目标地址确定存储器件中的多个物理地址，其中，多个目标地址和多个物理地址存在一一对应关系；管理单元根据多个物理地址在存储器件中读取或者写入多个目标数据。
在第二方面一种可能的实施方式中，管理单元在接收多个集成模块发送的多个目标数据的读取或者写入请求之前，管理单元通过IO接口对多个集成模块进行上电复位。
在第二方面一种可能的实施方式中，管理单元根据多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个目标数据中的每个目标数据可以是集成模块的配置文件，或者，是集成模块的固件数据等。管理单元根据多个目标数据确定多个目标数据对应的多个目标地址，多个目标地址中的每个目标数据的目标地址可以包括目标数据的起始地址和目标数据的长度，或者，包括目标数据的起始地址和末位地址等。
在第二方面一种可能的实施方式中，管理单元可以进行地址重映射，根据多个目标地址确定存储器件中的多个物理地址，其中，物理地址可以包括目标数据的物理起始地址和目标数据长度，或者，包括目标数据的物理起始地址和物理末位地址等，此处不作具体限定。例如，管理单元根据多个目标地址中的目标数据的起始地址确定在存储器件中的多个目标数据的物理起始地址，多个目标数据长度不变，即可确定多个物理地址。
管理单元根据多个物理地址在存储器件中读取多个目标数据。
在第二方面一种可能的实施方式中，在管理单元依次接收多个集成模块发送的多个目标数据的读取请求的情况下，管理单元依次根据多个物理地址在存储器件中读取多个目标数据，将多个目标数据依次发送至对应的多个集成模块中。
在第二方面另一种可能的实施方式中，在管理单元同时接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元根据多个物理地址在存储器件中读取多个目标数据，将多个目标数据缓存至缓存器中，将多个目标数据并行发送至对应的多个集成模块中。
管理单元根据多个物理地址在存储器件中写入多个目标数据。
在第二方面一种可能的实施方式中，在管理单元依次接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元依次根据多个物理地址在存储器件中写入多个目标数据。
在第二方面另一种可能的实施方式中，在管理单元同时接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元将多个目标数据缓存至缓存器中，依次获取缓存器中的一个目标数据，将目标数据写入对应的存储器件的物理地址中。管理单元不断重复上述过程，将多个目标数据写入存储器件中。
在第二方面提供的一种存储器件共享的方法中，管理单元通过在多集成模块场景下实现接收多个集成模块发送的多个目标数据的读取或者写入请求，将多个目标数据的目标地址映射为一个存储器件中多个不同的物理地址，实现目标数据的地址重映射，实现多个集成模块共享一个存储器件。
综上所述，本申请提供的存储器件共享的方法可以在多集成模块的场景下，使得多个集成模块可以在管理单元连接的一个存储器件中进行多个目标数据的读取或者写入操作，可以大量减少多集成模块场景下存储器件的数量，可以节约成本。
第三方面，本申请实施例提供了一种存储器件共享装置，该存储器件共享装置包括：集成模块接口控制器，用于接收多个集成模块发送的多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个集成模块和多个目标数据的读取或者写入请求存在一一对应关系，多个目标数据和多个目标地址存在一一对应关系；控制器模块，用于根据多个目标地址确定存储器件中的多个物理地址，其中，多个目标地址和多个物理地址存在一一对应关系；存储器件接口控制器，用于根据多个物理地址在存储器件中读取或者写入多个目标数据；IO控制器模块，用于对多个集成模块进行上电复位；缓存模块，用于将多个目标数据进行缓存；路由模块，用于建立多个集成模块和管理单元对应的存储器件之间的多条通信连接，其中，多个集成模块和多条通信连接之间存在一一对应关系。
多个集成模块接口控制器用于与多个集成模块连接，每个集成模块接口控制器用于与路由模块、控制器模块相连接，存储器件接口控制器用于与存储器件连接，并且与路由模块、控制器模块连接。控制器模 块用于与装置中所有的器件进行连接，用于控制装置中所有器件的工作。
综上所述，本申请提供的一种存储器件共享的装置，通过集成模块接口控制器、控制器模块、存储器件接口控制器、IO控制器模块、路由模块和缓存模块的相互配合，在多集成模块场景下实现接收多个集成模块发送的多个目标数据访问请求，将多个目标数据的目标地址映射为一个存储器件的不同的物理地址，实现目标数据的地址重映射，实现多个集成模块共享存储器件，可以减少多集成模块场景下的存储器件的数量，有利于降低成本。
本申请在上述各方面提供的实现方式的基础上，还可以进行进一步组合以提供更多实现方式。
附图说明
为了更清楚地说明本申请实施例技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍。
图1是本申请实施例提供的一种典型的多集成模块系统的结构示意图；
图2是本申请实施例提供的一种单个集成模块的电路示意图；
图3是本申请实施例提供的一种多集成模块系统的结构示意图；
图4是本申请实施例提供的一种典型的单个集成模块固件升级的电路示意图；
图5是本申请实施例提供的一种存储器件共享的方法的流程图；
图6是本申请实施例提供的一种存储器件共享装置的结构示意图。
具体实施方式
如图1所示，图1是本申请提供的一种典型的多集成模块系统的结构示意图，典型的多集成模块系统包括多个集成模块，管理单元以及多个存储器件。多个集成模块中的每个集成模块都与对应的存储器件连接，多个集成模块分别与管理单元连接，管理单元与存储器件进行连接，其中，与集成模块连接的存储器件用于存储对应的集成模块的配置文件，固件等数据，与管理单元连接的存储器件用于存储管理单元的配置文件，固件等数据。在典型的多集成模块系统中，单个集成模块的电路示意图如图2所示，集成模块通过串行外设接口(serial peripheral interface，SPI)或者两线式串行总线(inter-integrated circuit，I2C)与对应的存储器件连接，还与单片机的上电复位(power-on reset，POR)模块连接，实际上，就是与管理单元连接，管理单元对集成模块进行上电复位。可选地，集成模块也可以通过改进的两线式串行总线接口(improved inter-integrated circuit，I3C)与对应的存储器连接。
其中，POR模块用于实现管理单元对单片机或集成模块的上电或复位的控制。示例地，POR模块可以通过通用输入输出(general purpose input output，GPIO)实现，此时，管理单元支持GPIO信号，进而实现管理单元对整机中器件(如外设)状态的控制，例如，GPIO信号可独立或结合其他信号(例如，整机面板的电源按键触信号)共同生成电源/复位控制信号。
值得说明的是，上述POR模块除了用于实现管理的单元和单片机的连接外，还可以用于管理单元与其他器件的连接。
随着芯片工艺的发展，典型的多集成模块系统中集成模块数量越来越多，由于集成模块存在对应连接的存储器件，典型的多集成模块系统中存储器件的数量也越来越多，进一步增加了印制电路板(printed circuit board，PCB)的面积，增加了生产成本。
因此，为了解决上述问题，本申请提供了一种多集成模块系统。如图3所示，图3是本申请提供的一种多集成模块系统的结构示意图，该多集成模块系统包括多个集成模块310、管理单元320以及存储器件330。其中，多个集成模块310分别与管理单元320连接，管理单元320与存储器件330连接。具体实现中，在多个集成模块310对启动速度的要求不高的情况下，多个集成模块310可以分别通过串行外设接口(serial peripheral interface，SPI)或者两线式串行总线接口(inter-integrated circuit，I2C)等低速接口与管理单元320连接，在多个集成模块310对启动速度要求较高的情况下，多个集成模块310可以分别通过并口等高速接口与管理单元320连接，此处不作具体限定。存储器件330可以通过SPI或者I2C与管理单元320连接，或者，存储器件330可以直接集成在管理单元320中，此时管理单元320和存储器件330可以无需通过接口进行连接。
具体实现中，多个集成模块310中每个集成模块可以是利用专用集成电路(application-specific integrated circuit，ASIC)实现、或可编程逻辑器件(programmable logic device，PLD)实现的设备等。其中，上述PLD可以是复杂程序逻辑器件(complex programmable logical device，CPLD)、现场可编程门阵列(field-programmable gate array，FPGA)、通用阵列逻辑(generic array logic，GAL)或 其任意组合实现。
具体实现中，管理单元320可以是复杂可编程逻辑器件(complex programmable logic device，CPLD)、基板管理控制器(baseboard management controller，BMC)或者微控制单元(microcontroller unit，MCU)等任意具备管理特性的部件。
具体实现中，存储器件330可以是易失性存储介质，也可以是非易失性存储介质，例如，闪存(flash)、可编程只读内存(programmable read-only memory，PROM)、电可改写只读内存(electricallyalterable read only memory，EAROM)、可擦可编程只读内存(erasable programmable read only memory，EPROM)等。
在一具体的实现方式中，当管理单元320由BMC实现时，BMC支持2路SPI，其中SPI0为串行外围设备接口存储控制器(serial peripheral interfaceflash controller，SFC)接口，主要用于主板固件如基本输入输出系统(basic input output system，BIOS)、闪存(Flash)的升级。由BMC安全核输出1个GPIO用于升级切换(SWITCH)控制。信号描述如表1所示。
表1 SPI信号描述
在一具体的实现方式中，当集成模块通过I2C与对应的存储器件连接时，例如，系统总共支持10个I2C接口，用于与主板通过智能平台管理接口(Intelligent Platform Management Interface，IPMI)通信、外设管理等功能。其中，信号描述参见表2：
表2 I2C信号描述
在一具体的实现方式中，多个集成模块310，用于发出多个目标数据的读取或者写入请求，其中，多个集成模块和多个目标数据存在一一对应关系；管理单元320，用于连接存储器件，以及，分别连接多个集成模块，用于接收多个集成模块发送的多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个目标数据和多个目标地址存在一一对应关系；根据多个目标地址确定存储器件中的多个物理地址，其中，多个目标地址和多个物理地址存在一一对应关系；根据多个物理地址在存储器件中读取或者写入多个目标数据；存储器件330，用于存储或者写入多个目标数据。
在一可能的实现方式中，在管理单元用于接收多个集成模块发送的多个目标数据的读取或者写入请求之前，管理单元用于对多个集成模块进行上电复位。管理单元可以同时对多个集成模块进行上电复位，或者，可以依次对每个集成模块进行上电复位，或者，可以依次对多个集成模块中的部分集成模块进行上电复位，此处不作具体限定。
在一可能的实现方式中，管理单元用于接收多个集成模块发送的多个目标数据的读取或者写入请求，根据多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个目标数据中的每个目标数据可以是集成模块的配置文件，或者，是集成模块的固件数据等，此处不作具体限定。
管理单元用于根据多个目标数据确定多个目标数据对应的多个目标地址，多个目标地址中的每个目标数据的目标地址可以包括目标数据的起始地址和目标数据的长度，或者，包括目标数据的起始地址和末位地址等，此处不作具体限定。
在一可能的实现方式中，管理单元用于根据多个目标地址确定存储器件中的多个物理地址。其中，物理地址可以包括目标数据的物理起始地址和目标数据长度，或者，包括目标数据的物理起始地址和物理末位地址等，此处不作具体限定。管理单元用于根据多个目标地址以及映射表，确定在存储器件中的多个物理地址，其中，映射表包括多个集成模块中每个集成模块对应的数据地址与存储器件中的物理地址之间的映射关系。
在一具体的实现方式中，管理单元用于接收第一集成模块发送的第一目标数据的读取请求和第二集成模块发送的第二目标数据的写入请求。管理单元用于根据第一目标数据，确定第一目标数据对应的第一目 标地址，其中，第一目标地址包括第一目标数据的起始地址0，以及第一目标数据的长度60。之后，管理单元用于根据第一目标地址和映射表，确定存储器件中的第一物理地址。管理单元用于根据第一目标数据的起始地址和映射表，确定存储器件中的第一目标数据的物理起始地址为0，第一目标数据的长度60不变，即获取第一物理地址。之后，管理单元用于根据第二目标数据，确定第二目标数据对应的第二目标地址，其中，第二目标地址包括第二目标数据的起始地址0，以及第二目标数据的长度30。之后，管理单元用于根据第二目标地址和映射表，确定存储器件中的第二物理地址。管理单元用于根据第二目标数据的起始地址和映射表，确定存储器件中的第二目标数据的物理起始地址为100，第二目标数据的长度60不变，即确定第二物理地址。
管理单元用于根据多个物理地址在存储器件中读取多个目标数据。
在一可能的实现方式中，在管理单元依次接收多个集成模块发送的多个目标数据的读取请求的情况下，管理单元依次根据多个目标数据确定对应的多个目标地址，根据多个目标地址确定多个存储器件中的多个物理地址。管理单元根据多个物理地址中的一个物理地址读取存储器件中对应的一个目标数据，将目标数据发送至对应的集成模块中，之后，管理单元不断重复上述步骤，完成多个目标数据的读取，具体过程本申请不一一赘述。
在另一可能的实现方式中，在管理单元同时接收多个集成模块发送的多个目标数据的读取请求的情况下，管理单元将从存储器件中读取的多个目标数据缓存至缓存器中，之后，将多个目标数据通过各自对应的集成模块接口并行发送至各自对应的集成模块中。例如，管理单元同时接收第一集成模块发送的第一目标数据的读取请求和第二集成模块发送的第二目标数据的读取请求，管理单元根据第一目标数据对应的第一物理地址从存储器件中读取第一目标数据，将第一目标数据缓存至缓存器中。之后，管理单元根据第二目标数据对应的第二物理地址从存储器件中读取第二目标数据，将第二目标数据缓存至缓存器中。之后，管理单元将第一目标数据通过第一集成模块接口发送至第一集成模块中，同时，管理单元将第二目标数据通过第二集成模块接口发送至第二集成模块中。
管理单元用于根据多个物理地址在存储器件中写入多个目标数据。
在一可能的实现方式中，在管理单元依次接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元用于依次根据多个目标数据确定对应的多个目标地址，根据多个目标地址确定多个存储器件中的多个物理地址。管理单元根据多个物理地址，依次将多个目标地址写入存储器件中各自对应的物理地址中。
在另一可能的实现方式中，在管理单元同时接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元用于将多个目标数据缓存至缓存器中，依次获取缓存器中的一个目标数据，将目标数据写入对应的存储器件的物理地址中。管理单元用于不断重复上述过程，将多个目标数据写入存储器件中。
在一种具体的实现方式中，在图1所示的典型的多集成模块系统中，由于每个集成模块有各自连接的存储器件，管理单元与多个集成模块各自连接的多个存储器件无法直接进行通信，在集成模块进行固件升级的情况下，需要在集成模块和集成模块连接的存储器件之间增加一个多路选择器，具体如图4所示，图4是本申请提供的一种典型的单个集成模块固件升级的电路示意图。在图4中，管理单元对应的存储器件与管理单元连接，管理单元与多路选择器(multiplexer，MUX)连接，多路选择器分别与集成模块和集成模块对应的存储器件连接。管理单元通过选择控制信号SEL控制多路选择器，决定集成模块对应的存储器件的主线与管理单元相连接，或者，与集成模块相连接。在集成模块配置的存储器件的主线与管理单元相连接的情况下，管理单元将集成模块新升级的固件数据写入集成模块配置的存储器件中，完成集成模块固件的升级。在典型的多集成模块系统中，为了实现多个集成模块的固件升级，需要设计多个如图4所示的电路，这种通过在电路中增加多路选择器的固件升级方案过于复杂，因此，根据图3所示的系统，本申请提供一种集成模块固件升级的新的实现方式，该新的实现方式的具体过程如下。
在一具体的实现方式中，管理单元连接的存储器件中存储有多个集成模块的固件数据，在第一集成模块需要对固件数据进行升级的情况下，管理单元用于获取第一集成模块的固件数据写入请求以及新升级的第一固件数据，确定第一固件数据的第一目标地址，根据第一目标地址确定存储器件中的第一物理地址，管理单元先用于根据第一物理地址将存储器件中对应的原固件数据进行擦除，之后，在存储器件的第一物理地址中写入新升级的第一固件数据，管理单元用于将固件升级成功的指令发送至第一集成模块中。本申请通过重复上述步骤，实现多个集成模块的固件升级，具体过程不一一赘述。
在上述实现方式中，由于系统中多个集成模块共享管理单元连接的存储器件，存储器件中存储有多个集成模块的固件数据，管理单元用于在自身连接的存储器件中擦除集成模块原有的固件数据，写入对应的新升级的固件数据，不需要在系统中增加多路选择器即可实现固件升级，可以简化固件升级过程，提高固 件升级效率。
综上所述，在本申请提供的多集成模块的系统中，管理单元可以通过地址重映射的方式使得多个集成模块共享一个存储器件，系统中不需要为每个集成模块连接对应的存储器件，在多集成模块的场景下可以大量减少存储器件的数量，可以节约成本，并且多个集成模块共享一个存储器件，可以避免存在多个存储器件的情况下，由于多个存储器件的规格不同造成的归一性较差的问题。
下面结合附图说明本申请提供的一种存储器件共享的方法，如图5所示，图5是本申请实施例提供的一种存储器件共享的方法的流程图，该方法包括如下步骤S510～S540。
S510：管理单元对多个集成模块进行上电复位。
管理单元通过IO接口与多个集成模块相连，对多个集成模块进行上电复位。管理单元可以同时对多个集成模块进行上电复位，或者，可以依次对每个集成模块进行上电复位，或者，可以依次对多个集成模块中的部分集成模块进行上电复位，此处不作具体限定。
管理单元通过对多个集成模块进行上电复位，可以控制多个集成模块的启动顺序，可以避免多个集成模块的并发访问。
S520：管理单元接收多个集成模块发送的多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个集成模块和多个目标数据的读取或者写入请求存在一一对应关系，多个目标数据和多个目标地址存在一一对应关系。
在一种可能的实施方式中，管理单元根据多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个目标数据中的每个目标数据可以是集成模块的配置文件，或者，是集成模块的固件数据等，此处不作具体限定。管理单元根据多个目标数据确定多个目标数据对应的多个目标地址，多个目标地址中的每个目标数据的目标地址可以包括目标数据的起始地址和目标数据的长度，或者，包括目标数据的起始地址和末位地址等，此处不作具体限定。
S530：管理单元根据多个目标地址确定存储器件中的多个物理地址，其中，多个目标地址和多个物理地址存在一一对应关系。
在一种可能的实施方式中，管理单元可以进行地址重映射，根据多个目标地址确定存储器件中的多个物理地址，其中，物理地址可以包括目标数据的物理起始地址和目标数据长度，或者，包括目标数据的物理起始地址和物理末位地址等，此处不作具体限定。例如，管理单元根据多个目标地址中的目标数据的起始地址确定在存储器件中的多个目标数据的物理起始地址，多个目标数据长度不变，即可确定多个物理地址。
S540：管理单元根据多个物理地址在存储器件中读取或者写入多个目标数据。
管理单元根据多个物理地址在存储器件中读取多个目标数据。
在一种可能的实施方式中，在管理单元依次接收多个集成模块发送的多个目标数据的读取请求的情况下，管理单元依次根据多个物理地址在存储器件中读取多个目标数据，将多个目标数据依次发送至对应的多个集成模块中。
在另一种可能的实施方式中，在管理单元同时接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元根据多个物理地址在存储器件中读取多个目标数据，将多个目标数据缓存至缓存器中，将多个目标数据并行发送至对应的多个集成模块中。
管理单元根据多个物理地址在存储器件中写入多个目标数据。
在一种可能的实施方式中，在管理单元依次接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元依次根据多个物理地址在存储器件中写入多个目标数据。
在另一种可能的实施方式中，在管理单元同时接收多个集成模块发送的多个目标数据的写入请求的情况下，管理单元将多个目标数据缓存至缓存器中，依次获取缓存器中的一个目标数据，将目标数据写入对应的存储器件的物理地址中。管理单元不断重复上述过程，将多个目标数据写入存储器件中。
在本申请提供的一种存储器件共享的方法中，管理单元通过在多集成模块场景下实现接收多个集成模块发送的多个目标数据的读取或者写入请求，将多个目标数据的目标地址映射为一个存储器件中多个不同的物理地址，实现目标数据的地址重映射，实现多个集成模块共享一个存储器件。
综上所述，本申请提供的存储器件共享的方法可以在多集成模块的场景下，使得多个集成模块的数据可以在管理单元配置的一个存储器件中进行读取或者写入操作，可以大量减少多集成模块场景下存储器件的数量，可以节约成本。
如图6所示，图6是本申请提供的一种存储器件共享装置的结构示意图，该装置可以应用于图3所示 的多集成模块系统的管理单元中。该存储器件共享装置600包括：集成模块接口控制器610，用于接收多个集成模块发送的多个目标数据的读取或者写入请求，确定多个目标数据对应的多个目标地址，其中，多个集成模块和多个目标数据的读取或者写入请求存在一一对应关系，多个目标数据和多个目标地址存在一一对应关系；控制器模块620，用于根据多个目标地址确定存储器件中的多个物理地址，其中，多个目标地址和多个物理地址存在一一对应关系；存储器件接口控制器630，用于根据多个物理地址在存储器件中读取或者写入多个目标数据；IO控制器模块640，用于对多个集成模块进行上电复位；缓存模块650，用于将多个目标数据进行缓存；路由模块660，用于建立多个集成模块和管理单元对应的存储器件之间的多条通信连接，其中，多个集成模块和多条通信连接之间存在一一对应关系。
多个集成模块接口控制器用于与多个集成模块连接，每个集成模块接口控制器用于与路由模块、控制器模块相连接，存储器件接口控制器用于与存储器件连接，并且与路由模块、控制器模块连接。控制器模块用于与装置中所有的器件进行连接，用于控制装置中所有器件的工作。
在一具体的实施例中，在集成模块接口控制器是多个ASIC接口控制器，存储器件接口控制器是Flash接口控制器的情况下，控制器模块用于控制IO控制器模块，IO控制器模块用于同时控制四个ASIC接口控制器连接的四个ASIC的启动顺序。经IO控制器模块作用，第一ASIC接口控制器先用于接收第一ASIC发送的第一目标数据的读取请求，确定第一目标数据对应的第一目标地址，之后，路由模块用于通过与第一ASIC接口控制器对应的通信连接将第一目标地址传输至控制器模块中，控制器模块用于根据第一目标地址确定第一物理地址，将第一物理地址发送至Flash接口控制器中，Flash接口控制器用于根据第一物理地址在Flash器件中进行第一目标数据的访问。在获取到第一目标数据的情况下，Flash接口控制器可以将第一目标数据发送至路由模块，由路由模块通过对应的通信连接发送至对应的第一ASIC接口控制器中，再由第一集成模块接口控制器传输至第一ASIC中。
之后，第二ASIC接口控制器可以用于接收第二ASIC发送的第二目标数据的写入请求和第二目标数据，并确定第二目标数据的第二目标地址，与此同时，第三ASIC接口控制器可以用于接收第三ASIC发送的第三目标数据的写入请求和第三目标数据，并确定第三目标数据的第三目标地址。经路由模块传输，控制器模块可用于接收第二目标数据的写入请求、第二目标数据、第二目标地址以及第三目标数据的写入请求、第三目标数据和第三目标地址。由于只存在一个Flash接口控制器，控制器模块先用于将第三目标数据的写入请求、第三目标数据和第三目标地址存储在缓存模块中，根据第二目标地址确定第二物理地址，Flash接口控制器根据第二物理地址将第二目标数据写入连接的Flash器件中。在完成第二目标数据的写入请求的情况下，控制器模块可以用于从缓存模块中获取第三目标数据的写入请求、第三目标数据和第三目标地址，根据第三目标地址确定第三物理地址，Flash接口控制器根据第三物理地址将第三目标数据写入连接的Flash器件中。
综上所述，本申请提供的一种存储器件共享的装置，通过集成模块接口控制器、控制器模块、存储器件接口控制器、IO控制器模块、路由模块和缓存模块的相互配合，在多集成模块场景下实现接收多个集成模块发送的多个目标数据访问请求，将多个目标数据的目标地址映射为一个存储器件的不同的物理地址，实现目标数据的地址重映射，实现多个集成模块共享存储器件，可以减少多集成模块场景下的存储器件的数量，有利于降低成本。
本申请实施例提供一种芯片，该芯片可以包括上述器件或逻辑电路，该芯片在服务器上运行时，使得该服务器执行上述方法实施例所述的存储器件共享的方法。具体实现中，该芯片可以是前述内容中管理单元所处的芯片。
以上，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到各种等效的修改或替换，这些修改或替换都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (8)

  1. 一种多集成模块系统，其特征在于，所述多集成模块系统包括：
    存储器件，用于存储或者写入多个目标数据；
    多个集成模块，用于发出所述多个目标数据的读取或者写入请求，其中，所述多个集成模块和所述多个目标数据存在一一对应关系；
    管理单元，用于连接所述存储器件，以及，分别连接所述多个集成模块，用于接收多个所述集成模块发送的所述多个目标数据的读取或者写入请求，确定所述多个目标数据对应的多个目标地址，其中，所述多个目标数据和所述多个目标地址存在一一对应关系；根据所述多个目标地址确定所述存储器件中的多个物理地址，其中，所述多个目标地址和所述多个物理地址存在一一对应关系；根据所述多个物理地址在所述存储器件中读取或者写入所述多个目标数据。
  2. 根据权利要求1所述的系统，其特征在于，在接收多个所述集成模块发送的多个目标数据的读取或者写入请求，确定所述多个目标数据对应的多个目标地址之前，所述管理单元还用于对所述多个集成模块进行上电复位。
  3. 根据权利要求1或2所述的系统，其特征在于，所述管理单元用于接收多个集成模块发送的多个目标数据的访问请求包括：
    所述管理单元用于通过多个集成模块接口，接收所述多个集成模块发送的多个目标数据的读取或者写入请求，其中，所述多个集成模块接口和所述多个集成模块存在一一对应关系，所述多个集成模块中的每个集成模块接口包括串行外设接口SPI或者两线式串行总线I2C接口。
  4. 根据权利要求1-3任一权利要求所述的系统，其特征在于，在根据所述多个物理地址在所述存储器件中读取所述多个目标数据之后，所述管理单元具体用于：
    所述管理单元用于将所述多个目标数据发送至所述多个目标数据各自对应的所述多个集成模块中；或者，
    所述管理单元用于将所述多个目标数据缓存至缓存器，将所述缓存器中的多个目标数据并行发送至各自对应的多个集成模块中。
  5. 一种存储器件共享的方法，其特征在于，应用于多集成模块系统中，所述多集成模块系统中包括多个集成模块、管理单元以及存储器件，所述多个集成模块分别与所述管理单元连接，所述管理单元与所述存储器件进行连接，所述方法包括：
    所述管理单元接收多个集成模块发送的多个目标数据的读取或者写入请求，确定所述多个目标数据对应的多个目标地址，其中，所述多个集成模块和所述多个目标数据的读取或者写入请求存在一一对应关系，所述多个目标数据和所述多个目标地址存在一一对应关系；
    所述管理单元根据所述多个目标地址确定所述存储器件中的多个物理地址，其中，所述多个目标地址和所述多个物理地址存在一一对应关系；
    所述管理单元根据所述多个物理地址在所述存储器件中读取或者写入所述多个目标数据。
  6. 根据权利要求5所述的方法，其特征在于，在接收多个集成模块发送的多个目标数据的读取或者写入请求，确定所述多个目标数据对应的多个目标地址之前，所述方法还包括：
    所述管理单元对所述多个集成模块进行上电复位。
  7. 根据权利要求5或6所述的方法，其特征在于，所述管理单元依次接收多个集成模块发送的多个目标数据的访问请求包括：
    所述管理单元通过多个集成模块接口，接收所述多个集成模块发送的多个目标数据的读取或者写入请求，其中，所述多个集成模块接口和所述多个集成模块存在一一对应关系，所述多个集成模块中的每个集成模块接口包括串行外设接口SPI或者两线式串行总线I2C接口。
  8. 根据权利要求5-7任一权利要求所述的方法，其特征在于，在根据所述多个物理地址在所述存储 器件中读取所述多个目标数据之后，还包括：
    所述管理单元将所述多个目标数据发送至所述多个目标数据各自对应的所述多个集成模块中；或者，
    所述管理单元将所述多个目标数据缓存至缓存器，将所述缓存器中的多个目标数据并行发送至各自对应的多个集成模块中。
PCT/CN2023/106221 2022-07-19 2023-07-07 一种存储器件共享的方法、装置及系统 Ceased WO2024017073A1 (zh)

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