WO2024017146A1 - 数据拷贝方法、装置、计算机可读存储介质及电子设备 - Google Patents

数据拷贝方法、装置、计算机可读存储介质及电子设备 Download PDF

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Publication number
WO2024017146A1
WO2024017146A1 PCT/CN2023/107353 CN2023107353W WO2024017146A1 WO 2024017146 A1 WO2024017146 A1 WO 2024017146A1 CN 2023107353 W CN2023107353 W CN 2023107353W WO 2024017146 A1 WO2024017146 A1 WO 2024017146A1
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Prior art keywords
address
module
physical address
physical
target
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English (en)
French (fr)
Inventor
张斌
许圣建
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Horizon Journey Hangzhou Artificial Intelligence Technology Co Ltd
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Horizon Journey Hangzhou Artificial Intelligence Technology Co Ltd
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Priority to JP2025503446A priority Critical patent/JP7829797B2/ja
Priority to EP23842209.1A priority patent/EP4550155A4/en
Publication of WO2024017146A1 publication Critical patent/WO2024017146A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1081—Address translation for peripheral access to main memory, e.g. direct memory access [DMA]
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/109—Address translation for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/282—Cycle stealing DMA
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5061—Partitioning or combining of resources
    • G06F9/5077—Logical partitioning of resources; Management or configuration of virtualized resources
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/15—Use in a specific computing environment
    • G06F2212/151—Emulated environment, e.g. virtual machine
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/657—Virtual address space management

Definitions

  • the present disclosure relates to chip technology, and in particular, to a data copying method, device, computer-readable storage medium and electronic equipment.
  • a virtualization manager Using a virtualization manager, multiple virtual machines can run on one chip at the same time; the chip can include a Direct Memory Access (DMA) controller, and the chip can also be equipped with a system memory management unit (System Memory). Management Unit, SMMU).
  • DMA Direct Memory Access
  • System Memory System Memory Management Unit
  • Embodiments of the present disclosure provide a data copy method, device, computer-readable storage medium, and electronic equipment.
  • a data copy method including:
  • the direct memory access controller controls a target module to copy data according to the physical address, and the target module includes a memory module and/or a peripheral module.
  • a data copying device including:
  • a generation module configured to generate an address translation request through the target virtual machine, where the address translation request includes an intermediate physical address
  • a conversion module configured to convert the intermediate physical address included in the address conversion request generated by the generation module into a physical address through a memory management unit;
  • a configuration module configured to configure the physical address converted by the conversion module in the direct memory access controller through the target virtual machine
  • a control module configured to control a target module to copy data according to the physical address converted by the conversion module through the direct memory access controller, and the target module includes a memory module and/or a peripheral module.
  • a computer-readable storage medium stores a computer program, and the computer program is used to execute the above data copying method.
  • an electronic device including:
  • memory for storing instructions executable by the processor
  • the processor is configured to read the executable instructions from the memory and execute the instructions to implement the above data copy method.
  • a computer program product is provided.
  • instructions in the computer program product are executed by a processor, the above data copying method is implemented.
  • the address translation request can be generated by the target virtual machine, and the address translation request can be processed by the memory management unit.
  • the intermediate physical address is converted into a physical address, and the physical address is configured in the direct memory access controller through the target virtual machine. In the embodiment of the present disclosure, it is the physical address that is configured in the direct memory access controller, not the intermediate physical address. Address, the direct memory access controller can control the target module to copy data based on the physical address without using the system memory management unit for address translation. Therefore, the chip does not need to be equipped with a system memory management unit, which can reduce the manufacturing cost of the chip.
  • Figure 1 is a schematic structural diagram of a chip in the related art.
  • Figure 2 is a schematic diagram of the working principle of a chip in the related art.
  • FIG. 3 is a schematic diagram of another working principle of a chip in the related art.
  • Figure 4 is a schematic structural diagram of a chip in an embodiment of the present disclosure.
  • Figure 5 is a working principle diagram of a chip in an embodiment of the present disclosure.
  • Figure 6 is another working principle diagram of a chip in an embodiment of the present disclosure.
  • Figure 7 is a schematic flowchart of a data copy method provided by an exemplary embodiment of the present disclosure.
  • Figure 8 is a schematic flowchart of a data copy method provided by another exemplary embodiment of the present disclosure.
  • Figure 9 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 10 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 11 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 12 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 13-1 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 13-2 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 14-1 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 14-2 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 15-1 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 15-2 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 16 is a schematic flowchart of a data copy method provided by yet another exemplary embodiment of the present disclosure.
  • Figure 17 is a schematic structural diagram of a data copy device provided by an exemplary embodiment of the present disclosure.
  • Figure 18 is a schematic structural diagram of a data copy device provided by another exemplary embodiment of the present disclosure.
  • FIG. 19 is a structural diagram of an electronic device provided by an exemplary embodiment of the present disclosure.
  • the chip can be a System on Chip (SOC), as shown in Figure 1, Figure 2, and Figure 3.
  • the chip can include: Memory Management Unit (MMU), memory module, external Design module, direct memory access controller, system memory management unit and chip bus module.
  • MMU Memory Management Unit
  • memory module memory module
  • external Design module direct memory access controller
  • system memory management unit chip bus module.
  • a basic function of the memory management unit is virtual memory management, including but not limited to converting a virtual address (Virtual Address) into a physical address (Physical Address, PA), and converting a virtual address into an intermediate physical address. (Intermediate Physical Address, IPA), converts the intermediate physical address into a physical address, etc.
  • Virtual Address Virtual Address
  • PA Physical Address
  • IPA Intermediate Physical Address
  • the direct memory access controller is used for data copying, that is, copying data from one address space to another.
  • the system memory management unit can be responsible for the management of chip peripherals.
  • multiple virtual machines can be run on one chip at the same time; among them, the virtualization manager and multiple virtualization Machines can be software modules running on a chip.
  • the virtual machine can indirectly operate the hardware through the virtualization manager.
  • the source address and destination address of the data can usually be configured into the direct memory access controller in the form of IPA.
  • IPA direct memory access controller
  • Guest OS A when the virtual machine Guest OS A does not exclusively occupy the direct memory access controller, but shares the direct memory access controller with other virtual machines (in this case, the virtualization manager is responsible for implementing Mutual exclusion when each virtual machine accesses the direct memory access controller), Guest OS A can configure the source address and destination address in the form of IPA into the direct memory access controller through the virtualization manager.
  • the source address and destination address in the IPA form can be converted into the source address and destination address in the PA form.
  • the direct memory access controller can perform data copy processing based on the source address and target address in the PA form, that is, control the relevant module to copy the data from the address space corresponding to the source address in the PA form to the address space corresponding to the target address in the PA form.
  • the virtual machine can use the memory management unit to convert the address in the IPA form into the address in the PA form.
  • the virtual machine can also configure the address in the PA form into the direct memory access controller. In this way, the address in the IPA form
  • the conversion to the PA form address does not need to rely on other modules or units except the memory management unit. For example, it does not need to rely on the system memory management unit. Therefore, as shown in Figures 4 to 6, the chip does not need to be equipped with a system memory management unit. used for address translation, which can reduce the manufacturing cost of the chip.
  • Figure 7 is a schematic flowchart of a data copy method provided by an exemplary embodiment of the present disclosure.
  • the method shown in Figure 7 may include step 710, step 720, step 730 and step 740. Each step will be described below.
  • Step 710 Generate an address translation request through the target virtual machine, where the address translation request includes the intermediate physical address.
  • step 710 may be performed by the processor calling corresponding instructions stored in the memory, or may be performed by a generation module run by the processor.
  • the target virtual machine can be any virtual machine among multiple virtual machines running on the chip, such as Guest OS A in Figure 5 and Figure 6.
  • the "target” in the target virtual machine does not constitute a pair. Limitation of the target virtual machine.
  • the target virtual machine Before generating an address translation request, the target virtual machine can obtain the virtual address and call the memory management unit to translate the virtual address to an intermediate physical address. Next, the target virtual machine may generate an address translation request including the intermediate physical address, and the address translation request is used to request translation of the intermediate physical address into a physical address.
  • Step 720 Convert the intermediate physical address into a physical address through the memory management unit.
  • step 720 may be performed by the processor calling corresponding instructions stored in the memory, or may be performed by a conversion module run by the processor.
  • the target virtual machine can forward the address translation request to the memory management unit, and the memory management unit can respond to the address translation request by converting the intermediate physical address included in the address translation request into a physical address; or, the target virtual machine can The virtual machine may forward the address translation request to the virtualization manager, and the virtualization manager may respond to the address translation request by calling the memory management unit to translate the intermediate physical address included in the address translation request into a physical address.
  • Step 730 configure the physical address in the direct memory access controller through the target virtual machine.
  • step 730 may be performed by the processor calling corresponding instructions stored in the memory, or may be performed by a configuration module run by the processor.
  • the target virtual machine can configure the physical address in the direct memory access controller according to a preset copy method; or, the target virtual machine can determine a copy method that matches the physical address, and configure the physical address according to the determined copy method. In copy mode, the physical address is configured in the direct memory access controller.
  • Step 740 Use the direct memory access controller to control the target module to copy data according to the physical address.
  • the target module includes a memory module and/or a peripheral module.
  • step 740 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by a control module run by the processor.
  • the memory module, peripheral module, and direct memory access controller can interact with the chip bus module respectively.
  • direct memory access control can be realized based on the chip bus module's relay transmission of interactive information.
  • the controller controls the memory module and/or peripheral module. Under the control of the direct memory access controller, the memory module and/or peripheral module can copy data according to the physical address.
  • the address translation request can be generated by the target virtual machine, the intermediate physical address in the address translation request can be converted into a physical address by the memory management unit, and the physical address can be configured in the direct memory access controller by the target virtual machine.
  • the direct memory access controller is configured with a physical address instead of an intermediate physical address.
  • the direct memory access controller can control the target module to copy data based on the physical address without using the system.
  • the memory management unit performs address translation. Therefore, the chip does not need to be equipped with a system memory management unit, which can reduce the manufacturing cost of the chip.
  • the method further includes step 715.
  • Step 715 Send the intermediate physical address to the memory management unit through the virtualization manager.
  • step 715 may be performed by the processor calling corresponding instructions stored in the memory, or may be performed by a sending module run by the processor.
  • the target virtual machine can forward the address translation request to the virtualization manager.
  • the virtualization manager may send the intermediate physical address included in the address translation request to the memory management unit.
  • the memory management unit may convert the intermediate physical address into a physical address and return the physical address to the virtualization manager.
  • the virtualization manager may provide the physical address to the target virtual machine so that the target virtual machine configures the physical address in the direct memory access controller.
  • the intermediate physical address included in the address translation request can be efficiently and reliably provided to the memory management unit, so that the memory management unit can perform corresponding address translation processing.
  • the intermediate physical address includes an intermediate physical source address and an intermediate physical destination address
  • the physical address includes a physical source address translated from the intermediate physical source address, and a physical destination address translated from the intermediate physical destination address.
  • step 740 includes step 7402, step 7404 and step 7406.
  • Step 7402 Determine the data characteristic information of the stored data corresponding to the physical source address.
  • step 7402 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by the first determination sub-module in the control module run by the processor.
  • the stored data corresponding to the physical source address may refer to: the data stored in the address space corresponding to the physical source address.
  • Data data characteristic information includes but is not limited to data format, data size, data update cycle, etc.
  • Step 7404 Determine the copy method that matches the data characteristic information of the stored data corresponding to the physical source address.
  • step 7404 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by the second determination sub-module in the control module run by the processor.
  • the corresponding relationship between the data characteristic information and the copying mode can be set in advance.
  • the copying mode includes but is not limited to single transmission, circular transmission, double buffering mode, etc.
  • the copy method corresponding to the data characteristic information determined in step 7402 can be determined according to the preset correspondence relationship, and the determined copy method can be used as the copy method matching the data characteristic information.
  • Step 7406 Use the direct memory access controller to control the target module to copy the stored data from the physical source address to the physical target address according to the determined copy method.
  • step 7406 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by a control submodule in the control module run by the processor.
  • the physical address can include PA1 and PA2.
  • the data characteristic information T1 of the stored data Data1 corresponding to PA1 can be determined.
  • the copy method C1 corresponding to T1 can be determined, and
  • the target module is controlled by the direct memory access controller to copy Data1 from PA1 to PA2 according to the copy method of C1 (that is, copy the address space corresponding to PA1 to the address space corresponding to PA2).
  • PA1 can be either an address in the memory or an address of a peripheral on the bus
  • PA2 can be either an address in the memory or an address of a peripheral on the bus.
  • the copy path of Data1 can have the following four situations: address in memory ⁇ address in memory; address in memory ⁇ address of peripheral; address of peripheral ⁇ address of peripheral ;The address of the peripheral ⁇ the address in the memory.
  • the physical address obtained by converting the intermediate physical address included in the address translation request may include both a physical source address and a physical target address, and the data characteristic information of the stored data corresponding to the physical source address may be referenced to match the physical address.
  • Copy the stored data in a manner that matches the data characteristic information For example, if the amount of stored data is very small, a single transmission method can be used to efficiently copy the stored data. For another example, if the stored data needs Peripheral data that is periodically read can use cyclic transmission to copy the stored data, which will help ensure data copy efficiency and meet the demand for data.
  • the method further includes step 750 and step 760.
  • Step 750 In response to detecting data copy failure, determine whether the number of data copy failures reaches the preset number; if yes, execute step 760; if not, return to step 730.
  • Step 760 Output exception prompt information for the direct memory access controller.
  • the operation of determining whether the number of data copy failures reaches a preset number of times can be performed by the processor calling a corresponding instruction stored in the memory, or by the processor.
  • the running trigger module or output module executes.
  • the operation performed when the number of data copy failures does not reach the preset number can be performed by the processor calling corresponding instructions stored in the memory, or can be performed by a trigger module run by the processor (the trigger module is used to trigger the execution of step 730 ).
  • the operation performed when the number of data copy failures reaches a preset number of times may be performed by the processor calling corresponding instructions stored in the memory, or may be performed by an output module run by the processor.
  • the preset times may be 2 times, 3 times, 4 times, 5 times, or other times, which will not be listed one by one here.
  • the output form of the abnormal prompt information includes but is not limited to voice form, text form, light form, etc.
  • step 740 After controlling the target module to copy data according to the physical address by executing step 740, it can be detected whether the data copy is successful or failed.
  • the number of data copy failures can be determined, and the number of data copy failures can be compared with the preset number of times.
  • step 730 that is, configure the physical address in the direct memory access controller again through the target virtual machine. Next, the steps after step 730 will be executed again.
  • exception prompt information for the direct memory access controller can be output, such as broadcasting "DMA Controller Abnormal” through voice or displaying "DMA Controller Abnormal” through a pop-up window on the screen. ” to prompt manual troubleshooting of the cause of the direct memory access controller exception.
  • the causes of direct memory access controller abnormalities include but are not limited to clock errors, power supply errors, memory module errors, peripheral module errors, direct memory access controller errors, and electromagnetic Magnetic Compatibility (EMC) interference errors. wait.
  • the preset number of times is 2.
  • the physical address obtained by the intermediate physical address translation in the address translation request includes both the physical source address PA1 and the physical target address PA2. If the target virtual machine first converts PA1 and PA2 are configured in the direct memory access controller, and after the first control target module copies Data1 from PA1 to PA2, a data copy failure is detected, because the number of data copy failures at this time is 1, which is less than the preset number of times. , and then configure PA1 and PA2 in the direct memory access controller for the second time through the target virtual machine, and control the target module to copy Data1 from PA1 to PA2 for the second time.
  • control target module detects data copy failure after copying Data1 from PA1 to PA2 for the second time, since the number of data copy failures at this time is 2 times, which is equal to the preset number of times, the direct target can be output through voice form, text form, etc. Exception prompt information of the memory access controller.
  • control target module performs data copy according to the physical address
  • the data copy fails and the number of data copy failures does not reach the preset number
  • Data copy and if the data copy fails and the number of data copy failures reaches the preset number, no more attempts will be made to copy the data, but exception prompt information will be output to prompt manual troubleshooting of the exceptions in the memory access controller. , thereby eliminating the exception as soon as possible so that subsequent data copies can be performed normally.
  • the method further includes step 722 and step 724 .
  • Step 722 Obtain the occupancy mode of the direct memory access controller by the target virtual machine.
  • step 722 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by the first acquisition module run by the processor.
  • Step 724 Obtain control information for the direct memory access controller.
  • step 724 may be performed by the processor calling corresponding instructions stored in the memory, or may be performed by a second acquisition module run by the processor.
  • control information obtained in step 724 may also be called DMA control information, and the DMA control information may include at least one of the following: copy speed information, copy mode information, and data verification mode.
  • Step 730 includes step 7302 and step 7304.
  • Step 7302 Determine the configuration mode that matches the occupancy mode.
  • step 7302 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by the third determination sub-module in the configuration module run by the processor.
  • the configuration method matching the occupancy mode can be: direct configuration; if the occupancy mode is non-exclusive mode, the configuration method matching the occupancy mode can be: configuration through the virtualization manager.
  • Step 7304 Configure the physical address and control information in the direct memory access controller according to the configuration mode through the target virtual machine.
  • step 7304 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by the configuration submodule in the configuration module run by the processor.
  • the target virtual machine can directly configure the physical address and control information in the direct memory access controller; if the occupancy mode is non-exclusive mode, the target virtual machine can configure the physical address and control information through the virtualization manager. on the direct memory access controller.
  • a configuration method adapted to the occupancy mode can be used to efficiently and reliably configure the physical address and control information in the direct memory access controller. , so that the direct memory access controller can refer to the physical address and control information to perform data copy processing.
  • step 730 includes step 7306 and step 7308.
  • Step 7306 Determine the access permission information of the target virtual machine to the physical address through the virtualization manager.
  • step 7306 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by the fourth determination sub-module in the configuration module run by the processor.
  • the virtualization manager can determine the access permission information of the target virtual machine to the physical address according to the predetermined access permission control policy, and the access permission information can be used to characterize whether the target virtual machine has access permission to the physical address.
  • step 7306 includes the steps in Figure 13-1 73062 or step 73064 in Figure 13-2.
  • Step 73062 In response to the identification information of the target virtual machine being in the access whitelist, the virtualization manager determines that the access permission information indicates that the target virtual machine has access permission to the physical address.
  • Step 73064 In response to the identification information of the target virtual machine not being in the access whitelist, the virtualization manager determines that the access permission information indicates that the target virtual machine does not have access permission to the physical address.
  • the correspondence between the physical address and the access whitelist can be stored in advance. After converting the intermediate physical address included in the address translation request into a physical address through the memory management unit, the virtualization manager can determine the access whitelist corresponding to the physical address based on the pre-stored correspondence, and compile the access whitelist corresponding to the physical address. Traverse to determine whether the identification information of the target virtual machine is in the access whitelist corresponding to the physical address.
  • the access permission information determined by the virtualization manager can be expressed as "1" to indicate that the target virtual machine has access permission to the physical address. If the identification information of the target virtual machine is not in the access whitelist corresponding to the physical address, the access permission information determined by the virtualization manager may be expressed as "0" to indicate that the target virtual machine does not have access permission to the physical address.
  • a corresponding access blacklist can also be set for the physical address. If the identification information of the target virtual machine is in the access blacklist, the access permission information can indicate that the target virtual machine does not have access to the physical address. The access permissions, and if the identification information of the target virtual machine is not in the access blacklist, the access permission information can indicate that the target virtual machine has access permissions to the physical address.
  • Step 7308 In response to the access permission information indicating that the target virtual machine has access permission to the physical address, configure the physical address in the direct memory access controller through the target virtual machine.
  • step 7308 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by the configuration submodule in the configuration module run by the processor.
  • the virtualization manager can send the physical address to the target virtual machine, and the target virtual machine can configure the physical address in the direct memory access controller, so that the direct memory access controller
  • the access controller can perform data copy processing based on physical address.
  • the virtualization manager may not send the physical address to the target virtual machine, and the target virtual machine does not configure the physical address.
  • the access permission information of the target virtual machine to the physical address can be determined through the virtualization manager, and when the access permission information represents that the target virtual machine has access permission to the physical address, the target virtual machine can The physical address is configured in the direct memory access controller. Therefore, before configuring the physical address in the direct memory access controller, the embodiment of the present disclosure uses the virtualization manager to make a judgment related to the access permission, so as to determine the target virtual address. It limits which areas the machine can access through the direct memory access controller, which helps ensure the security of the target virtual machine accessing the memory through the direct memory access controller.
  • step 720 includes step 7202.
  • Step 7202 In response to the fact that the intermediate physical address does not exist in the recorded address, convert the intermediate physical address into a physical address through the memory management unit.
  • the method also includes step 770.
  • Step 770 In response to the access permission information indicating that the target virtual machine does not have access permission to the physical address, add the intermediate physical address to the recorded address.
  • step 770 may be performed by the processor calling corresponding instructions stored in the memory, or may be performed by an added module run by the processor.
  • the recorded addresses may be represented in the form of an address table.
  • the target virtual machine is Guest OS A. It is assumed that after Guest OS A generates an address translation request including the intermediate physical address IPA0, Guest OS A sends the address translation request to the virtualization manager. The virtualization manager can traverse the recorded addresses to determine whether IPA0 exists in the recorded addresses.
  • the virtualization manager can deny Guest OS A's address translation request if IPA0 is present in the recorded address.
  • the virtualization manager can call the memory management unit to convert IPA0 into a physical address.
  • the converted physical address can be PA0.
  • the virtualization manager can also determine the access permission information of Guest OS A to PA0. . If the access permission information indicates that Guest OS A does not have access permission to PA0, the virtualization manager can add IPA0 to the recorded address; if the access permission information indicates that Guest OS A has access permission to PA0, the virtualization manager may not By adding IPA0 to the recorded address, the virtualization manager can also send PA0 to Guest OS A so that Guest OS A configures PA0 in the direct memory access controller.
  • the virtualization manager can determine that IPA0 exists in the recorded address by traversing the recorded addresses. At this time, the virtualization manager can reject the address of Guest OS A. Convert the request without calling the memory management unit to convert IPA0 into a physical address, and without performing the access permission information determination step and physical address configuration step based on the physical address, which is beneficial to saving computing resources.
  • the method also includes step 780 and step 790.
  • Step 780 In response to the target virtual machine generating more than a preset number of address translation requests within a preset time period, and the access permission information corresponding to each address translation request indicating that the target virtual machine does not have access permission to the physical address, output permission confirmation.
  • Prompt information among which, the permission confirmation prompt information includes the identification information and physical address of the target virtual machine.
  • step 780 may be executed by the processor calling corresponding instructions stored in the memory, or may be executed by an output module run by the processor.
  • the preset duration can be 30 seconds, 1 minute, 2 minutes, etc.
  • the preset number can be 30, 40, 50, 60, 100, etc., which will not be listed here.
  • the virtualization manager determines that the access permission information corresponding to each address translation request indicates that the target virtual machine does not If you have access rights to the physical address, you can output the permission confirmation prompt information including the identification information of the target virtual machine and the physical address in voice or text form. For example, you can broadcast "Please confirm whether Guest OS A has access to PA0" through voice. "Access Permissions", for another example, you can display "Please confirm whether Guest OS A has access permissions to PA0" through a pop-up window on the screen to prompt manual confirmation whether Guest OS A has access permissions to PA0.
  • Step 790 In response to the triggering operation for the permission confirmation prompt information, add the identification information of the target virtual machine to the access whitelist.
  • step 790 may be performed by the processor calling corresponding instructions stored in the memory, or may be performed by an added module run by the processor.
  • the human voice can say “yes” or “no". If the artificial voice says “yes”, it can be considered that a trigger operation for the permission confirmation prompt information has been received, then, You can add the name of Guest OS A to the access whitelist; alternatively, two selection buttons “Yes” and “No” can be displayed below the pop-up window on the screen.
  • the target virtual machine if the target virtual machine generates a large number of address translation requests including the same intermediate physical address in a short period of time, and the access permission information corresponding to these address translation requests indicates that the target virtual machine does not have access to the physical address permission, you can use the output of permission confirmation prompt information to prompt you to manually confirm whether the target virtual machine has access permission to the physical address. If you manually confirm that the target virtual machine has access permission to the physical address, you can add the target to the access whitelist. Identification information of the virtual machine to ensure the accuracy of the information recorded in the access whitelist.
  • the data copy method provided by the embodiment of the present disclosure may include the following steps:
  • Step 1602 Guest OS A uses the MMU to convert the virtual source address VA1 and the virtual target address VA2 into the intermediate physical source address IPA1 and the intermediate physical target address IPA2;
  • Step 1604 Guest OS A requests the virtualization manager to use the MMU to convert the intermediate physical source address IPA1 and the intermediate physical target address IPA2 into the physical source address PA1 and the physical target address PA2;
  • Step 1606 Guest OS A configures the physical source address PA1, physical target address PA2, and control information into the DMA controller (suitable for the case where Guest OS A exclusively occupies the DMA controller); or, Guest OS A configures the physical source address PA1 , the physical target address PA2, and the control information are configured into the DMA controller through the virtualization manager (suitable for the situation where Guest OS A shares the DMA controller with other virtual machines);
  • Step 1608 the DMA controller controls the memory module or peripheral module to copy data from the physical source address PA1 to the physical target address PA2.
  • embodiments of the present disclosure can implement virtualization of a DMA controller on a chip without an SMMU, so that multiple virtual machines running on the chip can correctly and quickly use the DMA controller to copy data, which is beneficial to reducing chip costs.
  • Any data copy method provided by the embodiments of the present disclosure can be executed by any appropriate device with data processing capabilities, including but not limited to: terminal devices and servers.
  • any of the data copying methods provided by the embodiments of the present disclosure can be executed by the processor.
  • the processor executes any of the data copying methods mentioned in the embodiments of the present disclosure by calling corresponding instructions stored in the memory. No further details will be given below.
  • the aforementioned program can be stored in a computer-readable storage medium.
  • the execution includes the above Steps of method embodiments; the aforementioned storage media include: read-only memory (ROM), random access memory (RAM), magnetic disks or optical disks and other media that can store program codes.
  • Figure 17 is a schematic structural diagram of a data copy device provided by an exemplary embodiment of the present disclosure.
  • the device shown in Figure 17 can be used to implement any of the above method embodiments of the present disclosure.
  • the device shown in Figure 17 includes a generation module 1710, a conversion module 1720, a configuration module 1730 and a control module 1740.
  • Generating module 1710 configured to generate an address translation request through the target virtual machine, where the address translation request includes an intermediate physical address
  • the conversion module 1720 is configured to convert the intermediate physical address included in the address translation request generated by the generation module 1710 into a physical address through the memory management unit;
  • the configuration module 1730 is configured to configure the physical address converted by the conversion module 1720 into the direct memory access controller through the target virtual machine;
  • the control module 1740 is used to control the target module to copy data according to the physical address converted by the conversion module 1720 through the direct memory access controller.
  • the target module includes a memory module and/or a peripheral module.
  • the device further includes:
  • the sending module 1715 is configured to send the intermediate physical address to the memory management unit through the virtualization manager before converting the intermediate physical address included in the address translation request generated by the generation module 1710 into a physical address through the memory management unit.
  • the intermediate physical address includes an intermediate physical source address and an intermediate physical destination address
  • the physical address includes a physical source address translated from the intermediate physical source address, and a physical destination address translated from the intermediate physical destination address
  • control module 1740 includes:
  • the first determination sub-module 17402 is used to determine the data characteristic information of the stored data corresponding to the physical source address
  • the second determination sub-module 17404 is used to determine the copy method that matches the data characteristic information determined by the first determination sub-module 17402;
  • the control sub-module 17406 is used to control the target module through the direct memory access controller to copy the stored data from the physical source address to the physical target address according to the copy method determined by the second determination sub-module 17404.
  • the device further includes:
  • the trigger module 1750 is configured to trigger the configuration module in response to detecting that the data copy fails and the number of data copy failures does not reach the preset number after the control module 1740 controls the target module to copy data according to the physical address through the direct memory access controller. 1730;
  • the output module 1760 is configured to, after the control module 1740 controls the target module to copy data according to the physical address through the direct memory access controller, in response to detecting a data copy failure and the number of data copy failures reaches a preset number of times, output the direct memory Access controller exception prompt information.
  • the device further includes:
  • the first acquisition module 1722 is configured to acquire the occupancy mode of the direct memory access controller by the target virtual machine before configuring the physical address in the direct memory access controller through the target virtual machine;
  • the second acquisition module 1724 is used to acquire control information for the direct memory access controller
  • Configuration module 1730 including:
  • the third determination sub-module 17302 is used to determine the configuration mode that matches the occupancy pattern obtained by the first acquisition module 1722;
  • the configuration sub-module 17304 is configured to configure the physical address and the control information obtained by the second acquisition module 1724 in the direct memory access controller through the target virtual machine according to the configuration method determined by the third determination sub-module 17302.
  • Figure 19 illustrates a block diagram of an electronic device according to an embodiment of the present disclosure.
  • Electronic device 1900 includes one or more processors 1910 and memory 1920.
  • Processor 1910 may be a central processing unit (CPU) or other form of processing unit having data processing capabilities and/or instruction execution capabilities, and may control other components in electronic device 1900 to perform desired functions.
  • CPU central processing unit
  • Processor 1910 may be a central processing unit (CPU) or other form of processing unit having data processing capabilities and/or instruction execution capabilities, and may control other components in electronic device 1900 to perform desired functions.
  • Memory 1920 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory.
  • Volatile memory may include, for example, random access memory (RAM) and/or cache memory (cache), etc.
  • Non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc.
  • One or more computer program instructions may be stored on a computer-readable storage medium, and the processor 1910 may execute the one or more computer program instructions to implement the data copying method of any method embodiment of the present disclosure described above and /or other desired functionality.
  • the electronic device 1900 may further include an input device 1930 and an output device 1940, and these components are interconnected through a bus system and/or other forms of connection mechanisms (not shown).
  • the input device 1930 may also include, for example, a keyboard, a mouse, and the like.
  • the output device 1940 can output various information to the outside.
  • the output device 1940 may include, for example, a display, a speaker, a printer, a communication network and remote output devices connected thereto, and the like.
  • the electronic device 1900 may also include any other appropriate components depending on the specific application.
  • embodiments of the present disclosure may also be a computer program product, which includes computer program instructions that, when executed by a processor, cause the processor to perform the “exemplary method” described above in this specification
  • the steps in the data copy method according to any method embodiment of the present disclosure are described in the section.
  • the computer program product may be written with program code for performing operations of embodiments of the present disclosure in any combination of one or more programming languages, including object-oriented programming languages such as Java, C++, etc. , also includes conventional procedural programming languages, such as the "C" language or similar programming languages.
  • the program code may execute entirely on the user's computing device, partially on the user's device, and as a stand-alone software package Execute, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.
  • embodiments of the present disclosure may also be a computer-readable storage medium having computer program instructions stored thereon.
  • the computer program instructions when executed by a processor, cause the processor to execute the above-mentioned “example method” part of this specification.
  • the computer-readable storage medium may be any combination of one or more readable media.
  • the readable medium may be a readable signal medium or a readable storage medium.
  • the readable storage medium may include, for example, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or devices, or any combination thereof. More specific examples (non-exhaustive list) of readable storage media include: electrical connection with one or more conductors, portable disk, hard disk, random access memory (RAM), read only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above.

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Abstract

本公开的实施例公开了一种数据拷贝方法、装置、计算机可读存储介质及电子设备。其中，该方法包括：通过目标虚拟机生成地址转换请求，地址转换请求包括中间物理地址；通过内存管理单元将中间物理地址转换为物理地址；通过目标虚拟机将物理地址配置于直接存储器访问控制器中；通过直接存储器访问控制器控制目标模块按照物理地址进行数据拷贝，目标模块包括内存模块和/或外设模块。本公开的实施例能够降低芯片的制造成本。

Description

数据拷贝方法、装置、计算机可读存储介质及电子设备
本公开要求在2022年07月22日提交中国专利局、申请号为CN202210868561.8、发明名称为“数据拷贝方法、装置、计算机可读存储介质及电子设备”的中国专利申请的优先权，其全部内容通过引用结合在本公开中。
技术领域
本公开涉及芯片技术，尤其涉及一种数据拷贝方法、装置、计算机可读存储介质及电子设备。
背景技术
使用虚拟化管理器可以实现多个虚拟机同时在一颗芯片上运行；其中，芯片中可以包括直接存储器访问(Direct Memory Access，DMA)控制器，芯片中还可以配备系统内存管理单元(System Memory Management Unit，SMMU)。
发明内容
本公开的实施例提供了一种数据拷贝方法、装置、计算机可读存储介质及电子设备。
根据本公开实施例的一个方面，提供了一种数据拷贝方法，包括：
通过目标虚拟机生成地址转换请求，所述地址转换请求包括中间物理地址；
通过内存管理单元将所述中间物理地址转换为物理地址；
通过所述目标虚拟机将所述物理地址配置于直接存储器访问控制器中；
通过所述直接存储器访问控制器控制目标模块按照所述物理地址进行数据拷贝，所述目标模块包括内存模块和/或外设模块。
根据本公开实施例的另一个方面，提供了一种数据拷贝装置，包括：
生成模块，用于通过目标虚拟机生成地址转换请求，所述地址转换请求包括中间物理地址；
转换模块，用于通过内存管理单元将所述生成模块生成的所述地址转换请求包括的所述中间物理地址转换为物理地址；
配置模块，用于通过所述目标虚拟机将所述转换模块转换为的所述物理地址配置于直接存储器访问控制器中；
控制模块，用于通过所述直接存储器访问控制器控制目标模块按照所述转换模块转换为的所述物理地址进行数据拷贝，所述目标模块包括内存模块和/或外设模块。
根据本公开实施例的再一个方面，提供了一种计算机可读存储介质，所述存储介质存储有计算机程序，所述计算机程序用于执行上述数据拷贝方法。
根据本公开实施例的又一个方面，提供了一种电子设备，包括：
处理器；
用于存储所述处理器可执行指令的存储器；
所述处理器，用于从所述存储器中读取所述可执行指令，并执行所述指令以实现上述数据拷贝方法。
根据本公开实施例的又一个方面，提供了一种计算机程序产品，当所述计算机程序产品中的指令被处理器执行时，实现上述数据拷贝方法。
基于本公开上述实施例提供的数据拷贝方法、装置、计算机可读存储介质、电子设备及产品，可以通过目标虚拟机生成地址转换请求，通过内存管理单元将地址转换请求中的 中间物理地址转换为物理地址，并通过目标虚拟机将物理地址配置于直接存储器访问控制器中，由于本公开的实施例中，配置至直接存储器访问控制器中的是物理地址，而不是中间物理地址，直接存储器访问控制器基于物理地址即可控制目标模块进行数据拷贝，而无需利用系统内存管理单元进行地址转换，因此，芯片中无需配备系统内存管理单元，从而能够降低芯片的制造成本。
下面通过附图和实施例，对本公开的技术方案做进一步的详细描述。
附图说明
图1是相关技术中芯片的结构示意图。
图2是相关技术中芯片的工作原理示意图。
图3是相关技术中芯片的另一工作原理示意图。
图4是本公开的实施例中芯片的结构示意图。
图5是本公开的实施例中芯片的工作原理图。
图6是本公开的实施例中芯片的另一工作原理图。
图7是本公开一示例性实施例提供的数据拷贝方法的流程示意图。
图8是本公开另一示例性实施例提供的数据拷贝方法的流程示意图。
图9是本公开再一示例性实施例提供的数据拷贝方法的流程示意图。
图10是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图11是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图12是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图13-1是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图13-2是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图14-1是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图14-2是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图15-1是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图15-2是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图16是本公开又一示例性实施例提供的数据拷贝方法的流程示意图。
图17是本公开一示例性实施例提供的数据拷贝装置的结构示意图。
图18是本公开另一示例性实施例提供的数据拷贝装置的结构示意图。
图19是本公开一示例性实施例提供的电子设备的结构图。
具体实施方式
为了解释本公开，下面将参考附图详细地描述本公开的示例实施例，显然，所描述的实施例仅是本公开的一部分实施例，而不是全部实施例，应理解，本公开不受示例性实施例的限制。
应注意到：除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、数字表达式和数值不限制本公开的范围。
申请概述
芯片可以为系统级芯片(System on Chip，SOC)，如图1、图2、图3所示，相关技术中，芯片中可以包括：内存管理单元(Memory Management Unit，MMU)、内存模块、外设模块、直接存储器访问控制器、系统内存管理单元和芯片总线模块。
内存管理单元的一个基本功能是虚拟内存管理，包括但不限于将虚拟地址(Virtual Address)转换为物理地址(Physical Address，PA)，将虚拟地址转换为中间物理地址 (Intermediate Physical Address，IPA)，将中间物理地址转换为物理地址等。
直接存储器访问控制器用于数据拷贝，即实现数据从一个地址空间至另一个地址空间的复制。
系统内存管理单元可以负责芯片外设的管理。
需要说明的是，可以通过使用虚拟化管理器(或者称为虚拟化管理器模块)，实现多个虚拟机(Guest OS)同时在一颗芯片上运行；其中，虚拟化管理器和多个虚拟机均可以是运行在芯片上的软件模块。
实际工作时，虚拟机可以通过虚拟化管理器来间接操作硬件。当虚拟机使用直接存储器访问控制器时，通常可以将数据的源地址和目标地址以IPA形式配置到直接存储器访问控制器中。例如，如图2所示，当Guest OS A这一虚拟机独占直接存储器访问控制器时，Guest OS A可以将IPA形式的源地址和目标地址直接配置到直接存储器访问控制器中。再例如，如图3所示，当Guest OS A这一虚拟机未独占直接存储器访问控制器，而是与其他虚拟机共享直接存储器访问控制器时(这种情况下，虚拟化管理器负责实现各个虚拟机访问直接存储器访问控制器时的互斥)，Guest OS A可以通过虚拟化管理器将IPA形式的源地址和目标地址配置到直接存储器访问控制器中。
在IPA形式的源地址和目标地址配置到直接存储器访问控制器中之后，IPA形式的源地址和目标地址可以被转换为PA形式的源地址和目标地址。直接存储器访问控制器可以基于PA形式的源地址和目标地址，执行数据拷贝处理，即控制相关模块将数据从PA形式的源地址对应的地址空间复制到PA形式的目标地址对应的地址空间。
示例性系统
本公开的实施例中，虚拟机可以借助内存管理单元将IPA形式的地址转换为PA形式的地址，虚拟机还可以将PA形式的地址配置到直接存储器访问控制器中，这样，IPA形式的地址至PA形式的地址的转换无需依赖于除了内存管理单元之间的其他模块或者单元，例如无需依赖于系统内存管理单元，因此，如图4至图6所示，芯片中无需配备系统内存管理单元以用于地址转换，由此可以降低芯片的制造成本。
示例性方法
图7是本公开一示例性实施例提供的数据拷贝方法的流程示意图。图7所示的方法可以包括步骤710、步骤720、步骤730和步骤740，下面分别对各步骤进行说明。
步骤710，通过目标虚拟机生成地址转换请求，地址转换请求包括中间物理地址。
在一个可选示例中，步骤710可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的生成模块执行。
需要说明的是，目标虚拟机可以为芯片上运行的多个虚拟机中的任一虚拟机，例如为图5、图6中的Guest OS A，目标虚拟机中的“目标”并不构成对目标虚拟机的限定。
在生成地址转换请求之前，目标虚拟机可以获得虚拟地址，并调用内存管理单元将虚拟地址转换为中间物理地址。接下来，目标虚拟机可以生成包括中间物理地址的地址转换请求，地址转换请求用于请求将中间物理地址转换为物理地址。
步骤720，通过内存管理单元将中间物理地址转换为物理地址。
在一个可选示例中，步骤720可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的转换模块执行。
可选地，目标虚拟机可以将地址转换请求转发给内存管理单元，内存管理单元可以响应于地址转换请求，将地址转换请求包括的中间物理地址转换为物理地址；或者，目标虚 拟机可以将地址转换请求转发给虚拟化管理器，虚拟化管理器可以响应于地址转换请求，调用内存管理单元将地址转换请求包括的中间物理地址转换为物理地址。
步骤730，通过目标虚拟机将物理地址配置于直接存储器访问控制器中。
在一个可选示例中，步骤730可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的配置模块执行。
可选地，目标虚拟机可以按照预先设定的拷贝方式，将物理地址配置于直接存储器访问控制器中；或者，目标虚拟机可以确定与物理地址相适配的拷贝方式，并按照所确定的拷贝方式，将物理地址配置于直接存储器访问控制器中。
步骤740，通过直接存储器访问控制器控制目标模块按照物理地址进行数据拷贝，目标模块包括内存模块和/或外设模块。
在一个可选示例中，步骤740可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的控制模块执行。
如图5、图6所示，内存模块、外设模块、直接存储器访问控制器可以分别与芯片总线模块进行数据交互，这样，可以基于芯片总线模块对交互信息的中转传输，实现直接存储器访问控制器对内存模块和/或外设模块的控制，在直接存储器访问控制器的控制下，内存模块和/或外设模块可以按照物理地址进行数据拷贝。
本公开的实施例中，可以通过目标虚拟机生成地址转换请求，通过内存管理单元将地址转换请求中的中间物理地址转换为物理地址，并通过目标虚拟机将物理地址配置于直接存储器访问控制器中，由于本公开的实施例中，配置至直接存储器访问控制器中的是物理地址，而不是中间物理地址，直接存储器访问控制器基于物理地址即可控制目标模块进行数据拷贝，而无需利用系统内存管理单元进行地址转换，因此，芯片中无需配备系统内存管理单元，从而能够降低芯片的制造成本。
在图7所示实施例的基础上，如图8所示，在步骤720之前，该方法还包括步骤715。
步骤715，通过虚拟化管理器将中间物理地址发送至内存管理单元。
在一个可选示例中，步骤715可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的发送模块执行。
在目标虚拟机生成地址转换请求之后，目标虚拟机可以将地址转换请求转发给虚拟化管理器。在接收来自目标虚拟机的地址转换请求之后，虚拟化管理器可以将地址转换请求包括的中间物理地址发送至内存管理单元。在接收来自虚拟化管理器的中间物理地址之后，内存管理单元可以将中间物理地址转换为物理地址，并将物理地址返回给虚拟化管理器。在接收来自内存管理单元的物理地址之后，虚拟化管理器可以将物理地址提供给目标虚拟机，以使目标虚拟机将物理地址配置于直接存储器访问控制器中。
本公开的实施例中，借助于虚拟化管理器，可以将地址转换请求包括的中间物理地址高效可靠地提供给内存管理单元，以便内存管理单元执行相应的地址转换处理。
在一个可选示例中，中间物理地址包括中间物理源地址和中间物理目标地址，物理地址包括由中间物理源地址转换得到的物理源地址，以及由中间物理目标地址转换得到的物理目标地址。
在图7所示实施例的基础上，如图9所示，步骤740包括步骤7402、步骤7404和步骤7406。
步骤7402，确定物理源地址对应的存储数据的数据特征信息。
在一个可选示例中，步骤7402可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的控制模块中的第一确定子模块执行。
可选地，物理源地址对应的存储数据可以是指：物理源地址对应的地址空间所存储的 数据；数据特征信息包括但不限于数据格式、数据量大小、数据更新周期等。
步骤7404，确定与物理源地址对应的存储数据的数据特征信息匹配的拷贝方式。
在一个可选示例中，步骤7404可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的控制模块中的第二确定子模块执行。
需要说明的是，可以预先设置数据特征信息与拷贝方式之间的对应关系，拷贝方式包括但不限于单次传输、循环传输、双缓冲模式等。在步骤7404中，可以依据预先设置的对应关系，确定与步骤7402确定的数据特征信息对应的拷贝方式，确定出的拷贝方式即可作为与该数据特征信息匹配的拷贝方式。
步骤7406，通过直接存储器访问控制器控制目标模块按照确定出的拷贝方式，将存储数据由物理源地址拷贝至物理目标地址。
在一个可选示例中，步骤7406可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的控制模块中的控制子模块执行。
假设中间物理地址中包括的中间物理源地址为IPA1，中间物理地址中包括的中间物理目标地址为IPA2，由IPA1转换得到的物理源地址为PA1，由IPA2转换得到的物理目标地址为PA2，则物理地址中可以包括PA1和PA2。
在得到包括PA1和PA2的物理地址之后，可以确定PA1对应的存储数据Data1的数据特征信息T1，根据预先设置的数据特征信息与拷贝方式之间的对应关系，确定T1对应的拷贝方式C1，并通过直接存储器访问控制器控制目标模块按照C1这种拷贝方式，将Data1由PA1拷贝至PA2(即由PA1对应的地址空间复制至PA2对应的地址空间)。
可选地，PA1既可以是内存中的地址，也可以是总线上外设的地址；PA2既可以是内存中的地址，也可以是总线上外设的地址。这样，将Data1由PA1拷贝至PA2，Data1的拷贝路径可以有以下四种情况：内存中的地址→内存中的地址；内存中的地址→外设的地址；外设的地址→外设的地址；外设的地址→内存中的地址。
本公开的实施例中，由地址转换请求包括的中间物理地址转换得到的物理地址可以同时包括物理源地址和物理目标地址，并且，可以参考物理源地址对应的存储数据的数据特征信息，以与该数据特征信息相适配的方式，进行存储数据的拷贝，例如，如果存储数据的数据量非常少，可以采用单次传输方式，高效地实现存储数据的拷贝，再例如，如果存储数据是需要被周期性读取的外设数据，可以采用循环传输方式，实现存储数据的拷贝，如此有利于保证数据拷贝效率，且能够满足对数据的需求。
在图7所示实施例的基础上，如图10所示，在步骤740之后，该方法还包括步骤750和步骤760。
步骤750，响应于检测到数据拷贝失败，判断数据拷贝失败的次数是否达到预设次数；如果是，执行步骤760；如果否，返回执行步骤730。
步骤760，输出针对直接存储器访问控制器的异常提示信息。
在一个可选示例中，步骤750中的响应于检测到数据拷贝失败，判断数据拷贝失败的次数是否达到预设次数的操作可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的触发模块或者输出模块执行。在数据拷贝失败的次数未达到预设次数的情况下执行的操作可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的触发模块执行(触发模块用于触发步骤730的执行)。在数据拷贝失败的次数达到预设次数的情况下执行的操作可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的输出模块执行。
可选地，预设次数可以为2次、3次、4次、5次或者其他次数，在此不再一一列举。
可选地，异常提示信息的输出形式包括但不限于语音形式、文字形式、灯光形式等。
在通过执行步骤740控制目标模块按照物理地址进行数据拷贝之后，可以检测数据拷贝成功还是失败。
如果检测到数据拷贝失败，可以确定数据拷贝失败的次数，并将数据拷贝失败的次数与预设次数进行大小比较。
如果数据拷贝失败的次数小于预设次数，则可以返回执行步骤730，即通过目标虚拟机再次将物理地址配置于直接存储器访问控制器中，接下来，步骤730之后的步骤也会再次执行。
如果数据拷贝失败的次数大于或等于预设次数，则可以输出针对直接存储器访问控制器的异常提示信息，例如通过语音播报“DMA控制器异常”或者通过屏幕上的弹窗显示“DMA控制器异常”，以提示人工排查直接存储器访问控制器异常的原因。一般而言，直接存储器访问控制器异常的原因包括但不限于时钟出错、电源出错、内存模块出错、外设模块出错、直接存储器访问控制器出错、电磁兼容性(Electromagnetic Magnetic Compatibility，EMC)干扰出错等。
需要说明的是，如果数据拷贝失败的次数大于或等于预设次数，除了输出异常提示信息之外，还可以禁止上述的步骤710至步骤740的执行，直至人工排查出直接存储器访问控制器异常的原因，并消除直接存储器访问控制器的异常。
在一个可选的例子中，预设次数为2次，由地址转换请求中的中间物理地址转换得到的物理地址同时包括物理源地址PA1和物理目标地址PA2，如果通过目标虚拟机第一次将PA1和PA2配置于直接存储器访问控制器中，且第一次控制目标模块将Data1由PA1拷贝至PA2之后，检测到数据拷贝失败，由于此时数据拷贝失败的次数为1次，小于预设次数，接下来可以通过目标虚拟机第二次将PA1和PA2配置于直接存储器访问控制器中，并第二次控制目标模块将Data1由PA1拷贝至PA2。如果第二次控制目标模块将Data1由PA1拷贝至PA2之后，检测到数据拷贝失败，由于此时数据拷贝失败的次数为2次，等于预设次数，可以通过语音形式、文字形式等输出针对直接存储器访问控制器的异常提示信息。
本公开的实施例中，在控制目标模块按照物理地址进行数据拷贝之后，如果数据拷贝失败，且数据拷贝失败的次数未达到预设次数，则可以返回执行配置物理地址的步骤，以便再次尝试进行数据拷贝，而如果数据拷贝失败，且数据拷贝失败的次数达到预设次数，则不再尝试进行数据拷贝，而是进行异常提示信息的输出，以提示人工针对存储器访问控制器的异常进行原因排查，从而尽快消除异常，以便后续能够正常进行数据拷贝。
在图7所示实施例的基础上，如图11所示，在步骤730之前，该方法还包括步骤722和步骤724。
步骤722，获取目标虚拟机对直接存储器访问控制器的占用模式。
在一个可选示例中，步骤722可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的第一获取模块执行。
需要说明的是，占用模式存在两种可能的情况，一种是独占模式，另一种是非独占模式；其中，独占模式下，目标虚拟机可以直接与直接存储器访问控制器通信；非独占模式下，目标虚拟机可以通过虚拟化管理器与直接存储器访问控制器通信。其中，独占模式的情况可以参见图5，非独占模式的情况可以参见图6。
步骤724，获取针对直接存储器访问控制器的控制信息。
在一个可选示例中，步骤724可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的第二获取模块执行。
可选地，步骤724中获取的控制信息也可以称为DMA控制信息，DMA控制信息中可以包括以下至少一项：拷贝速度信息、拷贝模式信息、数据校验方式。
步骤730包括步骤7302和步骤7304。
步骤7302，确定与占用模式匹配的配置方式。
在一个可选示例中，步骤7302可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的配置模块中的第三确定子模块执行。
如果占用模式为独占模式，与占用模式匹配的配置方式可以为：直接配置；如果占用模式为非独占模式，与占用模式匹配的配置方式可以为：通过虚拟化管理器进行配置。
步骤7304，通过目标虚拟机将物理地址和控制信息按照配置方式配置于直接存储器访问控制器中。
在一个可选示例中，步骤7304可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的配置模块中的配置子模块执行。
如果占用模式为独占模式，目标虚拟机可以将物理地址和控制信息直接配置于直接存储器访问控制器；如果占用模式为非独占模式，目标虚拟机可以将物理地址和控制信息通过虚拟化管理器配置于直接存储器访问控制器。
本公开的实施例中，参考目标虚拟机对直接存储器访问控制器的占用模式，可以采用与该占用模式相适配的配置方式，高效可靠地将物理地址和控制信息配置于直接存储器访问控制器，以便直接存储器访问控制器参考物理地址和控制信息，进行数据拷贝处理。
在图7所示实施例的基础上，如图12所示，步骤730包括步骤7306和步骤7308。
步骤7306，通过虚拟化管理器确定目标虚拟机对物理地址的访问权限信息。
在一个可选示例中，步骤7306可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的配置模块中的第四确定子模块执行。
可选地，虚拟化管理器可以按照预定的访问权限控制策略，确定目标虚拟机对物理地址的访问权限信息，访问权限信息可以用于表征目标虚拟机是否具有对物理地址的访问权限。
在一种具体实施方式中，物理地址存在对应的访问白名单，访问白名单中包括多个虚拟机标识信息，在图12所示实施例的基础上，步骤7306包括图13-1中的步骤73062或者图13-2中的步骤73064。
步骤73062，响应于目标虚拟机的标识信息位于访问白名单中，通过虚拟化管理器确定访问权限信息表征目标虚拟机具有对物理地址的访问权限。
步骤73064，响应于目标虚拟机的标识信息不位于访问白名单中，通过虚拟化管理器确定访问权限信息表征目标虚拟机不具有对物理地址的访问权限。
需要说明的是，可以预先对物理地址与访问白名单之间的对应关系进行存储。在通过内存管理单元将地址转换请求包括的中间物理地址转换为物理地址之后，虚拟化管理器可以依据预先存储的对应关系，确定物理地址对应的访问白名单，并对物理地址对应的访问白名单进行遍历，以确定目标虚拟机的标识信息是否位于物理地址对应的访问白名单中。
如果目标虚拟机的标识信息位于物理地址对应的访问白名单中，虚拟化管理器确定的访问权限信息可以表示为“1”，以表征目标虚拟机具有对物理地址的访问权限。如果目标虚拟机的标识信息不位于物理地址对应的访问白名单中，虚拟化管理器确定的访问权限信息可以表示为“0”，以表征目标虚拟机不具有对物理地址的访问权限。
采用这种实施方式，由于访问白名单的设置，通过判断目标虚拟机的标识信息是否位于物理地址对应的访问白名单中，可以高效可靠地确定目标虚拟机是否具有对物理地址的访问权限。
需要指出的是，具体实现时，也可以为物理地址设置对应的访问黑名单，如果目标虚拟机的标识信息位于访问黑名单中，访问权限信息可以表征目标虚拟机不具有对物理地址 的访问权限，而如果目标虚拟机的标识信息不位于访问黑名单中，访问权限信息可以表征目标虚拟机具有对物理地址的访问权限。
步骤7308，响应于访问权限信息表征目标虚拟机具有对物理地址的访问权限，通过目标虚拟机将物理地址配置于直接存储器访问控制器中。
在一个可选示例中，步骤7308可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的配置模块中的配置子模块执行。
如果访问权限信息表征目标虚拟机具有对物理地址的访问权限，虚拟化管理器可以将物理地址发送至目标虚拟机，目标虚拟机可以将物理地址配置于直接存储器访问控制器中，这样，直接存储器访问控制器可以基于物理地址，执行数据拷贝处理。
如果访问权限信息表征目标虚拟机不具有对物理地址的访问权限，虚拟化管理器可以不将物理地址发送至目标虚拟机，目标虚拟机也不进行物理地址的配置。
本公开的实施例中，可以通过虚拟化管理器确定目标虚拟机对物理地址的访问权限信息，并在访问权限信息表征目标虚拟机具有对物理地址的访问权限的情况下，通过目标虚拟机将物理地址配置于直接存储器访问控制器中，由此，本公开的实施例在将物理地址配置至直接存储器访问控制器中之前，利用虚拟化管理器进行了访问权限相关的判断，从而对目标虚拟机通过直接存储器访问控制器能够访问到哪些区域进行了限制，进而有利于保证目标虚拟机通过直接存储器访问控制器访问内存的安全性。
在图13-1或者图13-2所示实施例的基础上，如图14-1或者图14-2所示，步骤720包括步骤7202。
步骤7202，响应于已记录地址中不存在中间物理地址，通过内存管理单元将中间物理地址转换为物理地址。
该方法还包括步骤770。
步骤770，响应于访问权限信息表征目标虚拟机不具有对物理地址的访问权限，向已记录地址中添加中间物理地址。
在一个可选示例中，步骤770可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的添加模块执行。
可选地，已记录地址可以通过地址表的形式表示。
在一个可选的例子中，目标虚拟机为Guest OS A，假设Guest OS A生成了包括的中间物理地址为IPA0的地址转换请求之后，Guest OS A将地址转换请求发送给了虚拟化管理器，虚拟化管理器可以对已记录地址进行遍历，以确定已记录地址中是否存在IPA0。
如果已记录地址中存在IPA0，虚拟化管理器可以拒绝Guest OS A的地址转换请求。
如果已记录地址中不存在IPA0，虚拟化管理器可以调用内存管理单元将IPA0转换为物理地址，转换得到的物理地址可以为PA0，虚拟化管理器还可以确定Guest OS A对PA0的访问权限信息。如果访问权限信息表征Guest OS A不具有对PA0的访问权限，虚拟化管理器可以向已记录地址中添加IPA0；如果访问权限信息表征Guest OS A具有对PA0的访问权限，虚拟化管理器可以不向已记录地址中添加IPA0，虚拟化管理器还可以将PA0发送至Guest OS A，以便Guest OS A将PA0配置于直接存储器访问控制器中。
对于上段中访问权限信息表征Guest OS A不具有对PA0的访问权限的情况，由于虚拟化管理器向已记录地址中添加了IPA0，当Guest OS A再次生成包括的中间物理地址为IPA0的地址转换请求，并将地址转换请求发送给虚拟化管理器之后，虚拟化管理器通过对已记录地址进行遍历，可以确定已记录地址中存在IPA0，此时，虚拟化管理器可以拒绝Guest OS A的地址转换请求，而无需调用内存管理单元将IPA0转换为物理地址，也无需基于物理地址执行访问权限信息确定步骤以及物理地址配置步骤，这样有利于节约运算资源。
本公开的实施例中，通过已记录地址的更新和运用，无需通过内存管理单元对任一地址转换请求中的中间物理地址均进行转换，而仅需要对不存在于已记录地址中的中间物理地址进行转换，从而有利于节约运算资源。
在图13-1或者图13-2所示实施例的基础上，如图15-1或者图15-2所示，该方法还包括步骤780和步骤790。
步骤780，响应于目标虚拟机在预设时长内生成大于预设数量的地址转换请求，且各地址转换请求对应的访问权限信息均表征目标虚拟机不具有对物理地址的访问权限，输出权限确认提示信息；其中，权限确认提示信息包括目标虚拟机的标识信息和物理地址。
在一个可选示例中，步骤780可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的输出模块执行。
可选地，预设时长可以为30秒、1分钟、2分钟等，预设数量可以为30个、40个、50个、60个、100个等，在此不再一一列举。
假设目标虚拟机在1分钟内生成了105个包括物理地址的地址转换请求，且基于物理地址对应的访问白名单，虚拟化管理器确定各地址转换请求对应的访问权限信息均表征目标虚拟机不具有对物理地址的访问权限，则可以通过语音形式、文字形式等输出包括目标虚拟机的标识信息和物理地址的权限确认提示信息，例如，可以通过语音播报“请确认Guest OS A是否具有对PA0的访问权限”，再例如，可以通过屏幕上的弹窗显示“请确认Guest OS A是否具有对PA0的访问权限”，以提示人工确认Guest OS A是否具有对PA0的访问权限。
步骤790，响应于针对权限确认提示信息的触发操作，向访问白名单中添加目标虚拟机的标识信息。
在一个可选示例中，步骤790可以由处理器调用存储器存储的相应指令执行，也可以由被处理器运行的添加模块执行。
可选地，针对步骤780中输出的权限确认提示信息，人工可以语音说“是”或者“否”，如果人工语音说“是”，可以认为接收到针对权限确认提示信息的触发操作，那么，可以向访问白名单中添加Guest OS A的名称；或者，屏幕上弹窗的下方还可以显示“是”和“否”两个选择按钮，针对步骤780中输出的权限确认提示信息，人工可以手动选择“是”这个选择按钮或者“否”这个选择按钮，如果人工手动选择“是”这个选择按钮，可以认为接收到针对权限确认提示信息的触发操作，那么，可以向访问白名单中添加Guest OS A的名称。
本公开的实施例中，如果目标虚拟机在短时间内生成了包括相同中间物理地址的大量地址转换请求，且这些地址转换请求对应的访问权限信息均表征目标虚拟机不具有对物理地址的访问权限，则可以通过权限确认提示信息的输出，提示人工确认目标虚拟机是否具有对物理地址的访问权限，如果人工确认目标虚拟机具有对物理地址的访问权限，则可以向访问白名单中添加目标虚拟机的标识信息，从而保证访问白名单中记录的信息的准确性。
可选地，如图16所示，本公开的实施例提供的数据拷贝方法可以包括如下步骤：
步骤1602，Guest OS A使用MMU将虚拟源地址VA1和虚拟目标地址VA2转换成中间物理源地址IPA1和中间物理目标地址IPA2；
步骤1604，Guest OS A向虚拟化管理器请求使用MMU将中间物理源地址IPA1和中间物理目标地址IPA2转换成物理源地址PA1和物理目标地址PA2；
步骤1606，Guest OS A将物理源地址PA1、物理目标地址PA2，以及控制信息配置到DMA控制器中(适于Guest OS A独占DMA控制器的情况)；或者，Guest OS A将物理源地址PA1、物理目标地址PA2，以及控制信息通过虚拟化管理器配置到DMA控制器中(适于Guest OS A与其他虚拟机共享DMA控制器的情况)；
步骤1608，DMA控制器控制内存模块或者外设模块将数据从物理源地址PA1拷贝至物理目标地址PA2。
综上，本公开的实施例可以在没有SMMU的芯片上实现DMA控制器的虚拟化，使得芯片上运行的多个虚拟机均可以正确快速使用DMA控制器拷贝数据，有利于降低芯片成本。
本公开实施例提供的任一种数据拷贝方法可以由任意适当的具有数据处理能力的设备执行，包括但不限于：终端设备和服务器等。或者，本公开实施例提供的任一种数据拷贝方法可以由处理器执行，如处理器通过调用存储器存储的相应指令来执行本公开实施例提及的任一种数据拷贝方法。下文不再赘述。
本领域普通技术人员可以理解：实现上述方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成，前述的程序可以存储于计算机可读存储介质中，该程序在执行时，执行包括上述方法实施例的步骤；而前述的存储介质包括：只读存储器(ROM)、随机存取存储器(RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
示例性装置
图17是本公开一示例性实施例提供的数据拷贝装置的结构示意图。图17所示的装置可以用于实现本公开上述任一方法实施例。图17所示的装置包括生成模块1710、转换模块1720、配置模块1730和控制模块1740。
生成模块1710，用于通过目标虚拟机生成地址转换请求，地址转换请求包括中间物理地址；
转换模块1720，用于通过内存管理单元将生成模块1710生成的地址转换请求包括的中间物理地址转换为物理地址；
配置模块1730，用于通过目标虚拟机将转换模块1720转换为的物理地址配置于直接存储器访问控制器中；
控制模块1740，用于通过直接存储器访问控制器控制目标模块按照转换模块1720转换为的物理地址进行数据拷贝，目标模块包括内存模块和/或外设模块。
在一个可选示例中，如图18所示，该装置还包括：
发送模块1715，用于在通过内存管理单元将生成模块1710生成的地址转换请求包括的中间物理地址转换为物理地址之前，通过虚拟化管理器将中间物理地址发送至内存管理单元。
在一个可选示例中，中间物理地址包括中间物理源地址和中间物理目标地址，物理地址包括由中间物理源地址转换得到的物理源地址，以及由中间物理目标地址转换得到的物理目标地址；
如图18所示，控制模块1740，包括：
第一确定子模块17402，用于确定物理源地址对应的存储数据的数据特征信息；
第二确定子模块17404，用于确定与第一确定子模块17402确定的数据特征信息匹配的拷贝方式；
控制子模块17406，用于通过直接存储器访问控制器控制目标模块按照第二确定子模块17404确定的拷贝方式，将存储数据由物理源地址拷贝至物理目标地址。
在一个可选示例中，如图18所示，该装置还包括：
触发模块1750，用于在控制模块1740通过直接存储器访问控制器控制目标模块按照物理地址进行数据拷贝之后，响应于检测到数据拷贝失败，且数据拷贝失败的次数未达到预设次数，触发配置模块1730；
输出模块1760，用于在控制模块1740通过直接存储器访问控制器控制目标模块按照物理地址进行数据拷贝之后，响应于检测到数据拷贝失败，且数据拷贝失败的次数达到预设次数，输出针对直接存储器访问控制器的异常提示信息。
在一个可选示例中，如图18所示，该装置还包括：
第一获取模块1722，用于在通过目标虚拟机将物理地址配置于直接存储器访问控制器中之前，获取目标虚拟机对直接存储器访问控制器的占用模式；
第二获取模块1724，用于获取针对直接存储器访问控制器的控制信息；
配置模块1730，包括：
第三确定子模块17302，用于确定与第一获取模块1722获取的占用模式匹配的配置方式；
配置子模块17304，用于通过目标虚拟机将物理地址和第二获取模块1724获取的控制信息按照第三确定子模块17302确定的配置方式配置于直接存储器访问控制器中。
在本公开的装置中，上述公开的各种可选实施例、可选实施方式和可选示例，都可以根据需要进行灵活的选择和组合，从而实现相应的功能和效果，本公开不进行一一列举。
示例性电子设备
图19图示了根据本公开实施例的电子设备的框图。电子设备1900包括一个或多个处理器1910和存储器1920。
处理器1910可以是中央处理单元(CPU)或者具有数据处理能力和/或指令执行能力的其他形式的处理单元，并且可以控制电子设备1900中的其他组件以执行期望的功能。
存储器1920可以包括一个或多个计算机程序产品，所述计算机程序产品可以包括各种形式的计算机可读存储介质，例如易失性存储器和/或非易失性存储器。易失性存储器例如可以包括随机存取存储器(RAM)和/或高速缓冲存储器(cache)等。非易失性存储器例如可以包括只读存储器(ROM)、硬盘、闪存等。在计算机可读存储介质上可以存储一个或多个计算机程序指令，处理器1910可以运行一个或多个计算机程序指令，以实现上文所述的本公开的任一方法实施例的数据拷贝方法以及/或者其他期望的功能。
在一个可选示例中，电子设备1900还可以包括：输入装置1930和输出装置1940，这些组件通过总线系统和/或其他形式的连接机构(未示出)互连。
该输入装置1930还可以包括例如键盘、鼠标等等。
该输出装置1940可以向外部输出各种信息。该输出装置1940可以包括例如显示器、扬声器、打印机、以及通信网络及其所连接的远程输出设备等等。
当然，为了简化，图19中仅示出了该电子设备1900中与本公开有关的组件中的一些，省略了诸如总线、输入/输出接口等等的组件。除此之外，根据具体应用情况，电子设备1900还可以包括任何其他适当的组件。
示例性计算机程序产品和计算机可读存储介质
除了上述方法和设备以外，本公开的实施例还可以是计算机程序产品，其包括计算机程序指令，所述计算机程序指令在被处理器运行时使得所述处理器执行本说明书上述“示例性方法”部分中描述的根据本公开任一方法实施例的数据拷贝方法中的步骤。
所述计算机程序产品可以以一种或多种程序设计语言的任意组合来编写用于执行本公开实施例操作的程序代码，所述程序设计语言包括面向对象的程序设计语言，诸如Java、C++等，还包括常规的过程式程序设计语言，诸如“C”语言或类似的程序设计语言。程序代码可以完全地在用户计算设备上执行、部分地在用户设备上执行、作为一个独立的软件包 执行、部分在用户计算设备上部分在远程计算设备上执行、或者完全在远程计算设备或服务器上执行。
此外，本公开的实施例还可以是计算机可读存储介质，其上存储有计算机程序指令，所述计算机程序指令在被处理器运行时使得所述处理器执行本说明书上述“示例性方法”部分中描述的根据本公开任一方法实施例的数据拷贝方法中的步骤。
所述计算机可读存储介质可以采用一个或多个可读介质的任意组合。可读介质可以是可读信号介质或者可读存储介质。可读存储介质例如可以包括但不限于电、磁、光、电磁、红外线、或半导体的系统、装置或器件，或者任意以上的组合。可读存储介质的更具体的例子(非穷举的列表)包括：具有一个或多个导线的电连接、便携式盘、硬盘、随机存取存储器(RAM)、只读存储器(ROM)、可擦式可编程只读存储器(EPROM或闪存)、光纤、便携式紧凑盘只读存储器(CD-ROM)、光存储器件、磁存储器件、或者上述的任意合适的组合。
以上结合具体实施例描述了本公开的基本原理，但是，需要指出的是，在本公开中提及的优点、优势、效果等仅是示例而非限制，不能认为这些优点、优势、效果等是本公开的各个实施例必须具备的。另外，上述公开的具体细节仅是为了示例的作用和便于理解的作用，而非限制，上述细节并不限制本公开为必须采用上述具体的细节来实现。
本领域的技术人员可以对本公开进行各种改动和变型而不脱离本申请的精神和范围。这样，倘若本申请的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (11)

  1. 一种数据拷贝方法，包括：
    通过目标虚拟机生成地址转换请求，所述地址转换请求包括中间物理地址；
    通过内存管理单元将所述中间物理地址转换为物理地址；
    通过所述目标虚拟机将所述物理地址配置于直接存储器访问控制器中；
    通过所述直接存储器访问控制器控制目标模块按照所述物理地址进行数据拷贝，所述目标模块包括内存模块和/或外设模块。
  2. 根据权利要求1所述的方法，其中，所述通过内存管理单元将所述中间物理地址转换为物理地址之前，所述方法还包括：
    通过虚拟化管理器将所述中间物理地址发送至所述内存管理单元。
  3. 根据权利要求1所述的方法，其中，所述中间物理地址包括中间物理源地址和中间物理目标地址，所述物理地址包括由所述中间物理源地址转换得到的物理源地址，以及由所述中间物理目标地址转换得到的物理目标地址；
    所述通过所述直接存储器访问控制器控制目标模块按照所述物理地址进行数据拷贝，包括：
    确定所述物理源地址对应的存储数据的数据特征信息；
    确定与所述数据特征信息匹配的拷贝方式；
    通过所述直接存储器访问控制器控制目标模块按照所述拷贝方式，将所述存储数据由所述物理源地址拷贝至所述物理目标地址。
  4. 根据权利要求1所述的方法，其中，所述通过所述直接存储器访问控制器控制目标模块按照所述物理地址进行数据拷贝之后，所述方法还包括：
    响应于检测到所述数据拷贝失败，且所述数据拷贝失败的次数未达到预设次数，返回执行所述通过所述目标虚拟机将所述物理地址配置于直接存储器访问控制器中的步骤；
    响应于检测到所述数据拷贝失败，且所述数据拷贝失败的次数达到所述预设次数，输出针对所述直接存储器访问控制器的异常提示信息。
  5. 根据权利要求1所述的方法，其中，
    所述通过所述目标虚拟机将所述物理地址配置于直接存储器访问控制器中之前，所述方法还包括：
    获取所述目标虚拟机对所述直接存储器访问控制器的占用模式；
    获取针对所述直接存储器访问控制器的控制信息；
    所述通过所述目标虚拟机将所述物理地址配置于直接存储器访问控制器中，包括：
    确定与所述占用模式匹配的配置方式；
    通过所述目标虚拟机将所述物理地址和所述控制信息按照所述配置方式配置于所述直接存储器访问控制器中。
  6. 一种数据拷贝装置，包括：
    生成模块，用于通过目标虚拟机生成地址转换请求，所述地址转换请求包括中间物理地址；
    转换模块，用于通过内存管理单元将所述生成模块生成的所述地址转换请求包括的所述中间物理地址转换为物理地址；
    配置模块，用于通过所述目标虚拟机将所述转换模块转换为的所述物理地址配置于直接存储器访问控制器中；
    控制模块，用于通过所述直接存储器访问控制器控制目标模块按照所述转换模块转换为的所述物理地址进行数据拷贝，所述目标模块包括内存模块和/或外设模块。
  7. 根据权利要求6所述的装置，还包括：
    发送模块，用于在通过内存管理单元将所述生成模块生成的所述地址转换请求包括的所述中间物理地址转换为物理地址之前，通过虚拟化管理器将所述生成模块生成的所述地址转换请求包括的所述中间物理地址发送至所述内存管理单元。
  8. 根据权利要求6所述的装置，其中，所述中间物理地址包括中间物理源地址和中间物理目标地址，所述物理地址包括由所述中间物理源地址转换得到的物理源地址，以及由所述中间物理目标地址转换得到的物理目标地址；
    所述控制模块，包括：
    第一确定子模块，用于确定所述物理源地址对应的存储数据的数据特征信息；
    第二确定子模块，用于确定与所述第一确定子模块确定的所述数据特征信息匹配的拷贝方式；
    控制子模块，用于通过所述直接存储器访问控制器控制目标模块按照所述第二确定子模块确定的所述拷贝方式，将所述存储数据由所述物理源地址拷贝至所述物理目标地址。
  9. 一种计算机可读存储介质，所述存储介质存储有计算机程序，所述计算机程序用于执行上述权利要求1-5中任一所述的数据拷贝方法。
  10. 一种电子设备，包括：
    处理器；
    用于存储所述处理器可执行指令的存储器；
    所述处理器，用于从所述存储器中读取所述可执行指令，并执行所述指令以实现上述权利要求1-5中任一所述的数据拷贝方法。
  11. 一种计算机程序产品，当所述计算机程序产品中的指令被处理器执行时，实现上述权利要求1-5中任一所述的数据拷贝方法。
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