WO2024092517A1

WO2024092517A1 - Methods and apparatus for data transmission

Info

Publication number: WO2024092517A1
Application number: PCT/CN2022/129018
Authority: WO
Inventors: Chulong LIANG; Wei Zhao; Jin Xu; Liguang LI; Guanghui Yu; Jian KANG; Qiang Fu
Original assignee: ZTE Corp
Current assignee: ZTE Corp
Priority date: 2022-11-01
Filing date: 2022-11-01
Publication date: 2024-05-10
Anticipated expiration: 2025-05-01
Also published as: EP4520015A4; US20250088310A1; CN119072903A; KR20250002374A; EP4520015A1

Abstract

Methods, apparatus, and systems that relate to rate matching scheme design for polar coding, PAC coding, or other pre-transformed polar coding are disclosed. In one example aspect, a method for digital communication includes determining, by a first node, an output bit sequence having E bits based on an input bit sequence c having K bits, wherein the output bit sequence is determined by performing a polar transform and a repetition operation; wherein the output bit sequence is determined based on an output of the polar transform and an output of the repetition operation; wherein the input of the repetition operation is a portion of a bit sequence before the polar transform. The method also includes transmitting, by the first node, a signal including the output bit sequence to a second node.

Description

METHODS AND APPARATUS FOR DATA TRANSMISSION

TECHNICAL FIELD

This invention is related to the channel coding technique in communication systems.

BACKGROUND

Mobile telecommunication technologies are moving the world toward an increasingly connected and networked society. In comparison with the existing wireless networks, next generation systems and communication techniques will need to support a much wider range of use-case characteristics and provide a more complex and sophisticated range of access requirements and flexibilities.

Long-Term Evolution (LTE) is a standard for wireless communication for mobile devices and data terminals developed by 3rd Generation Partnership Project (3GPP) . LTE Advanced (LTE-A) is a wireless communication standard that enhances the LTE standard. The 5th generation of wireless system, known as 5G, advances the LTE and LTE-Awireless standards and is committed to supporting higher data-rates, large number of connections, ultra-low latency, high reliability and other emerging business needs.

SUMMARY

This patent document discloses techniques, among other things, rate matching design for polar coding, PAC coding and/or other pre-transformed polar coding schemes.

In one example aspect, a first digital communication method is disclosed. The method includes determining, by a first node, an output bit sequence having E bits based on an input bit sequence c having K bits, wherein the output bit sequence is determined by performing a polar transform and a repetition operation; wherein the output bit sequence is determined based on an output of the polar transform and an output of the repetition operation; wherein the input of the repetition operation is a portion of a bit sequence before the polar transform; and transmitting, by the first node, a signal including the output bit sequence to a second node.

In another example aspect, another method of wireless communication is disclosed. The method includes receiving, by a second node, a signal including an output bit sequence having E bits from a first node; and determining, by the second node, an input bit sequence c having K bits based on the signal, wherein the output bit sequence is determined by performing a polar transform and a repetition operation; wherein the output bit sequence is determined based on an output of the polar transform and an output of the repetition operation; wherein the input of the repetition operation is a portion of a bit sequence before the polar transform.

In yet another example aspect, a wireless communication device comprising a process that is configured or operable to perform the above-described methods is disclosed.

In yet another example aspect, a computer readable storage medium is disclosed. The computer-readable storage medium stores code that, upon execution by a processor, causes the processor to implement an above-described method.

BRIEF DESCRIPTION OF THE DRAWING

FIG. 1 shows an example of factor graph of the polar matrix G ⁽³²⁾ .

FIG. 2A shows a diagram of polar coding with rate matching in 3GPP 5G standard.

FIG. 2B shows a diagram of PAC coding.

FIG. 3 shows a diagram for a convolution transform with either a convolution vector g = [g ₀, g ₁, ..., g _m] or a convolution polynomial g (D) = g ₀ + g ₁·D + ... + g _m-1·D ^m-1 + g _m·D ^m over GF (2) .

FIG. 4A shows a first rate matching example for polar codes without both a pre-transform and an interleaving.

FIG. 4B shows a second rate matching example for polar codes with an interleaving.

FIG. 4C shows a third rate matching example for polar codes with a pre-transform.

FIG. 4D shows a fourth rate matching example for polar codes with both a pre-transform and an interleaving.

FIG. 4E shows a fifth rate matching example for polar codes without both a pre-transform and an interleaving.

FIG. 4F shows a sixth rate matching example for polar codes with an interleaving.

FIG. 4G shows a seventh rate matching example for polar codes with a pre-transform.

FIG. 4H shows an eighth rate matching example for polar codes with both a pre-transform and an interleaving.

FIG. 5 shows a diagram for a pre-transform defined by a recursive feedback polynomial q (D) = q ₀ + q ₁·D + ... + q _m-1·D ^m-1 + q _m·D ^m (or equivalently a recursive feedback sequence q = [q ₀, q ₁, ..., q _m] ) over GF (2) with q ₀ = 1.

FIG. 6 shows a diagram for a pre-transform defined by both a generator polynomial g (D) and a recursive feedback polynomial q (D) .

FIG. 7 shows block error rate of Example 1 over AWGN channels.

FIG. 8 shows an exemplary block diagram of a hardware platform that may be a part of a network device or a communication device.

FIG. 9 shows an example of network communication including a base station

(BS) and user equipment (UE) based on some implementations of the disclosed technology.

FIG. 10 is a flowchart representation of a method for digital communication in accordance with one or more embodiments of the present technology.

FIG. 11 is a flowchart representation of another method for digital communication in accordance with one or more embodiments of the present technology.

DETAILED DESCRIPTION

Headings for the various sections below are used to facilitate the understanding of the disclosed subject matter and do not limit the scope of the claimed subject matter in any way. Accordingly, one or more features of one section can be combined with one or more features of another section. Furthermore, 5G terminology is used for the sake of clarity of explanation, but the techniques disclosed in the present document are not limited to 5G technology only and may be used in wireless systems that implemented other protocols.

This application discloses methods and apparatuses related to rate matching schemes for pre-transformed polar coding in wireless communication systems.

In the fifth generation (5G) mobile communications standard of the 3 ^rd Generation Partnership Project (3GPP) , low-density parity-check (LDPC) codes are used for data transmission. However, LDPC codes is worse than polar codes in short payload size (also called transport block size (TBS) ) . Also, LDPC codes have high error floors (at block error rate (BLER) of 0.0001) . To fulfill the future ultra-reliable low latency communication (URLLC) , we have to design more powerful channel codes.

Polarization-adjusted convolutional (PAC) codes can achieve finite-length bounds in moderate decoding complexity. PAC codes are a revolution of polar codes. As a result, PAC codes have code lengths with power of 2 (N =2 ⁿ with positive integer n) as polar codes. However, to efficiently transmitting a payload (or transport block (TB) ) in different wireless channel environments, it does not always have a code length of N = 2 ⁿ in time and frequency resources allocated by a base station (BS) . As a result, rate matching schemes are needed for applying PAC codes in wireless communications. In this application, methods and apparatus for design in rate matching for polar coding, PAC coding, or other pre-transformed polar coding are proposed with good performance.

Introduction

Notations

GF (2) denotes the Galois field of size 2 with two elements “0” and “1” .

br (i) is the bit-reversal function.

floor (x) denotes the largest integer not greater than x.

ceil (x) denotes the smallest integer not less than x.

round (x) is the round function such that round (x) is the integer closest to x, for example, round (3.2) = 3, round (4.8) = 5, round (2.5) = 3, round (-1.9) = -2, round (-3.4) = -3.

max (x, y) denotes the maximum value between x and y, i.e.,

mod (x, y) denotes the remainder of x divided by y. For example, mod (5, 3) = 2 and mod (3, 5) = 3.

X _i, j denotes the element in the i-th row and j-th column of a matrix X, where a boldface capital letter is used to represent a matrix.

[x ₀, x ₁, ..., x _Y-1] denotes a sequence (or a vector) of length Y containing elements x ₀, x ₁, ..., x _Y-1. A boldface small letter x is used to represent a sequence (or a vector) [x ₀, x ₁, ..., x _Y-1] .

{x ₀, x ₁, ..., x _Y-1} denotes a set with Y distinct elements x ₀, x ₁, ..., x _Y-1, i.e., for any i ≠ j, x _i ≠ x _j.

<x ₀, x ₁, ..., x _Y-1> denotes an ordered set with Y distinct elements x ₀, x ₁, ..., x _Y-1, i.e., for any i ≠ j, x _i ≠ x _j. Let X = <x ₀, x ₁, ..., x _Y-1>, X (i) denotes the i-th element x _i in the ordered set X.

For a set X, |X| denotes the set size, i.e., the number of elements in the set X.

Z _N = {0, 1, ..., N-2, N-1} denotes the integer set containing all non-negative integers smaller than N.

Indices for sequences, vectors, or matrices are starting from zero.

Introduction to polar matrix

This section introduces some concepts of use of a polar matrix according to various embodiments.

We denote G ^(N) as a polar transform matrix (or simply, polar matrix) with N rows and N columns, where N is power of 2, i.e., N =2 ⁿ and n is a positive integer. n is called the order of the polar matrix of G ^(N) and N is called the polar matrix size of G ^(N) , i.e., G ^(N) is of size N.

G ^(N) can be one of the following:

● 1)

● 2)

● 3) G ^(N) = P ^(N) ;

● 4) G ^(N) = B ^(N) ·P ^(N) ;

Here, all the matrix operations are over GF (2) , e.g.,

is the n-th Kronecker power of the matrix P ⁽²⁾ , and B ^(N) is a bit- reversal permutation matrix with N rows and N columns, 0 is an all-zero matrix with N/2 rows and N/2 columns.

Let

be the element at the i-th row and j-th column of the bit-reversal permutation matrix B ^(N) . Then,

for 0 ≤ i ＜ N and 0 ≤ j ＜ N, where br (i) is the bit-reversal function defined as

and [b _n-1, b _n-2, ..., b ₁, b ₀] is the n-bit binary expansion of the integer i, i.e.,

A sequence (or a vector) x of length N over GF (2) multiplying the polar matrix G ^(N) over GF (2) is called polar transform on the sequence (vector) x. Denote y = x·G ^(N) , where the vector-matrix multiplication is over GF (2) . Then, y is the polar transform of x.

FIG. 1 shows the factor graph of the polar matrix G ⁽³²⁾ of size N = 32 and the matrix G ⁽³²⁾ is shown below as:

Polar Matrix G ⁽³²⁾

Introduction to 3GPP 5G polar coding

Some example embodiments of use of polar coding according to 3GPP 5G standard are disclosed in this section.

In the 3GPP 5G standard, polar codes are used in control channel transmission. The diagram of 5G polar coding with rate matching is shown in FIG. 2A.

Denote Q a data bit index set of size K, i.e., |Q| = K, where Q is a subset of an integer set Z _N = {0, 1, ..., N-2, N-1} containing all non-negative integers smaller than N. Then, the encoding of an input bit sequence c = [c ₀, c ₁, ..., c _K-2, c _K-1] into an output bit sequence e = [e ₀, e ₁, ..., e _E-2, e _E-1] for the 5G polar coding with a polar matrix G ^(N) includes the following operations, where K is the length of the input bit sequence, E is the length of the output bit sequence, K and E are positive integers, K ＜ N, and K < E.

As shown in FIG. 2A, there are 3 main steps involved in the process: adding frozen bits, polar transform and rate matching. The rate matching step further includes sub-block interleaving and bit selection.

(1) Adding frozen bits: The adding-frozen-bits operation combines N-K zero bits with the input bit sequence c to form a polar transform input sequence u = [u ₀, u ₁, ..., u _N-2, u _N-1] of length N according to the data bit index set Q.

The polar transform input sequence u is determined by the input bit sequence c, the data bit index set Q, and the polar matrix size N as follows:

(2) Polar transform: The polar transform is converting a first length-N bit sequence into a second length-N bit sequence by multiplying the first length-N bit sequence and the polar matrix G ^(N) over GF (2) . A polar transform output bit sequence d = [d ₀, d ₁, ..., d _N-2, d _N- ₁] of length N is determined by the polar transform input sequence u and the polar matrix G ^(N) as d = u·G ^(N) , where the vector-matrix multiplication is over GF (2) .

(3) Rate matching: The rate matching of polar coding in 5G includes two operations: Sub-block interleaving and bit selection.

(3.1) Sub-block interleaving: An interleaving output bit sequence d'= [d' ₀, d' ₁, ..., d' _N-2, d' _N-1] of length N is determined by a sub-block interleaver pattern π of length 32, the polar transform output bit sequence d, and the polar matrix size N as follows:

where π = [π ₀, π ₁, π ₂, π ₃, π ₄, π ₅, π ₆, π ₇, π ₈, π ₉, π ₁₀, π ₁₁, π ₁₂, π ₁₃, π ₁₄, π ₁₅, π ₁₆, π ₁₇, π ₁₈, π ₁₉, π ₂₀, π ₂₁, π ₂₂, π ₂₃, π ₂₄, π ₂₅, π ₂₆, π ₂₇, π ₂₈, π ₂₉, π ₃₀, π ₃₁] = [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31] , and J = [J ₀, J ₁, ..., J _N-2, J _N-1] is an interleaver pattern of length N determined by the sub-block interleaver pattern π and the polar matrix size N. The interleaver pattern J is a permutation of the integer sequence [0, 1, 2, ..., N-2, N-1] .

(3.2) Bit selection: There are three types of bit selection named as repetition, puncturing and shortening. With the interleaving output bit sequence d', the length of the input bit sequence K, the length of the output bit sequence E, and the polar matrix size N, the output bit sequence e is determined as follows:

● Repetition: For E ≥ N, e _k = d' _mod _(k, _N) , k = 0, 1, 2, ..., E-2, E-1.

● Puncturing: For E ＜ N and K/E ≤ 7/16, e _k = d' _N-E+k, k = 0, 1, 2, ..., E-2, E-1.

● Shortening: For E ＜ N and K/E > 7/16, e _k = d' _k, k = 0, 1, 2, ..., E-2, E-1.

Polarization-adjusted convolutional (PAC) coding

Some example embodiments of PAC coding are disclosed in this section.

PAC codes is a class of pre-transformed polar codes. Specifically, PAC codes are polar codes using convolution transform.

The diagram of PAC coding is shown in FIG. 2B. Denote Q a data bit index set of size K, i.e., |Q| = K, where Q is a subset of an integer set Z _N = {0, 1, ..., N-2, N-1} containing all non-negative integers smaller than N. Then, the encoding of an input bit sequence c = [c ₀, c ₁, ..., c _K-2, c _K-1] into an output bit sequence e = [e ₀, e ₁, ..., e _E-2, e _E-1] by the polar matrix G ^(N) includes the following operations, where K is the length of the input bit sequence, E is the length of the output bit sequence, K ＜ N, K ＜ E and K and E are positive integers.

FIG. 3 discloses an example diagram for a convolution transform with either a convolution vector g = [g ₀, g ₁, ..., g _m] or a convolution polynomial g (D) = g ₀ + g ₁·D + ... + g _m- ₁·D ^m-1 + g _m·D ^m over GF (2) .

(1) Rate profiling: The rate profiling is an operation same as the adding-frozen-bits operation in the 5G polar coding. Thus, the two terms “adding-frozen-bits” and “rate profiling” are used interchangeably to refer to the same operation in this document. The rate-profiling operation combines N-K zero bits with the input bit sequence c to form a rate-profiling output sequence v = [v ₀, v ₁, ..., v _N-2, v _N-1] of length N according to the data bit index set Q. Specifically, the rate-profiling output bit sequence v is determined by the input bit sequence c, the data bit index set Q, and the polar matrix size N as follows.

(2) Convolution transform: the convolution transform is an operation converting a convolution input bit sequence of length N into a convolution output bit sequence of length N by performing convolution on the convolution input bit sequence and a generator bit sequence g = [g ₀, g ₁, ..., g _m-1, g _m] of length- (m+1) defining a generator polynomial g (D) = g ₀ + g ₁·D + ... + g _m-1·D ^m-1+ g _m·D ^m over GF (2) , where m is the memory length of the convolution transform or equivalently the generator polynomial degree of the generator polynomial g (D) and D is a dummy variable representing delay in a digital circuit.

The convolution transform with the generator polynomial g (D) is shown in FIG. 3.

Specifically, a convolution transform output bit sequence u = [u ₀, u ₁, ..., u _N-2, u _N-1] of length N is determined by the rate-profiling output bit sequence v, the generator polynomial g (D) (or equivalently the generator bit sequence g) and the polar matrix size N as follows, where v _i-k = 0 for i ＜ k.

Polar transform: The polar transform is the same as in the 5G polar coding. A polar transform output bit sequence d = [d ₀, d ₁, ..., d _N-2, d _N-1] of length N is determined according to the convolution transform output bit sequence u and the polar matrix G ^(N) as d = u·G ^(N) , where the vector-matrix multiplication is over GF (2) .

Introduction to embodiments

This section discloses multiple examples related to rate matching for polar coding, PAC coding, or other pre-transformed polar coding with good performance.

FIG. 4 shows diagrams of eight example rate matching methods. The details of the examples will be explained in the following embodiments.

Embodiment 1

This section discloses an encoding method in a wireless communication system.

In one example, a method of digital communication comprising determining by a first node, an output bit sequence having E bits based on an input bit sequence c having K bits, wherein the output bit sequence is determined by performing a polar transform and a repetition operation; wherein the output bit sequence is determined based on an output of the polar transform and an output of the repetition operation; wherein the input of the repetition operation is a portion of a bit sequence before the polar transform.

The method further comprises transmitting, by the first node, a signal including the output bit sequence to a second node.

In another example, a method of digital communication, comprising: obtaining, by a first node, an input bit sequence c = [c ₀, c ₁, ..., c _K-1] ; determining, by the first node, an output bit sequence e = [e ₀, e ₁, ..., e _E-1] by performing at least one of the following: a rate profiling, a repetition, a pre-transform, a polar transform using a polar matrix G ^(N) , an interleaving, a concatenation; and transmitting, by the first node, a signal including the output bit sequence e to a second node.

Here, K is the input bit sequence length; E is the output bit sequence length; N is a polar matrix size being a power of two; K and E are positive integers with K ＜ N and N ≤ E.

Embodiment 2

This section discloses a decoding method used in a wireless communication system.

In one example, a method of digital communication, comprising receiving, by a second node, a signal including an output bit sequence having E bits from a first node. The method further comprises determining by a first node, an input bit sequence c having K bits based on the signal, wherein the output bit sequence is determined by performing a polar transform and a repetition operation; wherein the output bit sequence is determined based on an output of the polar transform and an output of the repetition operation; wherein the input of the repetition operation is a portion of a bit sequence before the polar transform.

In another example, a method of digital communication, comprising receiving, by a second node, a signal including an output bit sequence e = [e ₀, e ₁, ..., e _E-1] sent by a first node; and determining, by the second node, one or more estimated bit sequences of an input bit sequence c = [c ₀, c ₁, ..., c _K-1] .

In one example, the output bit sequence e is determined by the first node by at least one of the following: a rate profiling, a repetition, a pre-transform, a polar transform using a polar matrix G ^(N) , an interleaving, a concatenation; wherein, K is the input bit sequence length; E is the output bit sequence length; N is a polar matrix size being a power of two; K and E are positive integers with K ＜ N and N ≤ E.

Embodiment 3

This section discloses examples involving the output bit sequence comprising two parts.

Embodiment 3 is based on the above embodiments.

The output bit sequence e = [e ₀, e ₁, ..., e _E-1] comprises a first part bit sequence d’ = [d’ ₀, d’ ₁, d’ ₂, ..., d’ _N-1] of length N and a second part bit sequence c’ = [c’ ₀, c’ ₁, c’ ₂, ..., c’ _N-E-1] of length N -E.

In some embodiments, the output bit sequence e = [e ₀, e ₁, ..., e _E-1] is a concatenation of the first part bit sequence d’ = [d’ ₀, d’ ₁, d’ ₂, ..., d’ _N-1] and the second part bit sequence c’ = [c’ ₀, c’ ₁, c’ ₂, ..., c’ _N-E-1] as follows:

FIGS. 4A to 4H give eight specific examples for the output bit sequence e being a concatenation of the first part bit sequence d’ and the second part bit sequence c’.

Embodiment 4

This section discloses examples involving the first part bit sequence is the output of an interleaving.

Embodiment 4 is based on the above embodiments.

In some embodiments, the first part bit sequence d’ = [d’ ₀, d’ ₁, d’ ₂, ..., d’ _N-1] is an output bit sequence of an interleaving, wherein, specific examples are given in FIGS. 4B, 4D, 4F, and 4H; the interleaving comprises obtaining, by the first node, an interleaving input bit sequence d = [d ₀, d ₁, ..., d _N-1] of length N; and determining, by the first node, the first part bit sequence d'= [d' ₀, d' ₁, ..., d' _N-1] of length N; wherein, N is the polar matrix size.

The interleaving determines the first part bit sequence d'= [d' ₀, d' ₁, ..., d' _N-1] corresponding to the interleaving input bit sequence d by an interleaver pattern J = [J ₀, J ₁, ..., J _N-2, J _N-1] of length N as d′ _i=d _Ji, i = 0, 1, 2, ..., N-2, N-1, i.e., the i-th bit of the first part bit sequence d'is equal to the J _i-th bit of the interleaving input bit sequence d = [d ₀, d ₁, ..., d _N-1] , wherein, the interleaver pattern J can be any permutation of the integer sequence [0, 1, 2, ..., N-2, N-1] .

A first specific example of the interleaver pattern J = [J ₀, J ₁, ..., J _N-2, J _N-1] is determined as by the polar matrix size N and a sub-block interleaver pattern π = [π ₀, π ₁, π ₂, π ₃, π ₄, π ₅, π ₆, π ₇, π ₈, π ₉, π ₁₀, π ₁₁, π ₁₂, π ₁₃, π ₁₄, π ₁₅, π ₁₆, π ₁₇, π ₁₈, π ₁₉, π ₂₀, π ₂₁, π ₂₂, π ₂₃, π ₂₄, π ₂₅, π ₂₆, π ₂₇, π ₂₈, π ₂₉, π ₃₀, π ₃₁] = [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31] as follows.

A second specific example of the interleaver pattern J = [J ₀, J ₁, ..., J _N-2, J _N-1] is that the relationship between the index i and the i-th element J _i in the interleaver pattern J satisfies the following quadratic form:

J _i=mod (f ₁·i+f ₂·i ², N) ,

where some examples of parameters f ₁ and f ₂ depending on the polar matrix size N are summarized in TABLE 1.

N	f ₁	f ₂
64	7	16
128	15	32
256	15	32
512	31	64
1024	31	64
2048	31	64
4096	31	64

TABLE 1 Interleaver parameters

A third specific example of the interleaver pattern J = [J ₀, J ₁, ..., J _N-2, J _N-1] with N = 8 is J = [J ₀, J ₁, J ₂, J ₃, J ₄, J ₅, J ₆, J ₇] = [5, 4, 7, 1, 6, 0, 2, 3] .

Embodiment 5

This section discloses examples involving the interleaving input bit sequence is a polar transform output bit sequence.

Embodiment 5 is based on the above embodiments.

In some embodiments, the interleaving input bit sequence d = [d ₀, d ₁, ..., d _N-1] is a polar transform output bit sequence of length N determined by a polar transform using a polar matrix G ^(N) , wherein, specific examples are given in FIGS. 4B, 4D, 4F, and 4H.

Embodiment 6

This section discloses examples involving the first part bit sequence is a polar transform output bit sequence.

Embodiment 6 is based on the above embodiments.

In some embodiments, the first part bit sequence d’ = [d’ ₀, d’ ₁, d’ ₂, ..., d’ _N-1] is equal to a polar transform output bit sequence d = [d ₀, d ₁, d ₂, ..., d _N-1] of length N determined by a polar transform using a polar matrix G ^(N) , wherein, for i = 0, 1, 2, ..., N-1, d’ _i = d _i with specific examples given in FIGS. 4A, 4C, 4E, and 4G.

Embodiment 7

This section discloses examples involving a polar transform.

Embodiment 7 is based on the above embodiments.

The polar transform determining the polar transform output bit sequence d = [d ₀, d ₁, d ₂, ..., d _N-1] comprises obtaining, by the first node, a polar transform input bit sequence u = [u ₀, u ₁, ..., u _N-1] ; and determining, by the first node, a polar transform output bit sequence d = [d ₀, d ₁, ..., d _N-1] .

Here, the polar transform input bit sequence u = [u ₀, u ₁, ..., u _N-1] is of length equal to the polar matrix size N. The polar transform output bit sequence d is determined by the first node by multiplying the polar transform input bit sequence u and the polar matrix G ^(N)of N rows and N columns, i.e., d = u·G ^(N) , wherein the vector-matrix multiplication is performed over GF (2) .

Embodiment 8

This section discloses examples involving the polar transform input bit sequence is a pre-transform output bit sequence.

Embodiment 8 is based on the above embodiments.

In some embodiments, the polar transform input bit sequence u = [u ₀, u ₁, ..., u _N-1] is a pre-transform output bit sequence of a pre-transform, wherein specific examples given in FIGS. 4C, 4D, 4G, and 4H.

The pre-transform comprises obtaining, by the first node, a pre-transform input bit sequence v = [v ₀, v ₁, ..., v _N-1] of length N; and determining, by the first node, a pre-transform output bit sequence u = [u ₀, u ₁, ..., u _N-1] of length N; wherein N is the polar matrix size.

Parameters for determining the pre-transform

The pre-transform determines the pre-transform output bit sequence u corresponding to the pre-transform input bit sequence v by the first node using at least one of the following:

● a generator bit sequence g = [g ₀, g ₁, ..., g _m] over GF (2) ,

● a generator polynomial g (D) = g ₀+ g ₁·D + ... + g _m-1·D ^m-1+ g _m·D ^m over GF (2) ,

● a recursive feedback bit sequence q = [q ₀, q ₁, ..., q _m] over GF (2) ,

● a recursive feedback polynomial q (D) = q ₀+ q ₁·D + ... + q _m·D ^m over GF (2) ,

● a state bit sequence t = [t ₀, t ₁, ..., t _m-1, t _m] of length m+1,

Here, m is called a memory length.

Pre-transform using a generator polynomial g (D) or a generator bit sequence g

In some embodiments, the pre-transform determines the pre-transform output bit sequence u corresponding to the pre-transform input bit sequence v according to a generator polynomial g (D) = g ₀ + g ₁·D + g ₂·D + ···+ g _m-1·D + g _m·D (or equivalently a generator bit sequence g = [g ₀, g ₁, g ₂, ..., g _m-1, g _m] ) , wherein m is called a memory length of the generator polynomial g (D) (or the generator bit sequence g) .

The generator polynomial g (D) = g ₀+ g ₁·D + ... + g _m-1·D ^m-1+ g _m·D ^m can be any binary polynomial over GF (2) , wherein m is the polynomial degree or the memory length.

In a specific example with a memory length m = 6, a generator polynomial is g (D) = g ₀+ g ₁·D + g ₂·D ²+ g ₃·D ³+ g ₄·D ⁴+ g ₅·D ⁵+ g ₆·D ⁶ = 1 + 0·D + 1·D ²+ 1·D ³ + 0·D ⁴ + 1·D ⁵ + 1·D ⁶ = 1 + D ²+ D ³ + D ⁵ + D ⁶.

In another specific example with a memory length m = 3, a generator polynomial is g (D) = g ₀+ g ₁·D + g ₂·D ²+ g ₃·D ³ = 1 + 1·D + 0·D ²+ 1·D ³ = 1 + D + D ³. The generator bit sequence g = [g ₀, g ₁, ..., g _m] can be any binary sequence of length m+1, wherein m is called the memory length. In a specific example with a memory length m = 6, a generator bit sequence is g = [g ₀, g ₁, g ₂, g ₃, g ₄, g ₅, g ₆] = [1, 0, 1, 1, 0, 1, 1] . In another specific example with a memory length m = 3, a generator bit sequence is g = [g ₀, g ₁, g ₂, g ₃] = [1, 1, 0, 1] .

More specific examples for a generator polynomial g (D) = g ₀+ g ₁·D + ... + g _m·D ^m are as follows:

(1) For m = 1, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D = 1 + D;

(2) For m = 2, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² = 1 + D ²;

(3) For m = 3, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + g ₃·D ³ = 1 + D + D ² + D ³;

(4) For m = 4, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + g ₃·D ³ + g ₄·D ⁴ =1 + D + D ² + D ⁴and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + g ₃·D ³ + g ₄·D ⁴ = 1 + D ² + D ³ + D ⁴;

(5) For m = 5, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₅·D ⁵ = 1 + D + D ³ + D ⁵ and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₅·D ⁵ = 1 + D ² + D ⁴ + D ⁵;

(6) For m = 6, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₆·D ⁶= 1 + D ⁶;

(7) For m = 7, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₇·D ⁷= 1 + D ³ + D ⁵ + D ⁷and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₇·D ⁷= 1 + D ² + D ⁴ + D ⁷;

(8) For m = 8, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₈·D ⁸= 1 + D ⁴ + D ⁸;

(9) For m = 9, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₉·D ⁹= 1 + D ³ + D ⁴ + D ⁵ + D ⁷ + D ⁹ and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₉·D ⁹= 1 + D ² + D ⁴ + D ⁵+ D ⁶+ D ⁹;

(10) For m = 10, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₀·D ¹⁰= 1 + D ² + D ⁶ + D ⁷ + D ¹⁰ and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₀·D ¹⁰= 1 + D ³ + D ⁴ + D ⁸ + D ¹⁰;

(11) For m = 11, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₁·D ¹¹= 1 + D + D ² + D ⁴ + D ⁸ + D ¹⁰ + D ¹¹ and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₁·D ¹¹= 1 + D + D ³ + D ⁷ + D ⁹ + D ¹⁰ + D ¹¹;

(12) For m = 12, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₂·D ¹²= 1 + D ² + D ⁵ + D ⁶ + D ⁷ + D ⁸ + D ⁹ + D ¹⁰ + D ¹¹ + D ¹² and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₂·D ¹²= 1 + D + D ² + D ³ + D ⁴ + D ⁵ + D ⁶ + D ⁷ + D ¹⁰ + D ¹²;

(13) For m = 13, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₃·D ¹³= 1 + D + D ⁴ + D ⁵ + D ⁹ + D ¹⁰ + D ¹³ and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₃·D ¹³= 1 + D ³ + D ⁴ + D ⁸ + D ⁹ + D ¹² + D ¹³;

(14) For m = 14, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₄·D ¹⁴= 1 + D + D ² +D ⁷+ D ⁸+ D ¹⁰+ D ¹²+ D ¹⁴and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₄·D ¹⁴= 1 + D ² + D ⁴ + D ⁶ + D ⁷ + D ¹² + D ¹³ + D ¹⁴;

(15) For m = 15, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₅·D ¹⁵= 1 + D + D ⁴ + D ⁶ + D ⁷ + D ⁸ + D ⁹ + D ¹⁵ and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₅·D ¹⁵= 1 + D ⁶ + D ⁷ + D ⁸ + D ⁹ + D ¹¹ + D ¹⁴ + D ¹⁵;

(16) For m = 16, g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₆·D ¹⁶= 1 + D ² + D ⁴ + D ⁶ + D ⁸ + D ¹³ + D ¹⁴ + D ¹⁶ and g (D) = g ₀+ g ₁·D + ... + g _m·D ^m = g ₀+ g ₁·D + g ₂·D ² + ... + g ₁₆·D ¹⁶= 1 + D ² + D ³ + D ⁸ + D ¹⁰ + D ¹² + D ¹⁴ + D ¹⁶;

wherein m is the memory length.

FIG. 3 shows a specific example diagram of a pre-transform using a generator polynomial g (D) = g ₀+ g ₁·D + ... + g _m-1·D ^m-1+ g _m·D ^m (or a generator bit sequence g = [g ₀, g ₁, ..., g _m] ) of a memory length m, wherein a bit u _i with an index i in a pre-transform output bit sequence u is determined by m+1 bit v _i, v _i-1, v _i-2, ..., v _i-m with consecutive indices i, i-1, i-2, ..., i-m in a pre-transform input bit sequence v and the generator polynomial g (D) = g ₀+ g ₁·D + ... + g _m-1·D ^m-1+ g _m·D ^m (or the generator bit sequence g = [g ₀, g ₁, ..., g _m] ) as

Here, the summation and the multiplication are over GF (2) ; the bit v _i-k = 0 for i ＜ k;g _k is a coefficient of the term with degree k in the generator polynomial g (D) = g ₀+ g ₁·D + ... + g _m-1·D ^m-1+ g _m·D ^m (or equivalently a bit with an index k in a generator bit sequence g = [g ₀, g ₁, ..., g _m] ) over GF (2) . A specific pseudo code is as follows.

Pre-transform using a recursive feedback polynomial q (D) or a recursive feedback bit sequence q

In some embodiments, the pre-transform determines the pre-transform output bit sequence u corresponding to the pre-transform input bit sequence v according to a recursive feedback polynomial q (D) = q ₀ + q ₁·D + q ₂·D + ···+ q _m-1·D + q _m·D (or equivalently a recursive feedback bit sequence q = [q ₀, q ₁, q ₂, ..., q _m-1, q _m] ) , wherein m is called a memory length of the recursive feedback polynomial q (D) or (the recursive feedback bit sequence q) .

The recursive feedback polynomial q (D) = q ₀+ q ₁·D + ... + q _m-1·D ^m-1+ q _m·D ^m is a binary polynomial with the zero-degree coefficient q ₀ being 1 and other coefficients q ₁, ..., q _m being any binary values over GF (2) , wherein m is a memory length. In a specific example with a memory length m = 6, a recursive feedback polynomial is q (D) = q ₀+ q ₁·D + q ₂·D ²+ q ₃·D ³+ q ₄·D ⁴+ q ₅·D ⁵+ q ₆·D ⁶ = 1 + 0·D + 1·D ²+ 0·D ³ + 1·D ⁴ + 1·D ⁵ + 1·D ⁶ = 1 + D ²+ D ⁴ + D ⁵ + D ⁶. In another specific example with a memory length m = 3, a recursive feedback polynomial is q (D) = q ₀+ q ₁·D + q ₂·D ²+ q ₃·D ³ = 1 + 0·D + 1·D ²+ 1·D ³ = 1 + D ² + D ³. The recursive feedback bit sequence q = [q ₀, q ₁, ..., q _m] is a binary sequence of length m+1 with [q ₁, ..., q _m] being any binary sequence of length m and q ₀ = 1, wherein m is the memory length. In a specific example with a memory length m = 3, a recursive feedback bit sequence is q = [q ₀, q ₁, q ₂, q ₃, q ₄, q ₅, q ₆] = [1, 0, 1, 0, 1, 1, 1] . In another specific example with a memory length m = 3, a recursive feedback bit sequence is q = [q ₀, q ₁, q ₂, q ₃] = [1, 0, 1, 1] .

FIG. 5 shows a specific diagram of a pre-transform using a recursive feedback polynomial q (D) = q ₀+ q ₁·D + ... + q _m-1·D ^m-1+ q _m·D ^m (or equivalently a recursive feedback bit sequence q = [q ₀, q ₁, q ₂, ..., q _m-1, q _m] ) with q ₀ = 1 and a memory length m, wherein a bit u _i with an index i in a pre-transform output bit sequence u is determined by the following:

a bit v _i with an index i in a pre-transform input bit sequence v = [v ₀, v ₁, ..., v _N-1] ,

m previous bits u _i-1, u _i-2, ..., u _i-m with consecutive indices i-1, i-2, ..., i-m in a pre-transform output bit sequence u, and

a recursive feedback polynomial q (D) = q ₀+ q ₁·D + ... + q _m-1·D ^m-1+ q _m·D ^m (or a recursive feedback bit sequence q = [q ₀, q ₁, ..., q _m] ) with q ₀ = 1.

Here, a specific example is

with the summation and the multiplication being over GF (2) ; the bit u _i-k = 0 for i ＜ k; q _k is a coefficient of the term with degree k in the recursive feedback polynomial q (D) = q ₀+ q ₁·D + ... + q _m-1·D ^m-1+ q _m·D ^m (or equivalently a bit with an index k in a recursive feedback bit sequence q = [q ₀, q ₁, ..., q _m] ) over GF (2) . A specific pseudo code is as follows.

Pre-transform using both a generator polynomial g (D) and a recursive feedback polynomial q (D) (or both a generator bit sequence g and a recursive feedback bit sequence q)

In some embodiments, the pre-transform determines the pre-transform output bit sequence u corresponding to the pre-transform input bit sequence v according to both a generator polynomial g (D) = g ₀ + g ₁·D + g ₂·D + ···+ g _m-1·D + g _m·D and a recursive feedback polynomial q (D) = q ₀+ q ₁·D + ... + q _m-1·D ^m-1+ q _m·D ^m (or equivalently both a generator bit sequence g = [g ₀, g ₁, g ₂, ..., g _m-1, g _m] and a recursive feedback bit sequence q = [q ₀, q ₁, q ₂, ..., q _m-1, q _m] ) , wherein m is called a memory length for both the generator polynomial g (D) and the recursive feedback polynomial q (D) (or equivalently both the generator bit sequence g and the recursive feedback bit sequence q) .

The generator polynomial g (D) = g ₀+ g ₁·D + ... + g _m-1·D ^m-1+ g _m·D ^m can be any binary polynomial over GF (2) , wherein m is the polynomial degree or the memory length. In a specific example with a memory length m = 6, a generator polynomial is g (D) = g ₀+ g ₁·D + g ₂·D ²+ g ₃·D ³+ g ₄·D ⁴+ g ₅·D ⁵+ g ₆·D ⁶ = 1 + 0·D + 1·D ²+ 1·D ³ + 0·D ⁴ + 1·D ⁵ + 1·D ⁶ = 1 + D ²+ D ³ + D ⁵ + D ⁶. In another specific example with a memory length m = 3, a generator polynomial is g (D) = g ₀+ g ₁·D + g ₂·D ²+ g ₃·D ³ = 1 + 1·D + 0·D ²+ 1·D ³ = 1 + D + D ³.

The generator bit sequence g = [g ₀, g ₁, ..., g _m] can be any binary sequence of length m+1, wherein m is called the memory length. In a specific example with a memory length m = 6, a generator bit sequence is g = [g ₀, g ₁, g ₂, g ₃, g ₄, g ₅, g ₆] = [1, 0, 1, 1, 0, 1, 1] . In another specific example with a memory length m = 3, a generator bit sequence is g = [g ₀, g ₁, g ₂, g ₃] = [1, 1, 0, 1] .

The recursive feedback polynomial q (D) = q ₀+ q ₁·D + ... + q _m-1·D ^m-1+ q _m·D ^m is a binary polynomial with the zero-degree coefficient q ₀ being 1 and other coefficients q ₁, ..., q _m being any binary values over GF (2) , wherein m is the memory length. In a specific example with a memory length m = 6, a recursive feedback polynomial is q (D) = q ₀+ q ₁·D + q ₂·D ²+ q ₃·D ³+ q ₄·D ⁴+ q ₅·D ⁵+ q ₆·D ⁶ = 1 + 0·D + 1·D ²+ 0·D ³ + 1·D ⁴ + 1·D ⁵ + 1·D ⁶ = 1 + D ²+ D ⁴ + D ⁵ + D ⁶.

In another specific example with a memory length m = 3, a recursive feedback polynomial is q (D) = q ₀+ q ₁·D + q ₂·D ²+ q ₃·D ³ = 1 + 0·D + 1·D ²+ 1·D ³ = 1 + D ² + D ³. The feedback bit sequence q = [q ₀, q ₁, ..., q _m] is a binary sequence of length m+1 with [q ₁, ..., q _m] being any binary sequence of length m and q ₀ = 1, wherein m is the memory length.

In a specific example with a memory length m = 3, a feedback bit sequence is q = [q ₀, q ₁, q ₂, q ₃, q ₄, q ₅, q ₆] = [1, 0, 1, 0, 1, 1, 1] . In another specific example with a memory length m = 3, a feedback bit sequence is q = [q ₀, q ₁, q ₂, q ₃] = [1, 0, 1, 1] .

FIG. 6 shows a diagram of a pre-transform using both a generator polynomial g (D) = g ₀+ g ₁·D + ... + g _m-1·D ^m-1+ g _m·D ^m and a recursive feedback polynomial q (D) (or equivalently both a generator bit sequence g and a recursive feedback bit sequence q) , wherein the pre-transform determines a bit u _i with an index i in a pre-transform output bit sequence u comprising

setting, by the first node, a bit t ₀ with an index 0 in a state bit sequence t = [t ₀, t ₁, t ₂, ..., t _m] to be a bit v _i with an index i of a pre-transform input bit sequence v = [v ₀, v ₁, v ₂, ..., v _N- ₁] , i.e., t ₀ = v _i; and

determining, by the first node, a summation bit s by the recursive feedback polynomial q (D) = q ₀+ q ₁·D + ... + q _m·D ^m (or equivalently the feedback bit sequence q = [q ₀, q ₁, ..., q _m] ) over GF (2) and the updated state bit sequence t = [t ₀, t ₁, t ₂ ..., t _m-1, t _m] as

and

setting, by the first node, a bit t ₀ with an index 0 in the state bit sequence t = [t ₀, t ₁, t ₂ ..., t _m-1, t _m] to the summation bit s, i.e., t ₀ = s, and

determining, by the first node, a bit u _i with an index i of a pre-transform output bit sequence u = [u ₀, u ₁, u ₂, ..., u _N-1] by a generator polynomial g (D) = g ₀+ g ₁·D + ... + g _m·D ^m (or equivalently a generator bit sequence g = [g ₀, g ₁, ..., g _m] ) over GF (2) and the updated state bit sequence t = [t ₀, t ₁, ..., t _m-1, t _m] as

performing, by the first node, a right shift on the state bit sequence t = [t ₀, t ₁, ..., t _m-1, t _m] with a bit t ₀ with index 0 in the state bit sequence t = [t ₀, t ₁, ..., t _m-1, t _m] is set to 0 as follows.

A specific pseudo code for the above steps is as follows.

Embodiment 9

This section discloses examples involving the pre-transform input bit sequence is a rate profiling output bit sequence.

Embodiment 9 is based on the above related embodiments.

In some embodiments, the pre-transform input bit sequence v = [v ₀, v ₁, ..., v _N-1] is a rate profiling output bit sequence of length N determined by a rate profiling, wherein specific examples are given in FIGS. 4C, 4D, 4G, and 4H.

Embodiment 10

This section discloses examples involving the polar transform input bit sequence is an rate profiling output bit sequence.

Embodiment 10 is based on the above related embodiments.

In some embodiments, the polar transform input bit sequence u = [u ₀, u ₁, ..., u _N-1] is equal to an rate profiling output bit sequence v = [v ₀, v ₁, ..., v _N-1] of length N determined by a rate profiling, wherein, u = v, N is the polar matrix size, and specific examples are given in FIGS. 4A, 4B, 4E, and 4F.

Embodiment 11

This section discloses examples involving a rate profiling block.

Embodiment 11 is based on the above embodiments.

The rate profiling determining the rate profiling output bit sequence v = [v ₀, v ₁, ..., v _N-1] comprises obtaining, by the first node, a rate profiling input bit sequence; and determining, by the first node, a rate profiling output bit sequence v = [v ₀, v ₁, ..., v _N-1] according to a date index set Q of size K; wherein, K is the input bit sequence length; the rate profiling input bit sequence is the input bit sequence c = [c ₀, c ₁, ..., c _K-1] of length K; specific examples are given in FIGS. 4A to 4H.

Description of the data index set Q

In some embodiments, the data index set Q is a subset of a first integer set Z _N = {0, 1, 2, ..., N-2, N-1} , wherein, the first integer set Z _N = {0, 1, 2, ..., N-2, N-1} comprises and only comprises all non-negative integers smaller than N. The data index set Q = {Q ₀, Q ₁, ..., Q _K-2, Q _K-1} has K non-negative elements Q ₀, Q ₁, ..., Q _K-2, Q _K-1, i.e., the data index set Q is of size K.

In some embodiments, for k = 0, 1, ..., K-2, the element Q _k in the data index set Q is smaller than Q _k+1, i.e., the data index set is sorted in ascending order according to index values with Q ₀＜ Q ₁＜ ... ＜ Q _K-2＜ Q _K-1. In some embodiments, for k = 0, 1, ..., K-2, the element Q _k in the data index set Q is greater than Q _k+1, i.e., the data index set is sorted in descending order according to index values with Q ₀＞ Q ₁＞ ... ＞ Q _K-2＞ Q _K-1.

In some embodiments, for k = 0, 1, ..., K-2, the reliability of the Q _k-th polarized sub-channel (denoted as W (Q _k) ) is smaller than the reliability of the Q _k+1-th polarized sub-channel (denoted as W (Q _k+1) ) , i.e., the data index set is sorted in ascending order according to the polarized sub-channel reliability with W (Q ₀) ＜ W (Q ₁) ＜ ... ＜ W (Q _K-2) ＜ W (Q _K-1) . In some embodiments, for k = 0, 1, ..., K-2, the reliability of the Q _k-th polarized sub-channel (denoted as W (Q _k) ) is greater than the reliability of the Q _k+1-th polarized sub-channel (denoted as W(Q _k+1) ) , i.e., the data index set is sorted in descending order according to the polarized sub-channel reliability with W (Q ₀) ＞ W (Q ₁) ＞ ... ＞ W (Q _K-2) ＞ W (Q _K-1) .

In a first specific example with N = 8 and K = 4, a data index set is Q = {Q ₀, Q ₁, Q ₂, Q ₃} = {3, 5, 6, 7} . In a second specific example with N = 8 and K = 4, a data index set is Q = {Q ₀, Q ₁, Q ₂, Q ₃} = {7, 6, 5, 3} .

In a third specific example with N = 32 and K = 25, a data index set is Q = {Q ₀, Q ₁, Q ₂, Q ₃, Q ₄, Q ₅, Q ₆, Q ₇, Q ₈, Q ₉, Q ₁₀, Q ₁₁, Q ₁₂, Q ₁₃, Q ₁₄, Q ₁₅, Q ₁₆, Q ₁₇, Q ₁₈, Q ₁₉, Q ₂₀, Q ₂₁,Q ₂₂, Q ₂₃, Q ₂₄} = {5, 9, 6, 17, 10, 18, 12, 20, 24, 7, 11, 19, 13, 14, 21, 26, 25, 22, 28, 15, 23, 31, 27, 29, 30} with polarized sub-channel reliability with W (Q ₀) ＜ W (Q ₁) ＜ W (Q ₂) ＜ W (Q ₃) ＜ W (Q ₄) ＜ W (Q ₅) ＜ W (Q ₆) ＜ W (Q ₇) ＜ W (Q ₈) ＜ W (Q ₉) ＜ W (Q ₁₀) ＜ W (Q ₁₁) ＜ W (Q ₁₂) ＜ W (Q ₁₃) ＜ W (Q ₁₄) ＜ W (Q ₁₅) ＜ W (Q ₁₆) ＜ W (Q ₁₇) ＜ W (Q ₁₈) ＜ W (Q ₁₉) ＜ W (Q ₂₀) ＜ W (Q ₂₁) ＜ W (Q ₂₂) ＜ W (Q ₂₃) ＜ W(Q ₂₄) . In a fourth specific example with N = 32 and K = 6, a data index set is Q = {Q ₀, Q ₁, Q ₂, Q ₃, Q ₄, Q ₅} = {30, 29, 27, 31, 23, 15} with polarized sub-channel reliability with W (Q ₀) ＞ W (Q ₁) ＞ W (Q ₂) ＞ W (Q ₃) ＞ W (Q ₄) ＞ W (Q ₅) .

In some embodiments, the rate profiling determines the rate profiling output bit sequence v = [v ₀, v ₁, ..., v _N-1] corresponding to the rate profiling input bit sequence c = [c ₀, c ₁, .., c _K-1] according to the data index set Q is as follows.

A specific example pseudo-code for the rate profiling is as follows.

In some embodiments, the rate profiling output bit sequence v is the multiplexing of the rate profiling input bit sequence c and the rate profiling frozen bit sequence f, wherein the rate profiling frozen bit sequence f is of length N -K; N is the polar matrix size and K is the rate profiling input bit sequence length.

A first specific example with N = 8 and K = 3 is a rate profiling input bit sequence c = [c ₀, c ₁, c ₂] and a rate profiling frozen bit sequence f = [f ₀, f ₁, f ₂, f ₃, f ₄] , then a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] = [f ₀, f ₁, f ₂, f ₃, f ₄, c ₀, c ₁, c ₂] .

A second specific example with N = 16 and K = 4 is a rate profiling input bit sequence c = [c ₀, c ₁, c ₂, c ₃] and a rate profiling frozen bit sequence f = [f ₀, f ₁, f ₂, f ₃, f ₄, f ₅, f ₆, f ₇, f ₈, f ₉, f ₁₀, f ₁₁] , then a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, v ₈, v ₉, v ₁₀, v ₁₁, v ₁₂, v ₁₃, v ₁₄, v ₁₅] = [f ₀, f ₁, f ₂, f ₃, f ₄, f ₅, f ₆, f ₇, f ₈, f ₉, f ₁₀, c ₀, f ₁₁, c ₁, c ₂, c ₃] .

A third specific example is given in Algorithm 1A in TABLE 2.

In some embodiments, for an index i belonging to the data index set Q, the bit v _i in the rate profiling output bit sequence v is a bit in the rate profiling input bit sequence c.

A first specific example with N = 8, K = 3 and a data index set Q = {5, 6, 7} , a rate profiling input bit sequence c = [c ₀, c ₁, c ₂] , the bits v ₅, v ₆, v ₇ with indices belonging to the data index set Q = {5, 6, 7} in a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇]is set as v ₅ = c ₀, v ₆= c ₁, and v ₇ = c ₂.

A second specific example with N = 16, K = 4 and a data index set Q = {11, 13, 14, 15} , a rate profiling input bit sequence c = [c ₀, c ₁, c ₂, c ₃] , the bits v ₁₁, v ₁₃, v ₁₄, v ₁₅ with indices belonging to the data index set Q = {11, 13, 14, 15} in a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, v ₈, v ₉, v ₁₀, v ₁₁, v ₁₂, v ₁₃, v ₁₄, v ₁₅] is set as v ₁₁ = c ₀, v ₁₂= c ₁, v ₁₃ = c ₂, and v ₁₄ = c ₃.

A third specific example is given in Algorithm 1A in TABLE 2.

A fourth specific example is given in Algorithm 1B in TABLE 2.

In some embodiments, for an index i not belonging to the data index set Q, the bit v _i in the rate profiling output bit sequence v is a bit in the rate profiling frozen bit sequence f. A first specific example with N = 8, K = 3 and Q = {5, 6, 7} , a rate profiling frozen bit sequence f = [f ₀, f ₁, f ₂, f ₃, f ₄] , the bits v ₀, v ₁, v ₂, v ₃, v ₄ with indices not belonging to the data index set Q = {5, 6, 7} in a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] is set as v ₀ = f ₀, v ₁= f ₁, v ₂ = f ₂, v ₃ = f ₃, and v ₄ = f ₄.

A second specific example with N = 16, K = 4 and Q = {11, 13, 14, 15} , a rate profiling frozen bit sequence f = [f ₀, f ₁, f ₂, f ₃, f ₄, f ₅, f ₆, f ₇, f ₈, f ₉, f ₁₀, f ₁₁] , the bits v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, v ₈, v ₉, v ₁₀, v ₁₂ with indices not belonging to the data index set Q = {11, 13, 14, 15} in a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, v ₈, v ₉, v ₁₀, v ₁₁, v ₁₂, v ₁₃, v ₁₄, v ₁₅] is set as v ₀ = f ₀, v ₁= f ₁, v ₂ = f ₂, v ₃ = f ₃, v ₄ = f ₄, v ₅ = f ₅, v ₆ = f ₆, v ₇ = f ₇, v ₈ = f ₈, v ₉ = f ₉, v ₁₀ = f ₁₀, and v ₁₂ = f ₁₁.

A third specific example is given in Algorithm 1A in TABLE 2.

In some embodiments, the rate profiling output bit sequence v is the multiplexing of the rate profiling input bit sequence c and an all-zero sequence of length N -K, wherein N is the polar matrix size and K is the rate profiling input bit sequence length.

A first specific example with N = 8 and K = 3 is a rate profiling input bit sequence c = [c ₀, c ₁, c ₂] and an all-zero sequence of length N -K = 8 -3 = 5, then a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] = [0, 0, 0, 0, 0, c ₀, c ₁, c ₂] .

A second specific example with N = 16 and K = 4 is a rate profiling input bit sequence c = [c ₀, c ₁, c ₂, c ₃] and an all-zero sequence of length N -K = 16 -4 = 12, then a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, v ₈, v ₉, v ₁₀, v ₁₁, v ₁₂, v ₁₃, v ₁₄, v ₁₅] = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, c ₀, 0, c ₁, c ₂, c ₃] .

A third specific example is given in Algorithm 1B in TABLE 2.

In some embodiments, for an index i not belonging to the data index set Q, the bit v _i in the rate profiling output bit sequence v is equal to 0.

A first specific example with N = 8, K = 3 and Q = {5, 6, 7} , the bits v ₀, v ₁, v ₂, v ₃, v ₄ with indices not belonging to the data index set Q = {5, 6, 7} in a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] is set as v ₀ = 0, v ₁= 0, v ₂ = 0, v ₃ = 0, and v ₄ = 0 _.

A second specific example with N = 16, K = 4 and Q = {11, 13, 14, 15} , the bits v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, v ₈, v ₉, v ₁₀, v ₁₂ with indices not belonging to the data index set Q = {11, 13, 14, 15} in a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, v ₈, v ₉, v ₁₀, v ₁₁, v ₁₂, v ₁₃, v ₁₄, v ₁₅] is set as v ₀ = 0, v ₁= 0, v ₂ = 0, v ₃ = 0, v ₄ = 0, v ₅ = 0, v ₆ = 0, v ₇ = 0, v ₈ = 0, v ₉ = 0, v ₁₀ = 0, and v ₁₂ = 0.

A third specific example is given in Algorithm 1B in TABLE 2.

TABLE 2 Algorithm 1A and Algorithm 1B

Embodiment 12

This section discloses examples involving the second part bit sequence is a repetition of a portion of the input bit sequence.

Embodiment 12 is based on the above embodiments.

The second part bit sequence c’ = [c’ ₀, c’ ₁, c’ ₂, ..., c’ _E-N-1] is a repetition of a portion of the input bit sequence c = [c ₀, c ₁, c ₂, ..., c _K-1] , wherein, the second part bit sequence c’= [c’ ₀, c’ ₁, c’ ₂, ..., c’ _N-E-1] is determined by a repetition with the input bit sequence c = [c ₀, c ₁, c ₂, ..., c _K-1] as input; wherein specific examples are given in FIGS. 4E, 4F, 4G, and 4H.

A repetition by a portion of the input bit sequence c

In some embodiments, a repetition comprises obtaining, by the first node, a portion of the input bit sequence c of length Nb; and determining, by the first node, the second part bit sequence c’ based on the portion of the input bit sequence c of length Nb as

c′ _r=c _{mod (r, Nb)} , r=0, 1, 2, …, E-N-1.

Here, Nb can be any positive integer not greater than K; Nb is the length of the portion of the input bit sequence c; the portion of the input bit sequence c is [c ₀, c ₁, c ₂, ..., c _Nb- ₁] , i.e., the first Nb bits in the input bit sequence c.

In some embodiments, the length Nb of the portion of the input bit sequence c is determined by the input sequence length K and a repetition ratio ρ, wherein the repetition ratio ρ is a positive real number not greater than one.

A first specific example with example number 1 in TABLE 3 is the length of the portion of the input bit sequence c being Nb = K·ρ.

A second specific example with example number 2 in TABLE 3 is the length of the portion of the input bit sequence c being Nb = floor (K·ρ) .

A third specific example with example number 3 in TABLE 3 is the length of the portion of the input bit sequence c being Nb = ceil (K·ρ) .

A fourth specific example with example number 4 in TABLE 3 is the length of the portion of the input bit sequence c being Nb = round (K·ρ) .

A fifth specific example with example number 5 in TABLE 3 is the length of the portion of the input bit sequence c being Nb = K.

TABLE 3 Specific example of the length Nb and the portion of the input bit sequence c

A repetition according to the binary representation of the output bit sequence length E

In some embodiments, a repetition comprises obtaining, by the first node, a portion of the input bit sequence c = [c ₀, c ₁, c ₂, ..., c _K-1] ; determining, by the first node, n+1 bits

being binary representation of the output bit sequence length E, i.e.,

with N = 2 ⁿ; and determining, by the first node, a second part bit sequence c’ such that the second part bit sequence c’ is a concatenation of n repetition sub-sequences c′ ^(n-1) , c′ ^(n-2) , …, c′ ⁽¹⁾ , c′ ⁽⁰⁾ , i.e., c’ = [c′ ^(n-1) , c′ ^(n-2) , …, c′ ⁽¹⁾ , c′ ⁽⁰⁾ ] or c’ = [c′ ⁽⁰⁾ , c′ ⁽¹⁾ , …, c′ ^(n-2) , c′ ^(n-1) ] .

Here, N is the polar matrix size; for i = 0, 1, ..., n-1, the i-th repetition sub-sequence c′ ( ⁱ) is of length

wherein, if

the i-th repetition sub-sequences is an empty bit sequence; if

the i-th repetition sub-sequence c′ ( ⁱ) is obtained by determining, by the first node, the i-th repetition sub-sequence c′ ( ⁱ) based on the portion of the input bit sequence c of length Nb as

wherein, Nb can be any positive integer not greater than K; Nb is the length of the portion of the input bit sequence c; the portion of the input bit sequence c is [c ₀, c ₁, c ₂, ..., c _Nb- ₁] , i.e., the first Nb bits in the input bit sequence c.

A first specific example with parameters K = 7, N = 32, E = 44, Nb = K = 7, an input bit sequence c = [c ₀, c ₁, c ₂, c ₃, c ₄, c ₅, c ₆, c ₇] , the second part bit sequence c’ is determined as follows.

(1) Determine n = log ₂ (N) = 5 and the n+1 = 6 bits binary representation of the output bit sequence length E = 44 is

(2) Determine lengths of n = 5 repetition sub-sequences c′ ⁽⁴⁾ , c′ ⁽³⁾ , c′ ⁽²⁾ , c′ ⁽¹⁾ , c′ ⁽⁰⁾ are as follows.

(3) Determine n = 5 repetition sub-sequences c′ ⁽⁴⁾ , c′ ⁽³⁾ , c′ ⁽²⁾ , c′ ⁽¹⁾ , c′ ⁽⁰⁾ are as follows.

c′ ⁽⁴⁾ = [] ,

c′ ⁽¹⁾ = [] ,

c′ ⁽⁰⁾ = [] ;

(4) Concatenate n = 5 repetition sub-sequences c′ ⁽⁴⁾ , c′ ⁽³⁾ , c′ ⁽²⁾ , c′ ⁽¹⁾ , c′ ⁽⁰⁾ into the second part bit sequence c’, i.e.,

of length E -N = 44 -32 = 12.

A second specific example with parameters K = 7, N = 32, E = 44, Nb = 5, an input bit sequence c = [c ₀, c ₁, c ₂, c ₃, c ₄, c ₅, c ₆, c ₇] , the second part bit sequence c’ is determined as follows.

(2) Determine lengths of n = 5 repetition sub-sequences c′ ⁽⁴⁾ , c′ ⁽³⁾ , c′ ⁽²⁾ , c′ ⁽¹⁾ , c′ ⁽⁰⁾ as

(3) Determine n = 5 repetition sub-sequences c′ ⁽⁴⁾ , c′ ⁽³⁾ , c′ ⁽²⁾ , c′ ⁽¹⁾ , c′ ⁽⁰⁾ as

c′ ⁽⁴⁾ = [] ,

c′ ⁽¹⁾ = [] ,

c′ ⁽⁰⁾ = [] ;

of length E -N = 44 -32 = 12.

A repetition according to a repetition index sequence R with elements less than K

In some embodiments, a repetition comprises obtaining, by the first node, a portion of the input bit sequence c; and determining, by the first node, the second part bit sequence c’ according to a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] of length Nr as

Here, Nr = E -N is the repetition index sequence length; for r = 0, 1, 2, ..., Nr-1, R _r is a non-negative integer smaller than K, i.e., 0 ≤ R _r < K; wherein, K is the input bit sequence length; N is the polar matrix size; E is the output bit sequence length.

A first specific example with the input bit sequence length K = 4, the polar matrix size N = 8, the output bit sequence length E = 11, the repetition index sequence length Nr = E -N = 11 -8 = 3, and the repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] = [R ₀, R ₁, R ₂] = [3, 0, 1] , the second part bit sequence c’ = [c’ ₀, c’ ₁, ..., c’ _N-E-1] = [c’ ₀, c’ ₁, c’ ₂] = [c ₃, c ₀, c ₁] .

A second specific example with the input bit sequence length K = 4, the polar matrix size N = 8, the output bit sequence length E = 11, the repetition index sequence length Nr = E -N = 11 -8 = 3, and the repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] = [R ₀, R ₁, R ₂] = [0, 0, 1] , the second part bit sequence c’ = [c’ ₀, c’ ₁, ..., c’ _N-E-1] = [c’ ₀, c’ ₁, c’ ₂] = [c ₀, c ₀, c ₁] .

A third specific example with the input bit sequence length K = 4, the polar matrix size N = 8, the output bit sequence length E = 14, the repetition index sequence length Nr = E -N = 14 -8 = 6, and the repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] = [R ₀, R ₁, R ₂, R ₃, R ₄, R ₅] = [0, 0, 1, 2, 2, 2] , the second part bit sequence c’ = [c’ ₀, c’ ₁, ..., c’ _N-E-1] = [c’ ₀, c’ ₁, c’ ₂, c’ ₃, c’ ₄, c’ ₅] = [c ₀, c ₀, c ₁, c ₂, c ₂, c ₂] .

A repetition according to a repetition index sequence R with elements less than K and a repetition number sequence T

In some embodiments, a repetition comprises obtaining, by the first node, the portion of the input bit sequence c; and determining, by the first node, the second part bit sequence c’ according to a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] of length Nr and a repetition number sequence T = [T ₀, T ₁, ..., T _Nr-2, T _Nr-1] of length Nr such that for r = 0, 1, 2, ..., Nr, the second part bit sequence c’ comprises T _rcopies of the R _r-th bit c _Rr in the portion of the input bit sequence c.

A specific example for a repetition of a second part bit sequence c’ corresponding to a portion of the input bit sequence c, a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] and a repetition number sequence T = [T ₀, T ₁, ..., T _Nr-2, T _Nr-1] is as follows

Here, Nr is a positive integer not greater than the input bit sequence length K; for r = 0, 1, 2, ..., Nr-1, R _r is a non-negative integer smaller than K, i.e., 0 ≤ R _r < K; for any two indices r0 ≠ r1 but R _r0 ≠ R _r1; for r = 0, 1, 2, ..., Nr, the element T _r in the repetition number sequence T = [T ₀, T ₁, ..., T _Nr-2, T _Nr-1] is a positive integer; the summation of elements in the repetition number sequence T = [T ₀, T ₁, ..., T _Nr-2, T _Nr-1] is equal to E -N, i.e.,

wherein K is the input bit sequence length, N is the polar matrix size, and , E is the output bit sequence length.

A first specific examples with K = 4, N = 8, E = 14, a repetition index sequence R = [R ₀, R ₁, R ₂] = [2, 3, 1] of length Nr = 3, and a repetition number sequence T = [T ₀, T ₁, ..., T _Nr- ₁] = [2, 1, 3] of size Nr = 3 with T ₀+ T ₁ + T ₂ = 2 + 1 + 3 = 6 = E -N = 14 -8, a second part bit sequence c’ = [c′ ₀, c′ ₁, …, c′ _E-N-1] = [c′ ₀, c′ ₁, c′ ₂, c′ ₃, c′ ₄, c′ ₅] = [c ₂, c ₂, c ₃, c ₁, c ₁, c ₁] corresponding to a portion of the input bit sequence c = [c ₀, c ₁, c ₂, c ₃] .

A second specific examples with K = 4, N = 8, E = 13, a repetition index sequence R = [R ₀, R ₁, R ₂] = [2, 3, 1] of length Nr = 3, and a repetition number sequence T = [T ₀, T ₁, ..., T _Nr-1] = [2, 1, 2] of size Nr = 3 with T ₀+ T ₁ + T ₂ = 2 + 1 + 2 = 5 = E -N = 13 -8, a second part bit sequence c’ = [c′ ₀, c′ ₁, …, c′ _E-N-1] = [c′ ₀, c′ ₁, c′ ₂, c′ ₃, c′ ₄] = [c ₂, c ₂, c ₃, c ₁, c ₁] corresponding to a portion of the input bit sequence c = [c ₀, c ₁, ..., c _K-1] = [c ₀, c ₁, c ₂, c ₃] .

Embodiment 13

This section discloses examples involving the second part bit sequence is a repetition of a portion of the rate profiling output bit sequence.

Embodiment 13 is based on the above related embodiments.

The second part bit sequence c’ = [c’ ₀, c’ ₁, c’ ₂, ..., c’ _E-N-1] is a repetition of a portion of the rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] of length N, wherein, N is the polar matrix size; E is the output bit sequence length; the second part bit sequence c’ = [c’ ₀, c’ ₁, c’ ₂, ..., c’ _N-E-1] is determined by a repetition with the rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] as input; wherein specific examples are given in FIGS. 4A, 4B, 4C, and 4D.

A repetition determined by a portion of a data index set Q

In some embodiments, a repetition comprises obtaining, by the first node, a portion of a data index set Q of size Nq and a rate profiling output bit sequence v of length N; and determining, by the first node, an index Q _{mod (r, Nq)} for r = 0, 1, 2, ..., E -N -1; and determining, by the first node, a bit

in the rate profiling output bit sequence v into the second part bit sequence c’ as

Here, Nq can be any positive integer not greater than K with K being the input bit sequence length; Nq is the size of the portion of the data index set Q; the portion of the data index set Q is {Q ₀, Q ₁, Q ₂, ..., Q _Nq-1} , i.e., the first Nq indices in the data index set Q; the data index set Q is the same as that in the rate profiling.

In some embodiments, the size Nq of the portion of the data index set Q is determined by the input sequence length K and a repetition ratio ρ, wherein the repetition ratio ρ is a positive real number not greater than one. A first specific example with example number 1 in TABLE 4 is the size of the portion of the data index set Q being Nq = K·ρ. A second specific example with example number 2 in TABLE 4 is the size of the portion of the data index set Q being Nq = floor (K·ρ) . A third specific example with example number 3 in TABLE 4 is the size of the portion of the data index set Q being Nq = ceil (K·ρ) . A fourth specific example with example number 4 in TABLE 4 is the size of the portion of the data index set Q being Nq = round (K·ρ) . A fifth specific example with example number 5 in TABLE 4 is the size of the portion of the data index set Q being Nq = K.

TABLE 4 Specific examples for a repetition with parameters K = 4, N = 8 and v = [v ₀, v ₁, ..., v _N-1] = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] as input

A repetition according to a binary representation of the output bit sequence length E and the data index set Q

In some embodiments, a repetition comprises obtaining, by the first node, a rate profiling output bit sequence v of length N and a portion of a data index set Q of size Nq; and determining, by the first node, n+1 bits

being binary representation of the output bit sequence length E, i.e.,

with N = 2 ⁿ; and determining, by the first node, n repetition index sequences Q ^(n-1) , Q ^(n-2) , ..., Q ⁽¹⁾ , Q ⁽⁰⁾according to a portion of a data index set Q of length Nq and n bits

determining, by the first node, n repetition sub-sequences c′ ^(n-1) , c′ ^(n-2) , …, c′ ⁽¹⁾ , c′ ⁽⁰⁾ according to the rate profiling output bit sequence v of length N and n repetition index sequence Q ^(n-1) , Q ^(n-2) , ..., Q ⁽¹⁾ , Q ⁽⁰⁾; and determining, by the first node, a second part bit sequence c’s uch that the second part bit sequence c’ is a concatenation of n repetition sub-sequences c′ ^(n-1) , c′ ^(n-2) , …, c′ ⁽¹⁾ , c′ ⁽⁰⁾ , i.e., c’ = [c′ ^(n-1) , c′ ^(n-2) , …, c′ ⁽¹⁾ , c′ ⁽⁰⁾ ] or c’ = [c′ ⁽⁰⁾ , c′ ⁽¹⁾ , …, c′ ^(n-2) , c′ ^(n-1) ] .

Here, N is the polar matrix size; the portion of the data index set Q comprises the first Nq elements Q ₀, Q ₁, Q ₂, ..., Q _Nq-1 in the data index set Q;

for i = 0, 1, ..., n-1, the i-th repetition index sequence Q ⁽ⁱ⁾ is determined as

(1) if

determine, by the first node, the i-th repetition index sequence Q ⁽ⁱ⁾ to be an empty index sequence; and

(2) if

① determine, by the first node, the i-th repetition sub-sequence Q ⁽ⁱ⁾ to be of length

and

② determining, by the first node, the i-th repetition index sequence Q ⁽ⁱ⁾ based on the portion of the data index set Q of size Nq as

for i = 0, 1, ..., n-1, the i-th repetition sub-sequence c’ ⁽ⁱ⁾ is determined as

(1) if the i-th repetition sub-sequence Q ⁽ⁱ⁾ is an empty index sequence, determine, by the first node, the i-th repetition sub-sequence c’ ⁽ⁱ⁾ to be an empty bit sequence;

(2) if the i-th repetition sub-sequence Q ⁽ⁱ⁾ is not an empty index sequence, determine the i-th repetition sub-sequence c’ ⁽ⁱ⁾ as follows.

① determining, by the first node, the length of the i-th repetition sub-

sequences c’ ⁽ⁱ⁾to be the same as that of the i-th repetition index sequence Q ⁽ⁱ⁾ , i.e., the length of the i-th repetition sub-sequences c’ ⁽ⁱ⁾is

② determining, by the first node, the i-th repetition sub-sequences c’ ⁽ⁱ⁾ as

r = 0, 1, 2, ..., E _i-1.

A repetition according to a repetition index sequence R with elements in the data index set Q

In some embodiments, a repetition comprises obtaining, by the first node, the rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] ; and determining, by the first node, the second part bit sequence c’ according to a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr- ₁] of length Nr as

Here, Nr = E -N is the repetition index sequence length; for r = 0, 1, 2, ..., Nr-1, R _r is an element belonging to a data index set Q = {Q ₀, Q ₁, ..., Q _K-1} ; wherein, K is the input bit sequence length; N is the polar matrix size; E is the output bit sequence length.

A first specific example with parameters as an input bit sequence length K = 4, a polar matrix size N = 8, an output bit sequence length E = 11, a repetition index sequence length Nr = E -N = 11 -8 = 3, a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] , a data index set Q = {Q ₀, Q ₁, ..., Q _K-1} = {Q ₀, Q ₁, Q ₂, Q ₃} = {3, 5, 6, 7} , and a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] = [R ₀, R ₁, R ₂] = [Q ₃, Q ₀, Q ₁] = [6, 3, 5] , then, a second part bit sequence

A second specific example with parameters as an input bit sequence length K = 4, a polar matrix size N = 8, an output bit sequence length E = 11, a repetition index sequence length Nr = E -N = 11 -8 = 3, a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] , a data index set Q = {Q ₀, Q ₁, ..., Q _K-1} = {Q ₀, Q ₁, Q ₂, Q ₃} = {3, 5, 6, 7} , and a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] = [R ₀, R ₁, R ₂] = [Q ₀, Q ₀, Q ₁] = [3, 3, 5] , then, a second part bit sequence c’ = [c’ ₀, c’ ₁, ..., c’ _N- ^E _- ¹] = [c’ ₀, c’ ₁, c’ ₂] = [v _Q0, v _Q0, v _Q1] = [v ₃, v ₃, v ₅] .

A third specific example with an input bit sequence length K = 4, a polar matrix size N = 8, an output bit sequence length E = 14, a repetition index sequence length Nr = E -N = 14 -8 = 6, a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] , a data index set Q = {Q ₀, Q ₁, ..., Q _K-1} = {Q ₀, Q ₁, Q ₂, Q ₃} = {3, 5, 6, 7} , and a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] = [R ₀, R ₁, R ₂, R ₃, R ₄, R ₅] = [Q ₀, Q ₀, Q ₁, Q ₂, Q ₂, Q ₂] = [3, 3, 5, 6, 6, 6] , a second part bit sequence c’ = [c’ ₀, c’ ₁, ..., c’ _N-E-1] = [c’ ₀, c’ ₁, c’ ₂, c’ ₃, c’ ₄, c’ ₅] = [v _Q0, v _Q0, v _Q1, v _Q2, v _Q2, v _Q2] = [v ₃, v ₃, v ₅, v ₆, v ₆, v ₆] .

A repetition according to a repetition index sequence R with elements in the data index set Q and a repetition number sequence T

In some embodiments, a repetition comprises obtaining, by the first node, the rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] ; and determining, by the first node, the second part bit sequence c’ according to a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr- ₁] of length Nr and a repetition number sequence T = [T ₀, T ₁, ..., T _Nr-2, T _Nr-1] of length Nr such that for r = 0, 1, 2, ..., Nr, the second part bit sequence c’ comprises T _rcopies of the R _r-th bit

in the portion of the input bit sequence c.

Here, Nr is a positive integer not greater than the input bit sequence length K; for r = 0, 1, 2, ..., Nr-1, R _r is an element belonging to a data index set Q = {Q ₀, Q ₁, ..., Q _K-1} ; for any two indices r0 ≠ r1 but R _r0 ≠ R _r1; for r = 0, 1, 2, ..., Nr, the element T _r in the repetition number sequence T = [T ₀, T ₁, ..., T _Nr-2, T _Nr-1] is a positive integer; the summation of elements in the repetition number sequence T = [T ₀, T ₁, ..., T _Nr-2, T _Nr-1] is equal to E -N, i.e.,

A first specific examples with parameters as K = 4, N = 8, E = 14, a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] , a data index set Q = {Q ₀, Q ₁, ..., Q _K-1} = {Q ₀, Q ₁, Q ₂, Q ₃} = {3, 5, 6, 7} , a repetition index sequence R = [R ₀, R ₁, R ₂] = [Q ₂, Q ₃, Q ₁] = [6, 7, 5] of length Nr = 3, and a repetition number sequence T = [T ₀, T ₁, ..., T _Nr-1] = [2, 1, 3] of size Nr = 3 with T ₀+ T ₁ + T ₂ = 2 + 1 + 3 = 6 = E -N = 14 -8, then, a second part bit sequence

corresponding to a portion of the rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] .

A second specific examples with parameters K = 4, N = 8, E = 13, a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] , a data index set Q = {Q ₀, Q ₁, ..., Q _K-1} = {Q ₀, Q ₁, Q ₂, Q ₃} = {3, 5, 6, 7} , a repetition index sequence R = [R ₀, R ₁, R ₂] = [Q ₂, Q ₃, Q ₁] = [6, 7, 5] of length Nr = 3, and a repetition number sequence T = [T ₀, T ₁, ..., T _Nr-1] = [2, 1, 2] of size Nr = 3 with T ₀+ T ₁ + T ₂ = 2 + 1 + 2 = 5 = E -N = 13 -8, a second part bit sequence c’ = [c′ ₀, c′ ₁, …, c′ _E-N-1] = [c′ ₀, c′ ₁, c′ ₂, c′ ₃, c′ ₄] = [v _Q2, v _Q2, v _Q3, v _Q1, v _Q1] = [v ₆, v ₆, v ₇, c ₅, c ₅] corresponding to a portion of the rate profiling output bit sequence v = [v ₀, v ₁, ..., v _N- ₁] = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇] .

Embodiment 14

This section introduces examples involving a second interleaving operation after a concatenation operation.

Embodiment 14 is based on the above related embodiments.

In some embodiments, the output sequence e = [e ₀, e ₁, ..., e _E-1] is further interleaved into a second output bit sequence f = [f ₀, f ₁, ..., f _E-1] , wherein E is the length of the output sequence e; the second output bit sequence f = [f ₀, f ₁, ..., f _E-1] is a permutation of the output sequence e = [e ₀, e ₁, ..., e _E-1] .

Embodiment 15

This section discloses examples involving modulation after rate matching or second interleaving.

Embodiment 15 is based on the above embodiments.

In some embodiments, the output sequence e = [e ₀, e ₁, ..., e _E-1] is further modulated into a first output symbol sequence x = [x ₀, x ₁, ..., x _E/Qm-1] using one of the following modulation:

● π/2 binary phase shift keying (π/2-BPSK) ,

● binary phase shift keying (BPSK) ,

● quadrature phase shift keying (QPSK) ,

● quadrature amplitude modulation (QAM) ,

● phase shift keying (PSK) ,

● amplitude shift keying (ASK) ,

● amplitude phase shift keying (APSK) .

Here Q _m is the modulation order.

In some embodiments, the second output bit sequence f = [f ₀, f ₁, ..., f _E-1] is further modulated into a first output symbol sequence x = [x ₀, x ₁, ..., x _E/Qm-1] using one of the following modulation:

● π/2 binary phase shift keying (π/2-BPSK) ,

● binary phase shift keying (BPSK) ,

● quadrature phase shift keying (QPSK) ,

● quadrature amplitude modulation (QAM) ,

● phase shift keying (PSK) ,

● amplitude shift keying (ASK) ,

● amplitude phase shift keying (APSK) .

Here, Q _m is the modulation order.

Embodiment 16

This section discloses examples involving input sequence c comprising CRC bits.

Embodiment 16 is based on the above embodiments.

In some embodiments, the input sequence c comprises Lcrc cyclic redundancy check (CRC) bits determined by a cyclic generator polynomial g' (D) = g' _Lcrc·D ^Lcrc + g' _Lcrc- ₁·D ^Lcrc-1 + ... + g' ₂·D ² + g' ₁·D + g' ₀ with coefficients over GF (2) and K -Lcrc payload bits.

In some embodiments, the input sequence c is determined by the first node by attaching Lcrc cyclic redundancy check (CRC) bit to a payload sequence of length K -Lcrc, wherein, the Lcrc CRC bits are determined by a cyclic generator polynomial g' (D) = g' _Lcrc·D ^Lcrc + g' _Lcrc-1·D ^Lcrc-1 + ... + g' ₂·D ² + g' ₁·D + g' ₀ with coefficients over GF (2) .

Examples based on the disclosed embodiments.

Example 1: In Example 1, a first part bit sequence of the output bit sequence e of length E is an interleaving output bit sequence d'of length N. In Example 1, a first node obtains an input bit sequence c = [c ₀, c ₁, c ₂, c ₃, c ₄, c ₅, c ₆, c ₇, c ₈, c ₉, ..., c ₁₆₅, c ₁₆₆, c ₁₆₇, c ₁₆₈, c ₁₆₉, c ₁₇₀, c ₁₇₁, c ₁₇₂, c ₁₇₃, c ₁₇₄, c ₁₇₅, c ₁₇₆, c ₁₇₇, c ₁₇₈] of length K = 179, wherein, the input sequence c comprises Lcrc = 19 cyclic redundancy check (CRC) bits and K -Lcrc = 179 -19 = 160 payload bits, wherein the CRC bits are determined by a cyclic generator polynomial g' (D) = g' _Lcrc·D ^Lcrc + g' _Lcrc-1·D ^Lcrc-1 + ... + g' ₂·D ² + g' ₁·D + g' ₀ = D ¹⁹+ D ¹⁸+ D ¹⁵+ D ⁹+ D ⁸+ D ⁵+ D ⁴+ D ³ + D ² + 1.

As in FIG. 4B, the first node performs the following to determine an output bit sequence e = [e ₀, e ₁, e ₂, e ₃, e ₄, e ₅, e ₆, e ₇, e ₈, e ₉, e ₁₀, e ₁₁, e ₁₂, e ₁₃, e ₁₄, e ₁₅, ..., e ₂₅₃, e ₂₅₄, e ₂₅₅, e ₂₅₆, e ₂₅₇, e ₂₅₈, e ₂₅₉, e ₂₆₀, e ₂₆₁, e ₂₆₂, e ₂₆₃] of length E = 264 according to a polar transform matrix G ⁽²⁵⁶⁾ of size N = 256:

(1) Perform a rate profile on an input bit sequence c = [c ₀, c ₁, c ₂, c ₃, c ₄, c ₅, c ₆, c ₇, c ₈, c ₉, ..., c ₁₆₅, c ₁₆₆, c ₁₆₇, c ₁₆₈, c ₁₆₉, c ₁₇₀] of length K = 179 according to a data bit index set Q = {Q ₀, Q ₁, Q ₂, ..., Q ₁₇₇, Q ₁₇₈} = {29, 43, 98, 88, 140, 30, 146, 71, 161, 45, 100, 51, 148, 46, 75, 104, 162, 53, 193, 152, 77, 164, 54, 83, 57, 112, 135, 78, 194, 85, 58, 168, 139, 99, 86, 60, 89, 196, 141, 101, 147, 176, 142, 31, 200, 90, 149, 102, 105, 163, 92, 47, 208, 150, 153, 165, 106, 55, 113, 154, 79, 108, 224, 166, 195, 59, 169, 114, 156, 87, 197, 116, 170, 61, 177, 91, 198, 172, 120, 201, 62, 143, 103, 178, 93, 202, 107, 180, 151, 209, 94, 204, 155, 210, 109, 184, 115, 167, 225, 157, 110, 117, 212, 171, 226, 216, 158, 118, 173, 121, 199, 179, 228, 174, 122, 203, 63, 181, 232, 124, 205, 182, 211, 185, 240, 206, 95, 213, 186, 227, 111, 214, 188, 217, 229, 159, 119, 218, 230, 233, 175, 123, 220, 183, 234, 125, 241, 207, 187, 236, 126, 242, 244, 189, 215, 219, 231, 248, 190, 221, 235, 222, 237, 243, 238, 245, 127, 191, 246, 249, 250, 252, 223, 239, 251, 247, 253, 254, 255} with K = 179 elements resulting in a rate profile output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, ..., v ₂₅₃, v ₂₅₄, v ₂₅₅] of length N = 255 as

wherein, the data bit index set Q is sorted in ascending order according to polarized sub-channel reliabilities with W (Q ₀) ＜ W (Q ₁) ＜ W (Q ₂) ＜ ... ＜ W (Q ₁₇₇) ＜ W (Q ₁₇₈) .

(2) Perform a polar transform with the rate profile output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, ..., v ₂₅₃, v ₂₅₄, v ₂₅₅] as a polar transform input bit sequence using a polar matrix

of size N = 256 to obtain a polar transform output bit sequence d = [d ₀, d ₁, d ₂, d ₃, d ₄, d ₅, d ₆, d ₇, ..., d ₂₅₃, d ₂₅₄, d ₂₅₅] of length N = 256 as d = u·G ⁽²⁵⁶⁾ , wherein, the matrix operation is over GF (2) ,

is the 8-th Kronecker power of the matrix P ⁽²⁾ .

(3) Perform an interleaving on the polar transform output bit sequence d = [d ₀, d ₁, ..., d _N-1] = [d ₀, d ₁, d ₂, d ₃, d ₄, d ₅, d ₆, d ₇, ..., d ₂₅₃, d ₂₅₄, d ₂₅₅] of length N = 256 and determine an interleaving output bit sequence d'= [d' ₀, d' ₁, ..., d' _N-1] = [d' ₀, d' ₁, d' ₂, d' ₃, d' ₄, d' ₅, d' ₆, d' ₇, ..., d' ₂₅₃, d' ₂₅₄, d' ₂₅₅] is of length N = 256 as follows

for i = 0, 1, 2, 3, 4, 5, 6, 7, ..., 253, 254, 255, the i-th bits of the interleaving output bit sequence d'is equal to the g _i-th bit of the interleaving input bit sequence d, wherein, J = [J ₀, J ₁, ..., J _N-2, J _N-1] = [J ₀, J ₁, J ₂, J ₃, J ₄, J ₅, J ₆, J ₇, ..., J ₂₅₃, J ₂₅₄, J ₂₅₅] = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 32, 33, 34, 35, 36, 37, 38, 39, 24, 25, 26, 27, 28, 29, 30, 31, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 128, 129, 130, 131, 132, 133, 134, 135, 72, 73, 74, 75, 76, 77, 78, 79, 136, 137, 138, 139, 140, 141, 142, 143, 80, 81, 82, 83, 84, 85, 86, 87, 144, 145, 146, 147, 148, 149, 150, 151, 88, 89, 90, 91, 92, 93, 94, 95, 152, 153, 154, 155, 156, 157, 158, 159, 96, 97, 98, 99, 100, 101, 102, 103, 160, 161, 162, 163, 164, 165, 166, 167, 104, 105, 106, 107, 108, 109, 110, 111, 168, 169, 170, 171, 172, 173, 174, 175, 112, 113, 114, 115, 116, 117, 118, 119, 176, 177, 178, 179, 180, 181, 182, 183, 120, 121, 122, 123, 124, 125, 126, 127, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 196, 197, 198, 199, 200, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, 213, 214, 215, 224, 225, 226, 227, 228, 229, 230, 231, 216, 217, 218, 219, 220, 221, 222, 223, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255] is an interleaver pattern determined according to a sub-block interleaver pattern π = [π ₀, π ₁, π ₂, π ₃, π ₄, π ₅, π ₆, π ₇, π ₈, π ₉, π ₁₀, π ₁₁, π ₁₂, π ₁₃, π ₁₄, π ₁₅, π ₁₆, π ₁₇, π ₁₈, π ₁₉, π ₂₀, π ₂₁, π ₂₂, π ₂₃, π ₂₄, π ₂₅, π ₂₆, π ₂₇, π ₂₈, π ₂₉, π ₃₀, π ₃₁] = [0, 1, 2, 4, 3, 5, 6, 7, 8, 16, 9, 17, 10, 18, 11, 19, 12, 20, 13, 21, 14, 22, 15, 23, 24, 25, 26, 28, 27, 29, 30, 31] as

(4) Set the first part bit sequence of the output bit sequence e = [e ₀, e ₁, ..., e ₂₆₃] to be the interleaving output bit sequence d'= [d' ₀, d' ₁, d' ₂, ..., d' ₂₅₅] of length N = 256.

(5) Perform a repetition on the rate profile output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, ..., v ₂₅₃, v ₂₅₄, v ₂₅₅] to obtain a second part bit sequence c'= [c' ₀, c' ₁, c' ₂, ..., c' _E-N-1] = [c' ₀, c' ₁, c' ₂, c' ₃, c' ₄, c' ₅, c' ₆, c' ₇] of length E -N = 264 -256 = 8 as obtaining, by the first node, the data index set Q of length K = 179; and determining, an index Q _mod (r, K) for r = 0, 1, 2, ..., E -N -1; and determining, by the first node, a bit

in the rate profiling output bit sequence v to be the r-th bit of the second part bit sequence c’ as

r=0, 1, 2, …, E-N-1. Finally, the second part bit sequence

(6) Perform a concatenation of the interleaving output bit sequence d'= [d' ₀, d' ₁, d' ₂, ..., d' ₂₅₅] of length N = 256 and the second part bit sequence c'= [c' ₀, c' ₁, c' ₂, c' ₃, c' ₄, c' ₅, c' ₆, c' ₇] = [v ₂₉, v ₄₃, v ₉₈, v ₈₈, v ₁₄₀, v ₃₀, v ₁₄₆, v ₇₁] of length E -N = 264 -256 = 8 to obtain the output bit sequence e = [e ₀, e ₁, e ₂, ..., e ₂₅₅, e ₂₅₆, e ₂₅₇, e ₂₅₈, e ₂₅₉, e ₂₆₀, e ₂₆₁, e ₂₆₂, e ₂₆₃] as e = [e ₀, e ₁, e ₂, ..., e ₂₅₅, e ₂₅₆, e ₂₅₇, e ₂₅₈, e ₂₅₉, e ₂₆₀, e ₂₆₁, e ₂₆₂, e ₂₆₃] = [d', c'] = [d' ₀, d' ₁, d' ₂, ..., d' ₂₅₅, c' ₀, c' ₁, c' ₂, c' ₃, c' ₄, c' ₅, c' ₆, c' ₇] = [d' ₀, d' ₁, d' ₂, ..., d' ₂₅₅, v ₂₉, v ₄₃, v ₉₈, v ₈₈, v ₁₄₀, v ₃₀, v ₁₄₆, v ₇₁] .

The first node transmits a signal including the output bit sequence e to a second node. FIG. 7 shows the block error rate of Example 1 over an AWGN channel, wherein the solif line is for the method in Example 1 and the dashed line is for the 5G polar coding scheme. From FIG. 7, we can see that the new method achieves a coding gain of more than 0.1 dB over than 5G polar coding scheme at the block error rate of 0.001.

Example 2: The only difference of Example 2 to Example 1 is that STEP (5) is performed as performing a repetition on the rate profile output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, ..., v ₂₅₃, v ₂₅₄, v ₂₅₅] to obtain a second part bit sequence c'= [c' ₀, c' ₁, c' ₂, ..., c' _E-N-1] = [c' ₀, c' ₁, c' ₂, c' ₃, c' ₄, c' ₅, c' ₆, c' ₇] of length E -N = 264 -256 = 8 as obtaining, by the first node, a portion of the data index set Q of length Nq = 9, i.e., {Q ₀, Q ₁, Q ₂, Q ₃, Q ₄, Q ₅, Q ₆, Q ₇, Q ₈} ; and determining, by the first node, an index Q _{mod (r, Nq)} for r = 0, 1, 2, ..., E -N -1; and determining, by the first node, a bit

Finally, the second part bit sequence

Example 3: The only difference of Example 3 to Example 1 is that STEP (5) is performed as

Performing a repetition on the rate profile output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, ..., v ₂₅₃, v ₂₅₄, v ₂₅₅] to obtain a second part bit sequence c'= [c' ₀, c' ₁, c' ₂, ..., c' _E-N-1] = [c' ₀, c' ₁, c' ₂, c' ₃, c' ₄, c' ₅, c' ₆, c' ₇] of length E -N = 264 -256 = 8 as obtaining, by the first node, the rate profiling output bit sequence v = [v ₀, v ₁, v ₂, v ₃, v ₄, v ₅, v ₆, v ₇, ..., v ₂₅₃, v ₂₅₄, v ₂₅₅] of length N = 256; and obtaining, by the first node, the data index set Q of length K = 179, i.e., Q = {Q ₀, Q ₁, Q ₂, Q ₃, ..., Q ₁₇₇, Q ₁₇₈} ; and determining, by the first node, n+1 = 8+1 = 8 bits

being binary representation of the output bit sequence length E = 264, i.e.,

with N = 2 ⁸; and determining, by the first node, n = 8 repetition index sequences Q ⁽⁷⁾ , Q ⁽⁶⁾ , Q ⁽⁵⁾ , Q ⁽⁴⁾ , Q ⁽³⁾ , Q ⁽²⁾ , Q ⁽¹⁾ , Q ⁽⁰⁾according to the data index set Q of size K = 179 and n = 8 bits

as

(i) since

determine, by the first node, the repetition index sequences Q ⁽⁷⁾ , Q ⁽⁶⁾ , Q ⁽⁵⁾ , Q ⁽⁴⁾ , Q ⁽²⁾ , Q ⁽¹⁾ , Q ⁽⁰⁾ to be empty index sequences; since b ₃ ⁽²⁶⁴⁾ = 1, determine, by the first node, the 3rd repetition sub-sequence Q ⁽³⁾ to be of length

(ii) determining, by the first node, the 3rd repetition index sequence Q ⁽³⁾ based on the data index set Q of length K = 179 as

and determining, by the first node, a second part bit sequence c’ as follows.

(i) since the repetition index sequences Q ⁽⁷⁾ , Q ⁽⁶⁾ , Q ⁽⁵⁾ , Q ⁽⁴⁾ , Q ⁽²⁾ , Q ⁽¹⁾ , Q ⁽⁰⁾are empty, determine repetition sub-sequences c’ ⁽⁷⁾= c’ ⁽⁶⁾= c’ ⁽⁵⁾= c’ ⁽⁴⁾= c’ ⁽²⁾= c’ ⁽¹⁾= c’ ⁽⁰⁾ = [] ;

(ii) since the repetition index sequences Q ⁽³⁾ is of length E ₃ = 8, the length of the 3rd repetition sub-sequences c’ ⁽³⁾to be of length E ₃ = 8;

(iii) determine the 3rd repetition sub-sequences

(iv) Concatenate n = 8 repetition sub-sequences c’ ⁽⁷⁾ , c’ ⁽⁶⁾ , c’ ⁽⁵⁾ , c’ ⁽⁴⁾ , c’ ⁽³⁾ , c’ ⁽²⁾ , c’ ⁽¹⁾ , c’ ⁽⁰⁾ into the second part bit sequence as c’ = [c’ ⁽⁷⁾ , c’ ⁽⁶⁾ , c’ ⁽⁵⁾ , c’ ⁽⁴⁾ , c’ ⁽³⁾ , c’ ⁽²⁾ , c’ ⁽¹⁾ , c’ ⁽⁰⁾ ] = c’ ⁽³⁾ = [v ₂₉, v ₄₃, v ₉₈, v ₈₈, v ₁₄₀, v ₃₀, v ₁₄₆, v ₇₁] .

Finally, the second part bit sequence c'= [v ₂₉, v ₄₃, v ₉₈, v ₈₈, v ₁₄₀, v ₃₀, v ₁₄₆, v ₇₁] .

FIG. 8 shows an exemplary block diagram of a hardware platform 800 that may be a part of a network device (e.g., base station) or a communication device (e.g., a user equipment (UE) ) . The hardware platform 800 includes at least one processor 810 and a memory 805 having instructions stored thereupon. The instructions upon execution by the processor 810 configure the hardware platform 800 to perform the operations described in

FIGS. 1 to 7 and in the various embodiments described in this patent document. The transmitter 815 transmits or sends information or data to another device. For example, a network device transmitter can send a message to user equipment. The receiver 820 receives information or data transmitted or sent by another device. For example, user equipment can receive a message from a network device.

The implementations as discussed above will apply to a network communication. FIG. 9 shows an example of a communication system (e.g., a 5G or NR cellular network) that includes a base station 920 and one or more user equipment (UE) 911, 912 and 913. In some embodiments, the UEs access the BS (e.g., the network) using a communication link to the network (sometimes called uplink direction, as depicted by dashed

arrows

931, 932, 933) , which then enables subsequent communication (e.g., shown in the direction from the network to the UEs, sometimes called downlink direction, shown by

arrows

941, 942, 943) from the BS to the UEs. In some embodiments, the BS send information to the UEs (sometimes called downlink direction, as depicted by

arrows

941, 942, 943) , which then enables subsequent communication (e.g., shown in the direction from the UEs to the BS, sometimes called uplink direction, shown by dashed

arrows

931, 932, 933) from the UEs to the BS. The UE may be, for example, a smartphone, a tablet, a mobile computer, a machine to machine (M2M) device, an Internet of Things (IoT) device, and so on.

FIG. 10 shows an example flowchart representation of a method for digital communication in accordance with one or more embodiments of the present technology. Operation 1002 includes Determining, by a first node, an output bit sequence having E bits based on an input bit sequence c having K bits, wherein the output bit sequence is determined by performing a polar transform and a repetition operation; wherein the output bit sequence is determined based on an output of the polar transform and an output of the repetition operation; wherein the input of the repetition operation is a portion of a bit sequence before the polar transform _. Operation 1004 includes transmitting, by the first node, a signal including the output bit sequence to a second node.

FIG. 11 shows another example flowchart representation of a method for digital communication in accordance with one or more embodiments of the present technology Operation 1102 includes receiving, by a second node, a signal including an output bit sequence having E bits from a first node. Operation 1104 includes determining, by the second node, an input bit sequence c having K bits based on the signal, wherein the output bit sequence is determined by performing a polar transform and a repetition operation; wherein the output bit sequence is determined based on an output of the polar transform and an output of the repetition operation; wherein the input of the repetition operation is a portion of a bit sequence before the polar transform.

Various preferred embodiments and additional features of the above-described methods of FIGS. 10 and 11 are as follows. Further examples are described with reference to embodiments 1 to 16.

In some embodiments, the portion of the bit sequence before the polar transform is a portion of the input bit sequence c. In some embodiments, the above methods durther comprising a rate profile operation, wherein the input of the rate profile operation is based on the input bit sequence c, wherein, the portion of the bit sequence before the polar transform is a portion of an output of the rate profile operation.

In some embodiments, the repetition operation comprising: obtaining, by the first node, a portion of the input bit sequence c; and determining, by the first node, a second bit sequence c’ according to a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] as

r=0, 1, 2, …, Nr, wherein, Nr is a pre-defined integer. In some embodiments, for r = 0, 1, 2, ..., Nr-1, R _r is smaller than K. In some embodiments, for r = 0, 1, 2, ..., Nr-1, R _r is smaller than N, wherein N is the polar matrix size of the polar transform. In some embodiments, R _r satisfies one of the following: R _r is an integer smaller than K, R _r is smaller than N with N being the polar matrix size of the polar transform.

In some embodiments, the repetition operation comprising: obtaining, by the first node, a portion of the input bit sequence c; and determining, by the first node, a second bit sequence c’ according to a repetition index R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] and a repetition number sequence T = [T ₀, T ₁, ..., T _Nr-2, T _Nr-1] such that for r = 0, 1, 2, ..., Nr-1, c’ comprises T _r copies of an R _r-th bit in the portion of the input bit sequence c. In some embodiments, R _r is an integer smaller than K. In some embodiments, for r = 0, 1, 2, ..., Nr-1, R _r is smaller than N, wherein N is the polar matrix size of the polar transform. In some embodiments, R _r satisfies one of the following: R _r is an integer smaller than K, R _r is smaller than N with N being the polar matrix size of the polar transform.

In some embodiments, the repetition operation comprising: obtaining, by the first node, a portion of a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] and a portion of a data index set Q = {Q ₀, Q ₁, ..., Q _K-1} of length Nq, wherein Nq is a positive integer, the portion of the rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] is the output of a rate profile operation; determining, by the first node, an index Q _{mod (r, Nq)} for r = 0, 1, 2, ..., E -N -1; and determining, by the first node, a bit

with the index Q _{mod (r, Nq)}in the portion of the rate profiling output bit sequence v into a bit in the repetition output bit sequence c’ as for r = 0, 1, 2, ... E-N-1,

In some embodiments, Nq is less than or equal to K. In some embodiments, for r = 0, 1, 2, ..., Nr-1, R _r is smaller than N, wherein N is the polar matrix size of the polar transform.

In some embodiments, the output bit sequence is determined by further performing a rate profile operation based on the input bit sequence. In some embodiments, the input of the repetition operation is based on an output of the rate profile operation. In some embodiments, the rate profile operation is performed on an input bit sequence c = [c ₀, c ₁, ..., c _K- ₁] using a data bit index set Q = {Q ₀, Q ₁, ..., Q _K-1} to obtain a rate profile output bit sequence v = [v ₀, v ₁, ..., v _N-1] .

In some embodiments, the above methods further comprising performing a pre-transform operation, wherein the input of the pre-transform operation is based on the input sequence. In some embodiments, the input of the pre-transform operation is based on an output of a rate profile operation. In some embodiments, a bit in an output of the pre-transform operation is determined by a convolution bit sequence or a convolution polynomial. In some embodiments, the convolution bit sequence comprises a generator bit sequence g = [g ₀, g ₁, ..., g _m] , or a recursive feedback bit sequence q = [q ₀, q ₁, ..., q _m] . In some embodiments, the convolution polynomial comprises a generator polynomial g (D) = g ₀ + g ₁·D + ... + g _m-1·D ^m-1 + g _m·D ^m, or a recursive feedback polynomial q (D) = q ₀ + q ₁·D + ... + q _m-1·D ^m-1 + q _m·D ^m.

In some embodiments, the polar transform is performed based on a polar matrix. In some embodiments, the output bit sequence is determined further by performing an interleaving operation, wherein the input of the interleaving operation is based on the input bit sequence. In some embodiments, the interleaving operation is determined by an interleaving pattern J = [J ₀, J ₁, J ₂, ..., J _N-2, J _N-1] of length N, wherein N is an integer larger than 1. In some embodiments, the input of the interleaving operation is based on an output of the polar transform.

In some embodiments, the above methods further comprising performing a concatenation operation, wherein the input of the concatenation operation is based on the input sequence. In some embodiments, the input of the concatenation operation is based on an output of the repetition operation. In some embodiments, the input of the concatenation operation is based on an output of the polar transform. In some embodiments, the input of the concatenation operation is based on an output of an interleaving operation.

It will be appreciated that the present document discloses methods and apparatus related to rate matching schemes applying to polar coding, PAC coding, or other pre-transformed polar coding. In 5G mobile communications standard of 3GPP, low-density parity-check (LDPC) codes are used for data transmission. However, LDPC has certain drawbacks compared to polar codes in short payload size (also called transport block size (TBS) ) . Alternatively, PAC codes can achieve finite-length bounds in moderate decoding complexity. PAC codes have code lengths with power of 2 (N =2 ⁿwith positive integer n) as polar codes. However, to efficiently transmitting a payload (or transport block (TB) ) in different wireless channel environments, it does not always have a code length of N = 2 ⁿ in time and frequency resources allocated by a base station (BS) . Therefore, rate matching schemes are needed for applying PAC codes in wireless communications.

The disclosed and other embodiments, modules and the functional operations described in this document can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this document and their structural equivalents, or in combinations of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them. The term “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to suitable receiver apparatus.

A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a standalone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document) , in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code) . A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.

The processes and logic flows described in this document can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit) .

Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and CD ROM and DVD-ROM disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.

While this document contains many specifics, these should not be construed as limitations on the scope of an invention that is claimed or of what may be claimed, but rather as descriptions of features specific to particular embodiments. Certain features that are described in this document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or a variation of a subcombination. Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results.

Only a few examples and implementations are disclosed. Variations, modifications, and enhancements to the described examples and implementations and other implementations can be made based on what is disclosed.

Claims

A method for digital communication, comprising:

determining, by a first node, an output bit sequence having E bits based on an input bit sequence c having K bits, wherein the output bit sequence is determined by performing a polar transform and a repetition operation; wherein the output bit sequence is determined based on an output of the polar transform and an output of the repetition operation; wherein the input of the repetition operation is a portion of a bit sequence before the polar transform; and

transmitting, by the first node, a signal including the output bit sequence to a second node.
A method for digital communication, comprising:

receiving, by a second node, a signal including an output bit sequence having E bits from a first node; and

determining, by the second node, an input bit sequence c having K bits based on the signal, wherein the output bit sequence is determined by performing a polar transform and a repetition operation; wherein the output bit sequence is determined based on an output of the polar transform and an output of the repetition operation; wherein the input of the repetition operation is a portion of a bit sequence before the polar transform.
The method of claim 1 or 2, wherein the portion of the bit sequence before the polar transform is a portion of the input bit sequence c.
The method of claim 1 or 2 further comprising a rate profile operation, wherein the input of the rate profile operation is based on the input bit sequence c, wherein, the portion of the bit sequence before the polar transform is a portion of an output of the rate profile operation.
The method of claim 1 or 2, wherein the repetition operation comprising:

obtaining, by the first node, a portion of the input bit sequence c; and

determining, by the first node, a second bit sequence c’ according to a repetition index sequence R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] as
r=0, 1, 2, …, Nr-1, wherein, Nr is a pre-defined integer; wherein for r = 0, 1, 2, ..., Nr-1, R _r satisfies one of the following: R _r is smaller than K, R _r is smaller than N with N being the polar matrix size of the polar transform.
The method of claim 1 or 2, wherein the repetition operation comprising:

obtaining, by the first node, a portion of the input bit sequence c; and

determining, by the first node, a second bit sequence c’ according to a repetition index R = [R ₀, R ₁, ..., R _Nr-2, R _Nr-1] and a repetition number sequence T = [T ₀, T ₁, ..., T _Nr-2, T _Nr-1] such that for r = 0, 1, 2, ..., Nr-1, c’ comprises T _r copies of an R _r-th bit in the portion of the input bit sequence c.
The method of claim 6, where R _r is an integer smaller than K.
The method of claim 4, wherein the repetition operation comprising:

obtaining, by the first node, a portion of a rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] and a portion of a data index set Q = {Q ₀, Q ₁, ..., Q _K-1} of length Nq, wherein Nq is a positive integer, the portion of the rate profiling output bit sequence v = [v ₀, v ₁, v ₂, ..., v _N-1] is the output of a rate profile operation;

determining, by the first node, an index
for r = 0, 1, 2, ..., E -N -1; and

determining, by the first node, a bit
with the index
in the portion of the rate profiling output bit sequence v into a bit in the repetition output bit sequence c’ as for r = 0, 1, 2, ... E-N-1,
The method of claim 8, wherein Nq is less than or equal to K.
The method of claim 1 or 2, wherein the output bit sequence is determined by further performing a rate profile operation based on the input bit sequence.
The method of claim 10, wherein the input of the repetition operation is based on an output of the rate profile operation.
The method of claim 10, wherein the rate profile operation is performed on an input bit sequence c = [c ₀, c ₁, ..., c _K-1] using a data bit index set Q = {Q ₀, Q ₁, ..., Q _K-1} to obtain a rate profile output bit sequence v = [v ₀, v ₁, ..., v _N-1] .
The method of claim 1 or 2, further comprising performing a pre-transform operation, wherein the input of the pre-transform operation is based on the input sequence.
The method of claim 13, wherein the input of the pre-transform operation is based on an output of a rate profile operation.
The method of claim 13, wherein a bit in an output of the pre-transform operation is determined by a convolution bit sequence or a convolution polynomial.
The method of claim 15, wherein the convolution bit sequence comprises a generator bit sequence g = [g ₀, g ₁, ..., g _m] , or a recursive feedback bit sequence q = [q ₀, q ₁, ..., q _m] .
The method of claim 15, wherein the convolution polynomial comprises a generator polynomial g (D) = g ₀ + g ₁·D + ... + g _m-1·D ^m-1 + g _m·D ^m, or a recursive feedback polynomial q (D) = q ₀ + q ₁·D + ... + q _m-1·D ^m-1 + q _m·D ^m.
The method of claim 1 or 2, wherein the polar transform is performed based on a polar matrix.
The method of claim 1 or 2, wherein the output bit sequence is determined further by performing an interleaving operation, wherein the input of the interleaving operation is based on the input bit sequence.
The method of claim 19, wherein the interleaving operation is determined by an interleaving pattern J = [J ₀, J ₁, J ₂, ..., J _N-2, J _N-1] of length N, wherein N is an integer larger than 1.
The method of claim 19, wherein the input of the interleaving operation is based on an output of the polar transform.
The method of claim 1 or 2, wherein further comprising performing a concatenation operation, wherein the input of the concatenation operation is based on the input sequence.
The method of claim 22, wherein the input of the concatenation operation is based on an output of the repetition operation.
The method of claim 22, wherein the input of the concatenation operation is based on an output of the polar transform.
The method of claim 22, wherein the input of the concatenation operation is based on an output of an interleaving operation.
An apparatus for communication network, comprising: a processor configured to implement a method recited in any of claims 1 to 25.
A computer-readable storage medium having code stored thereupon, the code, upon execution by a processor, causing the processor to implement a method recited in any of claims 1 to 25.