WO2024131062A1 - 显示驱动架构、显示驱动方法和显示装置 - Google Patents

显示驱动架构、显示驱动方法和显示装置 Download PDF

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Publication number
WO2024131062A1
WO2024131062A1 PCT/CN2023/109282 CN2023109282W WO2024131062A1 WO 2024131062 A1 WO2024131062 A1 WO 2024131062A1 CN 2023109282 W CN2023109282 W CN 2023109282W WO 2024131062 A1 WO2024131062 A1 WO 2024131062A1
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Prior art keywords
voltage
terminal
driving
control switch
display
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PCT/CN2023/109282
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English (en)
French (fr)
Inventor
李建雷
康报虹
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HKC Co Ltd
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HKC Co Ltd
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Application filed by HKC Co Ltd filed Critical HKC Co Ltd
Priority to EP23905243.4A priority Critical patent/EP4641552A4/en
Priority to JP2025536348A priority patent/JP2025541899A/ja
Priority to KR1020257021133A priority patent/KR20250112865A/ko
Publication of WO2024131062A1 publication Critical patent/WO2024131062A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/04—Display protection
    • G09G2330/045—Protection against panel overheating

Definitions

  • the present application relates to the field of display driving technology, and in particular to a display driving architecture, a display driving method and a display device.
  • a driving transistor is provided in the display panel of an OLED (Organic Light-Emitting Diode) to control the lighting or shutting down of the OLED.
  • the current flowing through the driving transistor is the current flowing through the OLED.
  • different resistances are achieved by controlling the voltage difference between the gate and source of the driving transistor, thereby achieving different currents.
  • the voltage difference between the gate and source of the driving transistor is increased, the resistance of the driving transistor is reduced, thereby increasing the current of the driving transistor, and then increasing the grayscale brightness of the OLED to achieve high grayscale display.
  • the voltage difference between the gate and source of the driving transistor is reduced, the resistance of the driving transistor is increased, thereby reducing the current of the driving transistor, and achieving low grayscale display of the OLED.
  • the resistance of the driving transistor increases, and the current corresponding to different grayscale brightnesses is unchanged. When the current remains unchanged, the resistance increases, which will cause the heat loss of the driving transistor to increase and the power consumption to increase.
  • the present application provides a display driving architecture, a display driving method and a display device, which can reduce heat loss of a driving transistor and lower power consumption.
  • the present application provides a display driving architecture, the display driving architecture is used to drive a display panel, the display panel includes a pixel unit, the pixel unit includes a driving transistor and a light-emitting unit, the first end of the driving transistor is connected to a first power supply terminal, the second end of the driving transistor is connected to an anode of the light-emitting unit, and the cathode of the light-emitting unit is connected to a second power supply terminal;
  • the display driver architecture includes:
  • a switching module comprising a first switching unit, a second switching unit and a voltage output terminal, the first switching unit and the second switching unit are respectively connected to the voltage output terminal, the voltage output terminal is connected to the first power supply terminal or the second power supply terminal, the first switching unit is used to output a first voltage, the second switching unit is used to output a second voltage, the switching module outputs the first voltage to the voltage output terminal based on high grayscale data of the pixel unit, or the switching module outputs the second voltage to the voltage output terminal based on low grayscale data of the pixel unit, and the first voltage is greater than the second voltage;
  • the switching module When the switching module outputs the second voltage, the current flowing through the driving transistor corresponds to the low grayscale data of the pixel unit, and the resistance of the driving transistor is reduced to reduce the heat dissipation of the driving transistor.
  • the present application also provides a display driving method, the display driving method is used to drive a display panel, the display panel includes a pixel unit, the pixel unit includes a driving transistor and a light-emitting unit, a first end of the driving transistor is connected to a first power supply end, a second end of the driving transistor is connected to an anode of the light-emitting unit, and a cathode of the light-emitting unit is connected to a second power supply end, the display driving method includes:
  • grayscale data of the pixel unit wherein the grayscale data includes high grayscale data and low grayscale data;
  • the current flowing through the driving transistor corresponds to the low grayscale data of the pixel unit, and the resistance of the driving transistor is reduced to reduce the heat generation and power consumption of the driving transistor.
  • the present application also provides a display device, which includes a display panel and the display driving architecture as described above, and the display device also includes: a power supply module, which is respectively connected to the first switching unit and the second switching unit, and the power supply module is used to provide the first voltage to the first switching unit and provide the second voltage to the second switching unit.
  • high grayscale display corresponds to high grayscale data.
  • the switching module outputs the first voltage to the voltage output terminal based on the high grayscale data of the pixel unit.
  • the resistance of the driving transistor is low.
  • the current of the driving transistor is high, thereby realizing high grayscale display of the light-emitting unit.
  • Low grayscale display corresponds to low grayscale data.
  • the switching module outputs the second voltage to the voltage output terminal based on the low grayscale data of the pixel unit.
  • the gate and source voltage difference of the driving transistor is maintained at a large value, that is, when the resistance of the driving transistor is ensured to be small, the voltage difference between the source and drain of the driving transistor is reduced by the output of the second voltage, so that the current of the driving transistor is reduced.
  • the current reduction realizes low grayscale display. It can be seen that the present application realizes low grayscale display by reducing the current of the driving transistor, and at the same time can also ensure that the resistance of the driving transistor is small, reduce the heat loss of the driving transistor, and reduce power consumption.
  • FIG. 1 is a schematic diagram of the structure of a display driver architecture in the first embodiment of the present application.
  • FIG. 2 is a schematic diagram of the structure of a display pixel in the present application.
  • FIG. 3 is a schematic flow chart of the steps of a display driving method in a second embodiment of the present application.
  • FIG. 4 is a schematic diagram of a specific flow chart of step S10 of the display driving method in the present application.
  • FIG. 5 is a schematic diagram of a specific flow chart of step S20 of the display driving method in the present application.
  • FIG. 6 is a schematic diagram of the structure of a display device in the third embodiment of the present application.
  • the indications of directions (such as up, down, left, right, front and back) used to explain the structure and movement of various elements of the present application are not absolute but relative. These descriptions are appropriate when these elements are in the positions shown in the drawings. If the description of the positions of these elements changes, the indications of these directions also change accordingly.
  • the present application discloses a display driving architecture 20.
  • the technical solution of the present application can be applied to a display panel of a light-emitting diode (LED) or an organic light-emitting diode (OLED).
  • LED light-emitting diode
  • OLED organic light-emitting diode
  • the display panel 10 includes a pixel unit 110, and the pixel unit 110 includes a driving transistor T0 (Thin Film Transistor, TFT) and a light emitting unit 111, and the light emitting unit 111 is an LED or an OLED.
  • the first end of the driving transistor T0 is connected to the first power supply terminal 112
  • the second end of the driving transistor T0 is connected to the anode of the light emitting unit 111
  • the cathode of the light emitting unit 111 is connected to the second power supply terminal 113;
  • the first power supply terminal 112 provides the working voltage of the light emitting unit 111, such as ELVDD
  • the second power supply terminal 113 is connected to the common terminal of the light emitting unit 111, such as the common ground terminal ELVSS.
  • the current of the light emitting unit 111 flows from the anode of the light emitting unit 111 to the cathode of the light emitting unit 111.
  • the display driving architecture 20 includes: a switching module 210, the switching module 210 includes a first switching unit 211, a second switching unit 212 and a voltage output terminal 213, the first switching unit 211 and the second switching unit 212 are respectively connected to the voltage output terminal 213, the voltage output terminal 213 is connected to the first power supply terminal 112 or the second power supply terminal 113, and the pixel unit 110 is powered by the voltage output terminal 213.
  • the first switching unit 211 is used to output a first voltage
  • the second switching unit 212 is used to output a second voltage.
  • the switching module 210 outputs the first voltage to the voltage output terminal 213 based on the high grayscale data of the pixel unit 110, or the switching module 210 outputs the second voltage to the voltage output terminal 213 based on the low grayscale data of the pixel unit 110, and the first voltage is greater than the second voltage.
  • the driving transistor T0 has a control terminal, a first terminal and a second terminal.
  • the control terminal refers to the gate of the driving transistor T0
  • the first terminal refers to the drain
  • the second terminal refers to the source.
  • the first terminal can also refer to the source and the second terminal can refer to the drain.
  • the voltage difference between the gate and the source is increased by increasing the gate voltage, so that the opening degree of the driving transistor T0 is higher and the channel resistance is reduced.
  • the voltage difference between the drain and the source determines the current flowing through the driving transistor T0.
  • the first voltage is larger.
  • the voltage difference between the drain and the source also increases, so that the current is larger. In other words, the current flowing through the light-emitting unit 111 is larger, and the light-emitting unit 111 is brighter, thereby completing the high grayscale. show.
  • the switching module 210 When the pixel unit 110 performs low grayscale display, low grayscale data will be generated in advance, and the switching module 210 outputs the second voltage to the voltage output terminal 213 through the second switching unit 212 based on the low grayscale data. Among them, the current corresponding to the low grayscale display is also low. The second voltage acts on the drain, and the voltage difference between the drain and the source is reduced, thereby reducing the current. In this way, the current flowing through the light-emitting unit 111 is small, and the brightness of the light-emitting unit 111 becomes low, thereby completing the low grayscale display.
  • the gate voltage of the driving transistor T0 maintains a high value, so that the voltage difference between the gate and the source maintains a high difference, so that the opening degree of the driving transistor T0 is still high, and the channel resistance formed is small.
  • the current flowing through the driving transistor T0 corresponds to the low grayscale data of the pixel unit 110, that is, it is ensured that the current corresponding to the low grayscale displayed by the light-emitting unit 111 is fixed, and when the resistance of the driving transistor T0 is reduced, the heat power consumption of the driving transistor T0 is reduced.
  • Q represents the heat dissipation of the driving crystal
  • I represents the voltage flowing through the driving transistor T0
  • R represents the channel resistance of the driving transistor T0, that is, the resistance.
  • Q I*I*R, the current I remains unchanged, R decreases, and it can be seen that the heat dissipation is reduced.
  • high grayscale display corresponds to high grayscale data
  • the switching module 210 outputs the first voltage to the voltage output terminal 213 based on the high grayscale data of the pixel unit 110.
  • the gate and source voltage difference of the driving transistor T0 is large, the resistance of the driving transistor T0 is low, and under the action of the first voltage, the current of the driving transistor T0 is high, thereby realizing high grayscale display of the light-emitting unit 111.
  • Low grayscale display corresponds to low grayscale data.
  • the switching module 210 outputs the second voltage to the voltage output terminal 213 based on the low grayscale data of the pixel unit 110.
  • the gate and source voltage difference of the driving transistor T0 is maintained at a larger value, that is, when the resistance of the driving transistor T0 is ensured to be small, the voltage difference between the source and the drain of the driving transistor T0 is reduced by the output of the second voltage, so that the current of the driving transistor T0 is reduced, and the current reduction realizes low grayscale display.
  • the present application realizes low grayscale display by reducing the current of the driving transistor T0, and at the same time, it can also ensure that the resistance of the driving transistor T0 is small, reduce the heat loss of the driving transistor T0, and reduce power consumption.
  • the resistance of the driving transistor T0 is affected by the voltage difference between the gate and the source. The larger the voltage difference, the smaller the resistance, and the smaller the voltage difference, the larger the resistance.
  • the current flowing through the driving transistor T0 is affected by the voltage difference between the drain and the source. The larger the voltage difference, the larger the current, and the smaller the voltage difference, the smaller the current.
  • the technical solution of the present application is to achieve low grayscale display under low resistance by adjusting the voltage difference between the drain and the source.
  • the first switching unit 211 includes a first control switch T1 and a first power terminal 2110.
  • the first voltage is input to the first switching unit 211 through the first power terminal 2110.
  • the first end of the first control switch T1 is connected to the first power terminal 2110, and the second end is connected to the voltage output terminal 213.
  • the control end of the first control switch T1 responds to the first control signal to provide the first voltage of the first power terminal 2110 to the voltage output terminal 213.
  • the first control signal is generated based on the high grayscale data.
  • the first end and the second end of the first control switch T1 are connected, and the first voltage is output from the first end to the second end, and the second end is connected to the voltage output terminal 213. Therefore, the first voltage is output to the first power terminal 112 or the second power terminal 113 of the pixel unit 110 through the voltage output terminal 213.
  • the second switching unit 212 includes a second control switch T2 and a second power terminal 2120.
  • the first end of the second control switch T2 is connected to the second power terminal 2120, and the second end is connected to the voltage output terminal 213.
  • the control end of the second control switch T2 responds to the second control signal to provide the second voltage of the second power terminal 2120 to the voltage output terminal 213.
  • the second control signal is generated based on the low grayscale data.
  • the control end of the second control switch T2 receives the second control signal, the first end and the second end of the second control switch T2 are connected, and the second voltage is output from the first end to the second end, and the second end is connected to the voltage output terminal 213.
  • the second voltage is output to the first power terminal 112 or the second power terminal 113 of the pixel unit 110 through the voltage output terminal 213.
  • the first control switch T1 and the second control switch T2 are TFTs, such as N-type TFTs.
  • the first control switch T1 is turned on.
  • the second control switch T2 is turned on.
  • the switching module 210 also includes a first data line 214, a first scan line 215 and a second scan line 216; the first data line 214 extends vertically, the first scan line 215 and the second scan line 216 extend horizontally, the first scan line 215 is used to control the first switching unit 211, and the second scan line 216 is used to control the second switching unit 212.
  • the first switching unit 211 also includes a third control switch T3 and a first capacitor C1, the control end of the third control switch T3 is connected to the first scan line 215, the first end is connected to the first data line 214, the second end is connected to the first electrode plate of the first capacitor C1, the second electrode plate of the first capacitor C1 is connected to the line between the first control switch T1 and the first power terminal 2110, and the control end of the first control switch T1 is connected to the line between the third control switch T3 and the first capacitor C1.
  • the first scan line 215 transmits a high level
  • the second scan line 216 transmits a low level.
  • the third control switch T3 is an N-type TFT. After the control end of the third control switch T3 receives a high level signal, the first end and the second end of the third control switch T3 are turned on. The signal of the first data line 214 transmits the first control signal to the first data line 215. The first control switch T1 is also turned on, and the first voltage is transmitted to the voltage output terminal 213.
  • the first capacitor C1 can be charged through the first data line 214, and the first capacitor C1 can store electricity, so that the first control switch T1 can be kept turned on for a certain period of time, ensuring that the first voltage continues to act on the driving transistor T0, and maintaining the lighting state of the light-emitting unit 111.
  • the second switching unit 212 also includes a fourth control switch T4 and a second capacitor C2, the control end of the fourth control switch T4 is connected to the second scan line 216, the first end is connected to the first data line 214, the second end is connected to the first electrode plate of the second capacitor C2, the second electrode plate of the second capacitor C2 is connected to the line between the second control switch T2 and the second power terminal 2120, and the control end of the second control switch T2 is connected to the line between the fourth control switch T4 and the second capacitor C2.
  • the first scan line 215 transmits a low level
  • the second scan line 216 transmits a high level.
  • the fourth control switch T4 is an N-type TFT. After the control end of the fourth control switch T4 receives a high level signal, the first end and the second end of the fourth control switch T4 are turned on. The signal of the first data line 214 transmits the second control signal to the second control switch T2, and the second control switch T2 is also turned on, and the second voltage is transmitted to the voltage output terminal 213.
  • the second capacitor C2 can be charged through the first data line 214, and the second capacitor C2 can store electricity, so that the second control switch T2 can be maintained on for a certain period of time, ensuring that the second voltage continues to act on the driving transistor T0, and maintaining the lighting state of the light-emitting unit 111.
  • the control switch can also be a P-type TFT, which is turned on in response to a low level.
  • the first data line 214 is used to provide a first control signal and a second control signal.
  • the first control signal and the second control signal are the same control signal, and both are high-level signals.
  • the display panel 10 includes a transparent substrate, and the pixel unit 110 is arranged on the surface of the transparent substrate.
  • the pixel unit 110 includes a second data line 114 and a third scan line 115, a response switch T5 and a storage capacitor C.
  • the control end of the response switch T5 is connected to the third scan line 115, the first end is connected to the second data line 114, and the second end is connected to the first electrode of the storage capacitor C.
  • the second electrode of the storage capacitor C is connected to the line between the driving transistor T0 and the first power supply terminal 112, and the control end of the driving transistor T0 is connected to the line between the response switch T5 and the storage capacitor C.
  • the third scan line 115 provides a high-level signal
  • the control end of the response switch T5 responds to the high-level signal
  • the first end and the second end of the response switch T5 are turned on
  • the second data line 114 provides a high-level signal to be transmitted to the control end of the driving transistor T0
  • the driving transistor T0 responds to the high-level signal
  • the first end and the second end of the driving transistor T0 are turned on
  • the voltage output by the switching module 210 acts on the first end of the driving transistor T0
  • the light-emitting unit 111 is lit.
  • the storage capacitor C is charged through the second data line 114, and the driving transistor T0 is kept turned on through the storage capacitor C, so as to ensure that the light-emitting unit 111 is lit within a certain period of time.
  • the first data line 214 is located within the positive projection of the second data line 114 on the transparent substrate, so that even if the first data line 214 is added, it will not additionally block the light emitted by the light-emitting unit 111.
  • the first data line 214 and the second data line 114 can also be the same data line.
  • the data signal of the control switching module 210 and the data signal from the control pixel unit 110 are the same.
  • the corresponding display drive architecture 20 also outputs the corresponding voltage, so the two can receive the data signal synchronously.
  • the control of the switching module 210 and the pixel unit 110 can also be made more flexible.
  • the first scan line 215 is located within the orthographic projection of the third scan line 115 on the transparent substrate, and the second scan line 216 is located within the orthographic projection of another third scan line 115 on the transparent substrate; in this way, the scan line and data line of the display driving architecture 20 are respectively located within the orthographic projection of the scan line and data line of the pixel unit 110, and no additional obstruction of light is caused.
  • the display panel 10 includes a plurality of pixel groups, each pixel group includes at least two pixel units 110, and the pixel units 110 in the same pixel group are all connected to the voltage output terminal 213 of the same switching module 210.
  • one switching module 210 can control the brightness of two pixel units 110 at the same time, thereby improving the control efficiency.
  • the number of pixel units 110 to be controlled may be more than two, for example, 5 pixel units 110 in the horizontal direction and 3 pixel units 110 in the vertical direction, and one pixel group includes 15 pixel units 110.
  • One switching module 210 controls the voltage of 15 pixel units 110 at the same time.
  • the display driving architecture 20 further includes: a timing control module 220 and a driving module 230 .
  • the timing control module 220 is connected to the driving module 230
  • the driving module 230 is connected to the switching module 210 .
  • the timing control module 220 is used to obtain the high grayscale data or low grayscale data of the pixel unit 110, and generate a first driving instruction according to the high grayscale data, and generate a second driving instruction according to the low grayscale data; whether the pixel unit 110 displays a high grayscale or a low grayscale is controlled by the grayscale data input by the signal source 240.
  • the signal source 240 transmits the grayscale data to the timing control module 220, and the grayscale data already includes the high grayscale data and the low grayscale data.
  • the timing control module 220 generates corresponding driving instructions according to different data contents. That is, the first driving instruction is generated according to the high grayscale data, and the second driving instruction is generated according to the low grayscale data.
  • the driving module 230 is connected to the timing control module 220 .
  • the driving module 230 receives the first driving instruction or the second driving instruction, and controls the switching module 210 to output the first voltage according to the first driving instruction, and controls the switching module 210 to output the second voltage according to the second driving instruction.
  • the driving module 230 can be understood as a driving chip. After receiving the first driving instruction, the driving chip outputs a high level to the first data line 214, also outputs a high level to the first scan line 215, and outputs a low level to the second scan line 216. Through the high level of the first scan line 215, the third control switch T3 is turned on, the high level of the first data line 214 is output to the control end of the first control switch T1, the first control switch T1 is turned on, and the first voltage is output to the voltage output end 213.
  • the driving chip After receiving the second driving instruction, the driving chip outputs a high level to the first data line 214, a low level to the first scan line 215, and a high level to the second scan line 216.
  • the fourth control switch T4 is turned on, the high level of the first data line 214 is output to the control end of the second control switch T2, the second control switch T2 is turned on, and the second voltage is output to the voltage output end 213.
  • the present application further provides a display driving method, which is used to drive a display panel 10, wherein the display panel 10 includes a pixel unit 110, and the pixel unit 110 includes a driving transistor T0 and a light emitting unit 111, wherein a first end of the driving transistor T0 is connected to a first power supply end 112, a second end of the driving transistor T0 is connected to an anode of the light emitting unit 111, and a cathode of the light emitting unit 111 is connected to a second power supply end 113, and the display driving method includes:
  • Step S10 obtaining grayscale data of the pixel unit 110 , the grayscale data including high grayscale data and low grayscale data; inputting the grayscale data through the signal source 240 , identifying the high grayscale data and the low grayscale data in the grayscale data.
  • Step S20 outputting a first voltage to the first power terminal 112 or the second power terminal 113 based on the high grayscale data, and outputting a second voltage to the first power terminal 112 or the second power terminal 113 based on the low grayscale data.
  • the timing control module 220 If it is high grayscale data, the timing control module 220 generates a first driving instruction based on the high grayscale data, and transmits the first driving instruction to the driving module 230.
  • the driving module 230 outputs a high level to the first data line 214, also outputs a high level to the first scan line 215, and outputs a low level to the second scan line 216 based on the first driving instruction.
  • the fourth control switch T4 is disconnected in response to the low level. Through the high level of the first scan line 215, the third control switch T3 is turned on, and the high level of the first data line 214 is output to the control end of the first control switch T1. The first control switch T1 is turned on, and the first voltage is output to the voltage output terminal 213.
  • the first voltage can be output to the first power supply terminal 112 or to the second power supply terminal 113.
  • the effect of adjusting the voltage difference between the drain and the source can be achieved by adjusting the drain voltage of the driving transistor T0.
  • the effect of adjusting the voltage difference between the drain and the source can also be achieved by adjusting the source voltage of the driving transistor T0.
  • the timing control module 220 If it is low grayscale data, the timing control module 220 generates a second driving instruction based on the low grayscale data, and transmits the second driving instruction to the driving module 230.
  • the driving module 230 sends the second driving instruction to the first data line based on the second driving instruction.
  • the first data line 214 outputs a high level, outputs a low level to the first scan line 215, and outputs a high level to the second scan line 216.
  • the third control switch T3 is disconnected in response to the low level.
  • the fourth control switch T4 is turned on, the high level of the first data line 214 is output to the control end of the second control switch T2, the second control switch T2 is turned on, and the second voltage is output to the voltage output terminal 213.
  • the second voltage can be output to the first power supply terminal 112 or the second power supply terminal 113.
  • the current flowing through the driving transistor T0 corresponds to the low grayscale data of the pixel unit 110, and the resistance of the driving transistor T0 is reduced to reduce the heat power consumption of the driving transistor T0.
  • the current corresponding to the low grayscale display is also low.
  • the second voltage acts on the drain, and the voltage difference between the drain and the source is reduced, thereby reducing the current. In this way, the current flowing through the light-emitting unit 111 is small, and the brightness of the light-emitting unit 111 becomes low, thereby completing the low grayscale display.
  • the gate voltage of the driving transistor T0 maintains a high value, so that the voltage difference between the gate and the source maintains a high difference, so that the opening degree of the driving transistor T0 is still high, and the channel resistance formed is small.
  • the current flowing through the driving transistor T0 corresponds to the low grayscale data of the pixel unit 110, that is, it is ensured that the current corresponding to the low grayscale displayed by the light-emitting unit 111 is fixed, and when the resistance of the driving transistor T0 is reduced, the heat power consumption of the driving transistor T0 is reduced.
  • the step of obtaining high grayscale data of the pixel unit 110 or low grayscale data of the pixel unit 110 includes:
  • Step S110 obtaining grayscale data of the pixel unit 110, and comparing the grayscale data of the pixel unit 110 with a preset grayscale; the grayscale data ranges from 0 to 255, 0 represents pure black, 255 represents pure white, and data between the two represents a transition from pure black to pure white.
  • Step S120 when the grayscale data of the pixel unit 110 is greater than the preset grayscale, the grayscale data is determined to be high grayscale data; after the grayscale data is obtained, it is necessary to identify whether the grayscale data belongs to high grayscale data, for example, the preset grayscale is 127. If the grayscale data is 200, and 200 is greater than 127, the grayscale data is determined to be high grayscale data.
  • Step S130 when the grayscale data of the pixel unit 110 is less than or equal to the preset grayscale, the grayscale data is determined to be low grayscale data. If the grayscale data is 120, and 120 is less than 127, the grayscale data is determined to be low grayscale data.
  • the preset grayscale data can be adjusted, for example, the preset grayscale is 120, 150 or 200, etc.
  • Step S210 scan the brightness of the pixel unit 110, obtain the display grayscale of the pixel unit 110, and compare the grayscale data with the display grayscale;
  • the grayscale data can be understood as the brightness instruction provided to the pixel unit 110, and the display grayscale can be understood as the actual brightness of the pixel unit 110. By comparing the two, it can be determined whether the display is Whether the brightness meets the provided brightness instruction.
  • step S220 when the grayscale data of the pixel unit 110 is greater than the displayed grayscale, a first voltage is provided to the pixel unit 110; if the grayscale data of the pixel unit 110 is greater than the displayed grayscale, it means that the brightness of the pixel unit 110 is too low. At this time, a first voltage is provided to the pixel unit 110 to increase the brightness of the light-emitting unit 111 in the pixel unit 110.
  • Step S230 when the grayscale data of the pixel unit 110 is less than or equal to the display grayscale, the second voltage is provided to the pixel unit 110. If the grayscale data of the pixel unit 110 is less than or equal to the display grayscale, it means that the brightness of the pixel unit 110 is too high. At this time, the second voltage is provided to the pixel unit 110 to reduce the brightness of the light-emitting unit 111 in the pixel unit 110.
  • the display panel 10 has screen burn-in, which means that the display panel 10 is in a static screen for a long time, which accelerates the loss of the pixel unit 110 and the attenuation of the screen brightness. If the screen is switched, afterimages will appear at the positions of some pixel units 110.
  • the pixel unit 110 can be reduced from being in a certain working voltage for a long time, thereby alleviating the screen burn-in and increasing the service life of the display panel 10.
  • the present application further provides a display device 1, which includes a display panel 10 and a display driving architecture 20 as described above, and further includes a power module 30, which is connected to a first switching unit 211 and a second switching unit 212, respectively, and is used to provide a first voltage to the first switching unit 211 and a second voltage to the second switching unit 212. Then, through the switching operation between the first switching unit 211 and the second switching unit 212, the first voltage or the second voltage is provided to the voltage output terminal 213, respectively.

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Abstract

本申请提供了一种显示驱动架构、显示驱动方法和显示装置。其中，显示驱动架构(20)用于驱动显示面板(10)，显示面板(10)包括像素单元(110)，像素单元(110)包括驱动晶体管(T0)和发光单元(111)，驱动晶体管(T0)的第一端连接第一电源端(112)，驱动晶体管(T0)的第二端连接发光单元(111)的阳极，发光单元(111)的阴极连接第二电源端(113)；显示驱动架构(20)包括：切换模块(210)，切换模块(210)包括第一切换单元(211)、第二切换单元(212)和电压输出端(231)，第一切换单元(211)用于输出第一电压，第二切换单元(212)用于输出第二电压，切换模块(210)基于像素单元(110)的高灰阶数据将第一电压输出到电压输出端(213)，或者基于像素单元(110)的低灰阶数据将第二电压输出到电压输出端(213)。本申请的技术方案能够减少驱动晶体管的热量损失，降低功耗。

Description

显示驱动架构、显示驱动方法和显示装置
本申请要求于2022年12月20日提交中国专利局，申请号为2022116379309，申请名称为“显示驱动架构、显示驱动方法和显示装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示驱动技术领域，特别涉及一种显示驱动架构、显示驱动方法和显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息，而不必然地构成现有技术。
在OLED(Organic Light-Emitting Diode，有机发光二极管)的显示面板中设置有驱动晶体管，驱动晶体管控制OLED的点亮或关闭。流过驱动晶体管的电流就是流过OLED的电流。为了实现OLED的不同发光亮度，通过控制驱动晶体管的栅极和源极之间的电压差来实现不同的电阻，进而来实现不同电流。
在高灰阶显示时，提高驱动晶体管的栅极和源极之间的电压差，驱动晶体管的电阻降低，从而提高驱动晶体管的电流，进而提高OLED的灰阶亮度，实现高灰阶显示。在低灰阶显示时，降低驱动晶体管的栅极和源极之间的电压差，提高了驱动晶体管的电阻，从而降低驱动晶体管的电流，实现OLED的低灰阶显示。但是，在低灰阶显示时，驱动晶体管的电阻升高，不同的灰阶亮度对应的电流是不变的，在电流不变的情况下，电阻升高，会导致驱动晶体管的热量损失升高，功耗增加。
发明内容
本申请提供一种显示驱动架构、显示驱动方法和显示装置，能够减少驱动晶体管的热量损失，降低功耗。
根据本申请的一个方面，本申请提供一种显示驱动架构，所述显示驱动架构用于驱动显示面板，所述显示面板包括像素单元，所述像素单元包括驱动晶体管和发光单元，所述驱动晶体管的第一端连接第一电源端，所述驱动晶体管的第二端连接所述发光单元的阳极，所述发光单元的阴极连接第二电源端；
所述显示驱动架构包括：
切换模块，所述切换模块包括第一切换单元、第二切换单元和电压输出端，所述第一切换单元和所述第二切换单元分别连接所述电压输出端，所述电压输出端连接所述第一电源端或所述第二电源端，所述第一切换单元用于输出第一电压，所述第二切换单元用于输出第二电压，所述切换模块基于所述像素单元的高灰阶数据将所述第一电压输出到所述电压输出端，或者所述切换模块基于所述像素单元的低灰阶数据将所述第二电压输出到所述电压输出端，所述第一电压大于所述第二电压；
其中，所述切换模块在输出所述第二电压时，流经所述驱动晶体管电流与所述像素单元的低灰阶数据相对应，所述驱动晶体管的电阻降低，以降低所述驱动晶体管的发热功耗。
本申请还提供一种显示驱动方法，所述显示驱动方法用于驱动显示面板，所述显示面板包括像素单元，所述像素单元包括驱动晶体管和发光单元，所述驱动晶体管的第一端连接第一电源端，所述驱动晶体管的第二端连接所述发光单元的阳极，所述发光单元的阴极连接第二电源端，所述显示驱动方法包括：
获取所述像素单元的灰阶数据，所述灰阶数据包括高灰阶数据和低灰阶数据；
基于所述高灰阶数据将第一电压输出到所述第一电源端或所述第二电源端，或者基于所述低灰阶数据将第二电压输出到所述第一电源端或所述第二电源端；
其中，在输出所述第二电压时，流经所述驱动晶体管电流与所述像素单元的低灰阶数据相对应，所述驱动晶体管的电阻降低，以降低所述驱动晶体管的发热功耗。
本申请还提供一种显示装置，所述显示装置包括显示面板和如上文所述的显示驱动架构，所述显示装置还包括：电源模块，所述电源模块分别连接所述第一切换单元和所述第二切换单元，所述电源模块用于向所述第一切换单元提供所述第一电压，并向所述第二切换单元提供所述第二电压。
本申请的技术方案中，高灰阶显示对应高灰阶数据，在发光单元的点亮的亮度较高时，切换模块基于像素单元的高灰阶数据，将第一电压输出到电压输出端。在驱动晶体管的栅极和源极电压差较大的情况下，驱动晶体管的电阻较低，在结合第一电压的作用下，驱动晶体管的电流较高，实现了发光单元的高灰阶显示。
低灰阶显示对应低灰阶数据，在发光单元的点亮的亮度较低时，切换模块基于像素单元的低灰阶数据，将第二电压输出到电压输出端。此时，维持驱动晶体管的栅极和源极电压差在较大的数值情况下，即保证驱动晶体管的电阻较小时，通过第二电压的输出降低驱动晶体管源极和漏极之间的电压差，实现驱动晶体管的电流减小，电流减少实现低灰阶显 示。由此可知，本申请通过降低驱动晶体管的电流的方式实现低灰阶显示，同时也能够保证驱动晶体管的电阻较小，减少驱动晶体管的热量损失，降低功耗。
应当理解的是，以上的一般描述和后文的细节描述仅是示例性的，并不能限制本申请。
附图说明
通过参照附图详细描述其示例实施例，本申请的上述和其它目标、特征及优点将变得更加显而易见。
图1是本申请中第一实施例中显示驱动架构的结构示意图。
图2是本申请中显示像素的结构示意图。
图3是本申请中第二实施例中显示驱动方法的步骤流程示意图。
图4是本申请中显示驱动方法的步骤S10的具体流程示意图。
图5是本申请中显示驱动方法的步骤S20的具体流程示意图。
图6是本申请中第三实施例中显示装置的结构示意图。
本发明的实施方式
尽管本申请可以容易地表现为不同形式的实施方式，但在附图中示出并且在本说明书中将详细说明的仅仅是其中一些具体实施方式，同时可以理解的是本说明书应视为是本申请原理的示范性说明，而并非旨在将本申请限制到在此所说明的那样。
由此，本说明书中所指出的一个特征将用于说明本申请的一个实施方式的其中一个特征，而不是暗示本申请的每个实施方式必须具有所说明的特征。此外，应当注意的是本说明书描述了许多特征。尽管某些特征可以组合在一起以示出可能的系统设计，但是这些特征也可用于其他的未明确说明的组合。由此，除非另有说明，所说明的组合并非旨在限制。
在附图所示的实施方式中，方向的指示(诸如上、下、左、右、前和后)用于解释本申请的各种元件的结构和运动不是绝对的而是相对的。当这些元件处于附图所示的位置时，这些说明是合适的。如果这些元件的位置的说明发生改变时，则这些方向的指示也相应地改变。
现在将参考附图更全面地描述示例实施方式。然而，示例实施方式能够以多种形式实施，且不应被理解为限于在此阐述的范例；相反，提供这些示例实施方式使得本申请的描述将更加全面和完整，并将示例实施方式的构思全面地传达给本领域的技术 人员。附图仅为本申请的示意性图解，并非一定是按比例绘制。图中相同的附图标记表示相同或类似的部分，因而将省略对它们的重复描述。
以下结合本说明书的附图，对本申请的较佳实施方式予以进一步地详尽阐述。
实施例一
参阅图1和图2所示，本申请公开了一种显示驱动架构20，本申请的技术方案可以应用在发光二极管(Light-Emitting Diode，LED)或有机发光二极管(Organic Light-Emitting Diode，OLED)的显示面板中。
显示面板10包括像素单元110，像素单元110包括驱动晶体管T0(Thin Film Transistor，TFT)和发光单元111，发光单元111为LED或者OLED。驱动晶体管T0的第一端连接第一电源端112，驱动晶体管T0的第二端连接发光单元111的阳极，发光单元111的阴极连接第二电源端113；通常来说，第一电源端112提供发光单元111的工作电压，比如ELVDD，第二电源端113连接发光单元111的公共端，比如公共接地端ELVSS。发光单元111的电流由发光单元111的阳极流向发光单元111的阴极。
显示驱动架构20包括：切换模块210，切换模块210包括第一切换单元211、第二切换单元212和电压输出端213，第一切换单元211和第二切换单元212分别连接电压输出端213，电压输出端213连接第一电源端112或第二电源端113，通过电压输出端213向像素单元110供电。第一切换单元211用于输出第一电压，第二切换单元212用于输出第二电压，切换模块210基于像素单元110的高灰阶数据将第一电压输出到电压输出端213，或者切换模块210基于像素单元110的低灰阶数据将第二电压输出到电压输出端213，第一电压大于第二电压。
在像素单元110进行高灰阶显示时，会提前生成高灰阶数据，切换模块210基于高灰阶数据通过第一切换单元211将第一电压输出至电压输出端213。驱动晶体管T0具有控制端、第一端和第二端，通常控制端是指驱动晶体管T0的栅极，第一端是指漏极，第二端是指源极。当然，也可以是第一端是指源极，第二端是指漏极。在控制驱动晶体管T0的电流时，增加驱动晶体管T0的栅极和源极之间的电压差，通常通过增加栅极电压来增加栅极和源极之间的电压差，如此使驱动晶体管T0的开启程度更高，沟道阻值降低。漏极和源极之间的电压差决定了流经驱动晶体管T0的电流大小，第一电压较大，在第一电压作用于漏极时，漏极和源极之间的电压差也增加，从而电流较大。也就说流经发光单元111的电流较大，发光单元111更亮，从而完成高灰阶 显示。
在像素单元110进行低灰阶显示时，会提前生成低灰阶数据，切换模块210基于低灰阶数据通过第二切换单元212将第二电压输出至电压输出端213。其中，低灰阶显示对应的电流也较低，通过第二电压作用于漏极，漏极和源极之间的电压差减小，从而使电流减小。这样，流经发光单元111的电流较小，发光单元111亮度变低，从而完成低灰阶显示。此时，驱动晶体管T0的栅极电压维持较高数值，从而使栅极和源极之间的电压差维持较高差值，这样，驱动晶体管T0的开启程度依然较高，形成的沟道阻值较小。而流经驱动晶体管T0电流与像素单元110的低灰阶数据相对应，即保证发光单元111显示对应低灰阶的电流是固定的，在驱动晶体管T0的电阻降低的情况下，降低了驱动晶体管T0的发热功耗。
以公式进行说明，Q代表驱动晶体的发热功耗，I代表流经驱动晶体管T0的电压，R代表驱动晶体管T0的沟道阻值，即电阻。Q＝I*I*R，电流I不变，R减小，可见发热功耗降低。
本实施例的技术方案中，高灰阶显示对应高灰阶数据，在发光单元111的点亮的亮度较高时，切换模块210基于像素单元110的高灰阶数据，将第一电压输出到电压输出端213。在驱动晶体管T0的栅极和源极电压差较大的情况下，驱动晶体管T0的电阻较低，在结合第一电压的作用下，驱动晶体管T0的电流较高，实现了发光单元111的高灰阶显示。
低灰阶显示对应低灰阶数据，在发光单元111的点亮的亮度较低时，切换模块210基于像素单元110的低灰阶数据，将第二电压输出到电压输出端213。此时，维持驱动晶体管T0的栅极和源极电压差在较大的数值情况下，即保证驱动晶体管T0的电阻较小时，通过第二电压的输出降低驱动晶体管T0源极和漏极之间的电压差，实现驱动晶体管T0的电流减小，电流减少实现低灰阶显示。由此可知，本申请通过降低驱动晶体管T0的电流的方式实现低灰阶显示，同时也能够保证驱动晶体管T0的电阻较小，减少驱动晶体管T0的热量损失，降低功耗。
进一步说明，驱动晶体管T0的电阻受到栅极和源极之间的电压差影响，电压差越大，电阻越小，电压差越小，电阻越大。流经驱动晶体管T0的电流受到漏极和源极之间的电压差影响，电压差越大，电流越大，电压差越小，电流越小。本申请的技术方案是通过调整漏极和源极之间的电压差，在电阻较低的情况下，实现了低灰阶显示。
为了能够实现第一电压和第二电压的有效切换，第一切换单元211包括第一控制开关T1和第一接电端2110，第一电压通过第一接电端2110输入至第一切换单元211，第一控制开关T1的第一端连接第一接电端2110，第二端连接电压输出端213，第一控制开关T1的控制端响应第一控制信号，以将第一接电端2110的第一电压提供至电压输出端213；在生成了高灰阶数据后，基于高灰阶数据生成第一控制信号，第一控制开关T1的控制端在接收到第一控制信号后，第一控制开关T1的第一端和第二端连通，第一电压由第一端输出至第二端，第二端连接电压输出端213。由此，第一电压通过电压输出端213输出至像素单元110的第一电源端112或第二电源端113。
第二切换单元212包括第二控制开关T2和第二接电端2120，第二控制开关T2的第一端连接第二接电端2120，第二端连接电压输出端213，第二控制开关T2的控制端响应第二控制信号，以将第二接电端2120的第二电压提供至电压输出端213。在生成了低灰阶数据后，基于低灰阶数据生成第二控制信号，第二控制开关T2的控制端在接收到第二控制信号后，第二控制开关T2的第一端和第二端连通，第二电压由第一端输出至第二端，第二端连接电压输出端213。由此，第二电压通过电压输出端213输出至像素单元110的第一电源端112或第二电源端113。其中，第一控制开关T1和第二控制开关T2为TFT，比如为N型TFT，在第一控制信号为高电平，第二控制信号为低电平时，第一控制开关T1导通。在第一控制信号为低电平，第二控制信号为高电平时，第二控制开关T2导通。
为了更进一步地，有效控制切换模块210工作，切换模块210还包括第一数据线214、第一扫描线215和第二扫描线216；第一数据线214竖直延伸，第一扫描线215和第二扫描线216水平延伸，第一扫描线215用于控制第一切换单元211，第二扫描线216用于控制第二切换单元212。
第一切换单元211还包括第三控制开关T3和第一电容C1，第三控制开关T3的控制端连接第一扫描线215，第一端连接第一数据线214，第二端连接第一电容C1的第一电极板，第一电容C1的第二电极板连接第一控制开关T1和第一接电端2110之间的线路，第一控制开关T1的控制端连接第三控制开关T3和第一电容C1之间的线路。
在高灰阶显示时，第一扫描线215传输高电平，第二扫描线216传输低电平。第三控制开关T3为N型TFT，第三控制开关T3的控制端接收到高电平信号后，第三控制开关T3的第一端和第二端导通。第一数据线214的信号传输第一控制信号到第 一控制开关T1，第一控制开关T1也导通，第一电压传输至电压输出端213。其中，通过第一电容C1的设置，可以通过第一数据线214向第一电容C1充电，第一电容C1能够存储电量，这样可以维持第一控制开关T1在一定的时间内是开启的，保证第一电压持续作用在驱动晶体管T0上，维持发光单元111的点亮状态。
第二切换单元212还包括第四控制开关T4和第二电容C2，第四控制开关T4的控制端连接第二扫描线216，第一端连接第一数据线214，第二端连接第二电容C2的第一电极板，第二电容C2的第二电极板连接第二控制开关T2和第二接电端2120之间的线路，第二控制开关T2的控制端连接第四控制开关T4和第二电容C2之间的线路。
在低灰阶显示时，第一扫描线215传输低电平，第二扫描线216传输高电平。第四控制开关T4为N型TFT，第四控制开关T4的控制端接收到高电平信号后，第四控制开关T4的第一端和第二端导通。第一数据线214的信号传输第二控制信号到第二控制开关T2，第二控制开关T2也导通，第二电压传输至电压输出端213。其中，通过第二电容C2的设置，可以通过第一数据线214向第二电容C2充电，第二电容C2能够存储电量，这样可以维持第二控制开关T2在一定的时间内是开启的，保证第二电压持续作用在驱动晶体管T0上，维持发光单元111的点亮状态。当然，控制开关也可以是P型TFT，响应于低电平开启导通。
其中，可知第一数据线214用于提供第一控制信号和第二控制信号，第一控制信号和第二控制信号为同一控制信号，均为高电平信号。
显示面板10包括透明基板，像素单元110设于透明基板的表面，像素单元110包括第二数据线114和第三扫描线115、以及响应开关T5和存储电容C，响应开关T5的控制端连接第三扫描线115，第一端连接第二数据线114，第二端连接存储电容C的第一电极，存储电容C的第二电极连接驱动晶体管T0和第一电源端112之间的线路，驱动晶体管T0的控制端连接响应开关T5和存储电容C之间的线路。
像素单元110进行正常显示时，第三扫描线115提供高电平信号，响应开关T5的控制端响应高电平信号，响应开关T5的第一端和第二端导通，第二数据线114提供高电平信号传输到驱动晶体管T0的控制端，驱动晶体管T0响应高电平信号，驱动晶体管T0的第一端和第二端导通，切换模块210输出的电压作用在驱动晶体管T0的第一端，继而使发光单元111点亮。并且，还通过第二数据线114向存储电容C充电，通过存储电容C维持驱动晶体管T0的开启，保证发光单元111在一定时间内亮起。
为了减少对光线的遮挡，第一数据线214位于第二数据线114在透明基板的正投影内，这样，即使增加了第一数据线214，也不会额外阻挡发光单元111发射的光线。并且，为了充分利用结构空间，简化结构布局。还可以是第一数据线214和第二数据线114为同一数据线。也就是说，控制切换模块210的数据信号和来自控制像素单元110的数据信号是同一个。像素单元110开启点亮，对应显示驱动架构20也要输出相应的电压，因此，两者可以同步接收数据信号。
另外，通过第一数据线214和第二数据线114的分开，也可以使切换模块210和像素单元110的控制更加灵活。
再者，为了进一步减少对光线的遮挡，第一扫描线215位于一条第三扫描线115在透明基板的正投影内，第二扫描线216位于另一条第三扫描线115在透明基板的正投影内；这样，显示驱动架构20的扫描线和数据线分别位于像素单元110的扫描线和数据线的正投影内，均不会对光线造成额外遮挡。
为了提高控制切换效率，显示面板10包括多个像素组，像素组包括至少两个像素单元110，同一像素组内的像素单元110均连接同一切换模块210的电压输出端213。也就是说，一个切换模块210可以同时控制两个像素单元110的亮度，从而提高控制效率。
当然，控制的像素单元110可以不止两个，比如，水平方向5个像素单元110，竖直方向3个像素单元110，一个像素组包括15个像素单元110。一个切换模块210同时控制15个像素单元110的电压大小。
参阅图6所示，显示驱动架构20还包括：时序控制模块220和驱动模块230。时序控制模块220连接驱动模块230，驱动模块230连接切换模块210。
时序控制模块220用于获取像素单元110的高灰阶数据或低灰阶数据，并依据高灰阶数据生成第一驱动指令，依据低灰阶数据生成第二驱动指令；对于像素单元110是显示高灰阶还是低灰阶，是通过信号源240输入的灰阶数据来控制的。信号源240将灰阶数据传输给时序控制模块220，灰阶数据中已经包括了高灰阶数据和低灰阶数据。时序控制模块220根据不同的数据内容生成对应的驱动指令。即，依据高灰阶数据生成第一驱动指令，依据低灰阶数据生成第二驱动指令。
驱动模块230连接时序控制模块220，驱动模块230接收第一驱动指令或第二驱动指令，并依据第一驱动指令控制切换模块210输出第一电压，依据第二驱动指令控制切换模块210输出第二电压。
具体地，驱动模块230可以理解为一个驱动芯片，驱动芯片接收到第一驱动指令后，向第一数据线214输出高电平，向第一扫描线215也输出高电平，向第二扫描线216输出低电平。通过第一扫描线215的高电平，第三控制开关T3导通，第一数据线214的高电平输出至第一控制开关T1的控制端，第一控制开关T1导通，第一电压输出至电压输出端213。
驱动芯片接收到第二驱动指令后，向第一数据线214输出高电平，向第一扫描线215输出低电平，向第二扫描线216输出高电平。通过第二扫描线216的高电平，第四控制开关T4导通，第一数据线214的高电平输出至第二控制开关T2的控制端，第二控制开关T2导通，第二电压输出至电压输出端213。
实施例二
参阅图3所示，本申请还提供一种显示驱动方法，显示驱动方法用于驱动显示面板10，显示面板10包括像素单元110，像素单元110包括驱动晶体管T0和发光单元111，驱动晶体管T0的第一端连接第一电源端112，驱动晶体管T0的第二端连接发光单元111的阳极，发光单元111的阴极连接第二电源端113，显示驱动方法包括：
步骤S10，获取像素单元110的灰阶数据，灰阶数据包括高灰阶数据和低灰阶数据；通过信号源240输入灰阶数据，识别出灰阶数据中的高灰阶数据和低灰阶数据。
步骤S20，基于高灰阶数据将第一电压输出到第一电源端112或第二电源端113，基于低灰阶数据将第二电压输出到第一电源端112或第二电源端113。
如果是高灰阶数据，时序控制模块220基于高灰阶数据生成第一驱动指令，并将第一驱动指令传输给驱动模块230，驱动模块230基于第一驱动指令，向第一数据线214输出高电平，向第一扫描线215也输出高电平，向第二扫描线216输出低电平。第四控制开关T4响应低电平断开。通过第一扫描线215的高电平，第三控制开关T3导通，第一数据线214的高电平输出至第一控制开关T1的控制端，第一控制开关T1导通，第一电压输出至电压输出端213。第一电压可以输出至第一电源端112，也可以输出至第二电源端113。也就是说，通过调节驱动晶体管T0的漏极电压可以达到调整漏极和源极之间电压差的效果。也可通过调节驱动晶体管T0的源极电压，也可以达到调整漏极和源极之间电压差的效果。
如果是低灰阶数据，时序控制模块220基于低灰阶数据生成第二驱动指令，并将第二驱动指令传输给驱动模块230，驱动模块230基于第二驱动指令，向第一数据线 214输出高电平，向第一扫描线215输出低电平，向第二扫描线216输出高电平。第三控制开关T3响应低电平断开。通过第二扫描线216的高电平，第四控制开关T4导通，第一数据线214的高电平输出至第二控制开关T2的控制端，第二控制开关T2导通，第二电压输出至电压输出端213。第二电压可以输出至第一电源端112，也可以输出至第二电源端113。
其中，在输出第二电压时，流经驱动晶体管T0电流与像素单元110的低灰阶数据相对应，驱动晶体管T0的电阻降低，以降低驱动晶体管T0的发热功耗。具体地，低灰阶显示对应的电流也较低，通过第二电压作用于漏极，漏极和源极之间的电压差减小，从而使电流减小。这样，流经发光单元111的电流较小，发光单元111亮度变低，从而完成低灰阶显示。此时，驱动晶体管T0的栅极电压维持较高数值，从而使栅极和源极之间的电压差维持较高差值，这样，驱动晶体管T0的开启程度依然较高，形成的沟道阻值较小。而流经驱动晶体管T0电流与像素单元110的低灰阶数据相对应，即保证发光单元111显示对应低灰阶的电流是固定的，在驱动晶体管T0的电阻降低的情况下，降低了驱动晶体管T0的发热功耗。
参阅图4所示，获取像素单元110的高灰阶数据或像素单元110的低灰阶数据的步骤，包括：
步骤S110，获取像素单元110的灰阶数据，将像素单元110的灰阶数据和预设灰阶进行对比；灰阶数据的范围在0～255之间，0代表纯黑，255代表纯白，两者之间的数据代表从纯黑到纯白的过渡。
步骤S120，在像素单元110的灰阶数据大于预设灰阶时，判断灰阶数据为高灰阶数据；获取到灰阶数据后，要识别判断灰阶数据是否属于高灰阶数据，比如预设灰阶为127。如果灰阶数据为200，200大于127，则判断灰阶数据为高灰阶数据。
步骤S130，在像素单元110的灰阶数据小于或等于预设灰阶时，判断灰阶数据为低灰阶数据。如果灰阶数据为120，120小于127，则判断灰阶数据为低灰阶数据。其中，预设灰阶数据可以调整，比如预设灰阶为120、150或者是200等。
参阅图5所示，显示面板10的部分像素单元110位置过亮或者过暗。为了减少这种情况，获取像素单元110的灰阶数据的步骤之后，包括：
步骤S210，对像素单元110的亮度进行扫描，获得像素单元110的显示灰阶，将灰阶数据和显示灰阶进行对比；灰机数据可以理解为提供给像素单元110的亮度指令，显示灰阶可以理解为像素单元110真实的亮度。将这两者进行对比，可以判断显示的 亮度是否符合提供的亮度指令。
步骤S220，在像素单元110的灰阶数据大于显示灰阶时，将第一电压提供至像素单元110；如果在像素单元110的灰阶数据大于显示灰阶，说明像素单元110的亮度过低，此时，将第一电压提供至像素单元110，提高像素单元110中发光单元111的亮度。
步骤S230，在像素单元110的灰阶数据小于或等于显示灰阶时，将第二电压提供至像素单元110。如果在像素单元110的灰阶数据小于或等于显示灰阶，说明像素单元110的亮度过高，此时，将第二电压提供至像素单元110，降低像素单元110中发光单元111的亮度。
另外，显示面板10存在烧屏情况，烧瓶情况就是显示面板10由于长期处于某一静止画面，就会加速像素单元110的损耗，屏幕亮度的衰减，如果切换画面，部分像素单元110位置会出现残影。通过在第一电压和第二电压之间的切换，能够减少像素单元110长期处于某一工作电压下，从而缓解烧屏情况，增加显示面板10的使用寿命。
实施例三
参阅图6所示，本申请还提供一种显示装置1，显示装置1包括显示面板10和如上文的显示驱动架构20，显示装置1还包括：电源模块30，电源模块30分别连接第一切换单元211和第二切换单元212，电源模块30用于向第一切换单元211提供第一电压，并向第二切换单元212提供第二电压。再通过第一切换单元211和第二切换单元212之间的切换工作，分别向电压输出端213提供第一电压或第二电压。
虽然已参照几个典型实施方式描述了本申请，但应当理解，所用的术语是说明和示例性、而非限制性的术语。由于本申请能够以多种形式具体实施而不脱离发明的精神或实质，所以应当理解，上述实施方式不限于任何前述的细节，而应在随附权利要求所限定的精神和范围内广泛地解释，因此落入权利要求或其等效范围内的全部变化和改型都应为随附权利要求所涵盖。

Claims (17)

  1. 一种显示驱动架构，所述显示驱动架构用于驱动显示面板，所述显示面板包括像素单元，所述像素单元包括驱动晶体管和发光单元，所述驱动晶体管的第一端连接第一电源端，所述驱动晶体管的第二端连接所述发光单元的阳极，所述发光单元的阴极连接第二电源端；
    其中，所述显示驱动架构包括：
    切换模块，所述切换模块包括第一切换单元、第二切换单元和电压输出端，所述第一切换单元和所述第二切换单元分别连接所述电压输出端，所述电压输出端连接所述第一电源端或所述第二电源端，所述第一切换单元用于输出第一电压，所述第二切换单元用于输出第二电压，所述切换模块基于所述像素单元的高灰阶数据将所述第一电压输出到所述电压输出端，或者所述切换模块基于所述像素单元的低灰阶数据将所述第二电压输出到所述电压输出端，所述第一电压大于所述第二电压；
    其中，所述切换模块在输出所述第二电压时，流经所述驱动晶体管电流与所述像素单元的低灰阶数据相对应，所述驱动晶体管的电阻降低，以降低所述驱动晶体管的发热功耗。
  2. 根据权利要求1所述的显示驱动架构，其中，所述第一切换单元包括第一控制开关和第一接电端，所述第一控制开关的第一端连接所述第一接电端，第二端连接所述电压输出端，所述第一控制开关的控制端响应第一控制信号，以将所述第一接电端的第一电压提供至所述电压输出端；
    所述第二切换单元包括第二控制开关和第二接电端，所述第二控制开关的第一端连接所述第二接电端，第二端连接所述电压输出端，所述第二控制开关的控制端响应第二控制信号，以将所述第二接电端的第二电压提供至所述电压输出端。
  3. 根据权利要求2所述的显示驱动架构，其中，所述切换模块还包括第一数据线、第一扫描线和第二扫描线；
    所述第一切换单元还包括第三控制开关和第一电容，所述第三控制开关的控制端连接所述第一扫描线，第一端连接所述第一数据线，第二端连接所述第一电容的第一电极板，所述第一电容的第二电极板连接所述第一控制开关和所述第一接电端之间的线路，所述第一控制开关的控制端连接所述第三控制开关和所述第一电容之间的线路；
    所述第二切换单元还包括第四控制开关和第二电容，所述第四控制开关的控制端连接所述第二扫描线，第一端连接所述第一数据线，第二端连接所述第二电容的第一电极板，所述第二电容的第二电极板连接所述第二控制开关和所述第二接电端之间的 线路，所述第二控制开关的控制端连接所述第四控制开关和所述第二电容之间的线路。
  4. 根据权利要求3所述的显示驱动架构，其中，所述显示面板包括透明基板，所述像素单元设于所述透明基板的表面，所述像素单元包括第二数据线和第三扫描线、以及响应开关和存储电容，所述响应开关的控制端连接所述第三扫描线，第一端连接所述第二数据线，第二端连接所述存储电容的第一电极，所述存储电容的第二电极连接所述驱动晶体管和所述第一电源端之间的线路，所述驱动晶体管的控制端连接所述响应开关和所述存储电容之间的线路；
    所述第一数据线位于所述第二数据线在所述透明基板的正投影内，或者，所述第一数据线和所述第二数据线为同一数据线。
  5. 根据权利要求2所述的显示驱动架构，其中，所述第一控制开关和所述第二控制开关为N型TFT。
  6. 根据权利要求1所述的显示驱动架构，其中，所述显示面板包括多个像素组，所述像素组包括至少两个所述像素单元，同一所述像素组内的像素单元均连接同一所述切换模块的电压输出端。
  7. 根据权利要求1中所述的显示驱动架构，其中，所述显示驱动架构还包括：
    时序控制模块，所述时序控制模块用于获取所述像素单元的高灰阶数据或低灰阶数据，并依据所述高灰阶数据生成第一驱动指令，依据所述低灰阶数据生成第二驱动指令；
    驱动模块，所述驱动模块连接所述时序控制模块，所述驱动模块接收所述第一驱动指令或所述第二驱动指令，并依据所述第一驱动指令控制所述切换模块输出所述第一电压，依据所述第二驱动指令控制所述切换模块输出所述第二电压。
  8. 一种显示驱动方法，所述显示驱动方法用于驱动显示面板，所述显示面板包括像素单元，所述像素单元包括驱动晶体管和发光单元，所述驱动晶体管的第一端连接第一电源端，所述驱动晶体管的第二端连接所述发光单元的阳极，所述发光单元的阴极连接第二电源端，其中，所述显示驱动方法包括：
    获取所述像素单元的灰阶数据，所述灰阶数据包括高灰阶数据和低灰阶数据；
    基于所述高灰阶数据将第一电压输出到所述第一电源端或所述第二电源端，或者基于所述低灰阶数据将第二电压输出到所述第一电源端或所述第二电源端；
    其中，在输出所述第二电压时，流经所述驱动晶体管电流与所述像素单元的低灰 阶数据相对应，所述驱动晶体管的电阻降低，以降低所述驱动晶体管的发热功耗。
  9. 根据权利要求8所述的显示驱动方法，其中，所述获取所述像素单元的高灰阶数据或所述像素单元的低灰阶数据的步骤，包括：
    获取所述像素单元的灰阶数据，将所述像素单元的灰阶数据和预设灰阶进行对比；
    在所述像素单元的灰阶数据大于所述预设灰阶时，判断所述灰阶数据为高灰阶数据；
    在所述像素单元的灰阶数据小于或等于所述预设灰阶时，判断所述灰阶数据为低灰阶数据。
  10. 根据权利要求8所述的显示驱动方法，其中，所述获取所述像素单元的灰阶数据的步骤之后，包括：
    对所述像素单元的亮度进行扫描，获得所述像素单元的显示灰阶，将所述灰阶数据和所述显示灰阶进行对比；
    在所述像素单元的灰阶数据大于所述显示灰阶时，将所述第一电压提供至所述像素单元；
    在所述像素单元的灰阶数据小于或等于所述显示灰阶时，将所述第二电压提供至所述像素单元。
  11. 一种显示装置，所述显示装置包括显示面板和显示驱动架构，所述显示驱动架构用于驱动显示面板，所述显示面板包括像素单元，所述像素单元包括驱动晶体管和发光单元，所述驱动晶体管的第一端连接第一电源端，所述驱动晶体管的第二端连接所述发光单元的阳极，所述发光单元的阴极连接第二电源端；所述显示驱动架构包括：切换模块，所述切换模块包括第一切换单元、第二切换单元和电压输出端，所述第一切换单元和所述第二切换单元分别连接所述电压输出端，所述电压输出端连接所述第一电源端或所述第二电源端，所述第一切换单元用于输出第一电压，所述第二切换单元用于输出第二电压，所述切换模块基于所述像素单元的高灰阶数据将所述第一电压输出到所述电压输出端，或者所述切换模块基于所述像素单元的低灰阶数据将所述第二电压输出到所述电压输出端，所述第一电压大于所述第二电压；
    其中，所述切换模块在输出所述第二电压时，流经所述驱动晶体管电流与所述像素单元的低灰阶数据相对应，所述驱动晶体管的电阻降低，以降低所述驱动晶体管的发热功耗；
    所述显示装置还包括：电源模块，所述电源模块分别连接所述第一切换单元和所述第二切换单元，所述电源模块用于向所述第一切换单元提供所述第一电压，并向所 述第二切换单元提供所述第二电压。
  12. 根据权利要求11所述的显示装置，其中，所述第一切换单元包括第一控制开关和第一接电端，所述第一控制开关的第一端连接所述第一接电端，第二端连接所述电压输出端，所述第一控制开关的控制端响应第一控制信号，以将所述第一接电端的第一电压提供至所述电压输出端；
    所述第二切换单元包括第二控制开关和第二接电端，所述第二控制开关的第一端连接所述第二接电端，第二端连接所述电压输出端，所述第二控制开关的控制端响应第二控制信号，以将所述第二接电端的第二电压提供至所述电压输出端。
  13. 根据权利要求12所述的显示装置，其中，所述切换模块还包括第一数据线、第一扫描线和第二扫描线；
    所述第一切换单元还包括第三控制开关和第一电容，所述第三控制开关的控制端连接所述第一扫描线，第一端连接所述第一数据线，第二端连接所述第一电容的第一电极板，所述第一电容的第二电极板连接所述第一控制开关和所述第一接电端之间的线路，所述第一控制开关的控制端连接所述第三控制开关和所述第一电容之间的线路；
    所述第二切换单元还包括第四控制开关和第二电容，所述第四控制开关的控制端连接所述第二扫描线，第一端连接所述第一数据线，第二端连接所述第二电容的第一电极板，所述第二电容的第二电极板连接所述第二控制开关和所述第二接电端之间的线路，所述第二控制开关的控制端连接所述第四控制开关和所述第二电容之间的线路。
  14. 根据权利要求13所述的显示装置，其中，所述显示面板包括透明基板，所述像素单元设于所述透明基板的表面，所述像素单元包括第二数据线和第三扫描线、以及响应开关和存储电容，所述响应开关的控制端连接所述第三扫描线，第一端连接所述第二数据线，第二端连接所述存储电容的第一电极，所述存储电容的第二电极连接所述驱动晶体管和所述第一电源端之间的线路，所述驱动晶体管的控制端连接所述响应开关和所述存储电容之间的线路；
    所述第一数据线位于所述第二数据线在所述透明基板的正投影内，或者，所述第一数据线和所述第二数据线为同一数据线。
  15. 根据权利要求12所述的显示装置，其中，所述第一控制开关和所述第二控制开关为N型TFT。
  16. 根据权利要求11所述的显示装置，其中，所述显示面板包括多个像素组，所述像素组包括至少两个所述像素单元，同一所述像素组内的像素单元均连接同一所述切换模块的电压输出端。
  17. 根据权利要求11中所述的显示装置，其中，所述显示装置还包括：
    时序控制模块，所述时序控制模块用于获取所述像素单元的高灰阶数据或低灰阶数据，并依据所述高灰阶数据生成第一驱动指令，依据所述低灰阶数据生成第二驱动指令；
    驱动模块，所述驱动模块连接所述时序控制模块，所述驱动模块接收所述第一驱动指令或所述第二驱动指令，并依据所述第一驱动指令控制所述切换模块输出所述第一电压，依据所述第二驱动指令控制所述切换模块输出所述第二电压。
PCT/CN2023/109282 2022-12-20 2023-07-26 显示驱动架构、显示驱动方法和显示装置 Ceased WO2024131062A1 (zh)

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Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115631725B (zh) * 2022-12-20 2023-03-03 惠科股份有限公司 显示驱动架构、显示驱动方法和显示装置
CN116052574B (zh) * 2023-01-28 2023-06-30 惠科股份有限公司 显示驱动结构、显示驱动方法和显示装置
CN116364014A (zh) * 2023-03-24 2023-06-30 上海天马微电子有限公司 显示模组和显示装置
CN116597776B (zh) * 2023-04-28 2024-04-26 惠科股份有限公司 像素架构、显示面板及其驱动方法、显示装置
CN117812936B (zh) * 2023-12-28 2024-10-11 惠科股份有限公司 有机发光显示面板及其驱动方法、显示装置

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150072593A (ko) * 2013-12-20 2015-06-30 엘지디스플레이 주식회사 유기 발광 표시 장치
US20170309228A1 (en) * 2016-04-22 2017-10-26 Nlt Technologies, Ltd. Display apparatus and display method
CN112017589A (zh) * 2020-09-08 2020-12-01 Tcl华星光电技术有限公司 多灰阶像素驱动电路及显示面板
US20210012709A1 (en) * 2017-10-30 2021-01-14 Boe Technology Group Co., Ltd. Pixel driving circuit, driving method thereof, and display device
CN112908267A (zh) * 2021-02-02 2021-06-04 成都京东方光电科技有限公司 像素电路及驱动方法、显示装置
CN114446223A (zh) * 2022-02-15 2022-05-06 上海天马微电子有限公司 显示面板及其驱动方法和显示装置
CN114792511A (zh) * 2021-01-26 2022-07-26 京东方科技集团股份有限公司 像素驱动电路、驱动控制方法和显示面板
CN114937435A (zh) * 2022-06-13 2022-08-23 京东方科技集团股份有限公司 像素驱动电路、驱动方法及显示面板
CN115631725A (zh) * 2022-12-20 2023-01-20 惠科股份有限公司 显示驱动架构、显示驱动方法和显示装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4623939B2 (ja) * 2003-05-16 2011-02-02 株式会社半導体エネルギー研究所 表示装置
JP2008145648A (ja) * 2006-12-08 2008-06-26 Sony Corp 表示装置とその駆動方法
JP2010145446A (ja) * 2008-12-16 2010-07-01 Sony Corp 表示装置、表示装置の駆動方法および電子機器
KR101957152B1 (ko) * 2012-05-02 2019-06-19 엘지디스플레이 주식회사 유기전계 발광소자 표시장치, 이의 구동회로 및 방법
CN106652920A (zh) * 2016-12-23 2017-05-10 青岛海信电器股份有限公司 背光控制信号生成电路、方法及液晶显示设备
US11132958B2 (en) * 2018-01-25 2021-09-28 Samsung Electronics Co., Ltd. Display apparatus and control method thereof
CN108717841B (zh) * 2018-05-29 2020-07-28 京东方科技集团股份有限公司 像素驱动电路、像素驱动方法、oled显示面板及其驱动电路和驱动方法
CN109300436B (zh) * 2018-09-27 2020-04-03 深圳市华星光电半导体显示技术有限公司 Amoled像素驱动电路及驱动方法
CN110299107B (zh) * 2019-06-28 2021-01-29 上海天马有机发光显示技术有限公司 一种有机发光显示面板及有机发光显示装置
TWI697884B (zh) * 2019-08-20 2020-07-01 友達光電股份有限公司 畫素電路
CN214175661U (zh) * 2021-01-14 2021-09-10 昆山龙腾光电股份有限公司 液晶显示装置的供电电路及液晶显示装置
CN114708819B (zh) * 2022-03-23 2025-11-11 上海天马微电子有限公司 一种驱动电路、发光面板以及显示装置
CN114627837B (zh) * 2022-05-13 2022-09-02 惠科股份有限公司 显示装置的驱动方法和显示装置

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150072593A (ko) * 2013-12-20 2015-06-30 엘지디스플레이 주식회사 유기 발광 표시 장치
US20170309228A1 (en) * 2016-04-22 2017-10-26 Nlt Technologies, Ltd. Display apparatus and display method
US20210012709A1 (en) * 2017-10-30 2021-01-14 Boe Technology Group Co., Ltd. Pixel driving circuit, driving method thereof, and display device
CN112017589A (zh) * 2020-09-08 2020-12-01 Tcl华星光电技术有限公司 多灰阶像素驱动电路及显示面板
CN114792511A (zh) * 2021-01-26 2022-07-26 京东方科技集团股份有限公司 像素驱动电路、驱动控制方法和显示面板
CN112908267A (zh) * 2021-02-02 2021-06-04 成都京东方光电科技有限公司 像素电路及驱动方法、显示装置
CN114446223A (zh) * 2022-02-15 2022-05-06 上海天马微电子有限公司 显示面板及其驱动方法和显示装置
CN114937435A (zh) * 2022-06-13 2022-08-23 京东方科技集团股份有限公司 像素驱动电路、驱动方法及显示面板
CN115631725A (zh) * 2022-12-20 2023-01-20 惠科股份有限公司 显示驱动架构、显示驱动方法和显示装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP4641552A4 *

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