WO2024134858A1 - 電力変換装置 - Google Patents
電力変換装置 Download PDFInfo
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- WO2024134858A1 WO2024134858A1 PCT/JP2022/047521 JP2022047521W WO2024134858A1 WO 2024134858 A1 WO2024134858 A1 WO 2024134858A1 JP 2022047521 W JP2022047521 W JP 2022047521W WO 2024134858 A1 WO2024134858 A1 WO 2024134858A1
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- arm
- value
- voltage command
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- voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4835—Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
- H02M1/0025—Arrangements for modifying reference values, feedback values or error values in the control loop of a converter
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from AC input or output
- H02M1/123—Suppression of common mode voltage or current
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
- H02M1/325—Means for protecting converters other than automatic disconnection with means for allowing continuous operation despite a fault, i.e. fault tolerant converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
- H02M7/4833—Capacitor voltage balancing
Definitions
- This application relates to a power conversion device.
- multilevel converters that are configured by connecting multiple converter cells in series, each of which has an energy storage element, in power conversion devices used in high-voltage applications such as power systems.
- These converters are called modular multilevel converters (MMC) or cascaded multilevel converters (CMC), and are used to convert three-phase AC to DC or vice versa.
- MMC modular multilevel converters
- CMC cascaded multilevel converters
- a power conversion device that has a capacitor as an energy storage element, it is possible to suppress voltage fluctuations.
- the capacitance of the capacitor is small, there is a risk that the voltage applied to the switching elements that make up the converter cell will exceed the withstand voltage of the switching elements. Therefore, if the capacitance of the capacitor is increased or the withstand voltage of the switching elements is increased, the cost of the power conversion device will increase or the size will increase.
- Patent Document 1 discloses a method for adjusting the circulating current flowing through the arm units that make up the power conversion device, thereby making the average value of the capacitor voltage in each arm unit constant and suppressing the fluctuation range.
- Patent Document 2 The applicant also discloses in Patent Document 2 that the arm voltage command value is corrected using the zero-phase voltage command value so that the arm output voltage range is not exceeded.
- This application discloses technology to solve the above problems, and aims to provide a power conversion device that can quickly balance the imbalance in the capacitor voltages between the arms.
- the power conversion device disclosed in the present application is A power converter including: a power converter in which a plurality of leg circuits, each having a positive arm and a negative arm connected in series, are connected in parallel, and connection points between the positive arm and the negative arm of the plurality of leg circuits are connected to AC lines of each phase, thereby performing power conversion between AC and DC of multiple phases; and a control device that controls the power converter, each of the positive side arm and the negative side arm includes one or more converter cells connected in series, the converter cells including a series body in which a plurality of semiconductor switching elements are connected in series and a DC capacitor connected in parallel to the series body;
- the control device has an arm output voltage command value generating unit that generates arm output voltage command values that are command values of voltages output by the multiple arms, performing circulating current control for each of the leg circuits; when a total value of voltages of all of the DC capacitors included in at least one of the leg circuits is equal to or greater than a predetermined first threshold, a voltage command correction value is generated to
- the power conversion device disclosed herein makes it possible to quickly balance the imbalance in the capacitor voltages between the arms.
- FIG. 1 is a schematic diagram showing a configuration of a power conversion device according to a first embodiment
- 1 is a configuration diagram showing an example of a converter cell constituting a power conversion device according to a first embodiment
- 4 is a configuration diagram showing another example of a converter cell constituting the power conversion device according to the first embodiment.
- FIG. 4 is a configuration diagram showing another example of a converter cell constituting the power conversion device according to the first embodiment.
- FIG. 1 is a functional block diagram showing a configuration of a control device according to a first embodiment.
- FIG. 13 is a diagram showing a state in which a generated modulation signal is input to a gate signal generating unit.
- FIG. 2 is a functional block diagram showing a configuration of a command generating unit of the control device according to the first embodiment.
- FIG. 4 is a diagram illustrating a configuration of a voltage command value correction unit according to the first embodiment.
- FIG. FIG. 4 is a diagram showing a configuration of a correction voltage calculation unit according to the first embodiment; 4A to 4C are diagrams for explaining the effects of the power conversion device according to the first embodiment.
- FIG. 8B is an enlarged view of the areas indicated by dashed lines A and B in FIG. 8A.
- FIG. 11 is a functional block diagram showing a configuration of a command generating unit of a control device according to a second embodiment.
- FIG. 11 is a diagram illustrating a configuration of a voltage command value correction unit according to a second embodiment.
- FIG. 11 is a diagram showing a configuration of a correction voltage calculation unit according to a second embodiment.
- FIG. 10 is a diagram for explaining a correction margin of a correctable voltage calculated by a correction voltage calculation unit;
- FIG. 11 is a diagram showing a configuration of a corrected zero-phase voltage calculation unit according to the second embodiment.
- FIG. 2 is a hardware configuration diagram illustrating an example of a control device according to the first and second embodiments.
- Fig. 1 is a diagram showing a schematic configuration of an example of a power system to which a power conversion device 1 according to a first embodiment is applied.
- the power conversion device 1 includes a power converter 10 which is a main circuit, and a control device 20 which serves as a control unit for controlling the power converter 10.
- the power converter 10 converts power between AC and DC, and its AC side is connected to an AC power source 2 which is a three-phase AC system as a multi-phase AC power source via a transformer 3, and its DC side is connected to a DC system (not shown) via a positive DC terminal 6P and a negative DC terminal 6N.
- the DC system is, for example, a DC power source such as a large-scale solar power generation system or an industrial UPS (Uninterruptible Power Supply), or another power converter.
- the power converter 10 has three leg circuits 100u, 100v, 100w, which correspond to the U-phase, V-phase, and W-phase of the three-phase AC, connected in parallel between the positive DC terminal 6P and the negative DC terminal 6N.
- the leg circuit 100u has a pair of arms, a positive arm 100uP and a negative arm 100uN, which are connected in series with each other.
- One end of the positive arm 100uP is connected to the positive DC terminal 6P, and one end of the negative arm 100uN is connected to the negative DC terminal 6N.
- the connection point 4u between the positive arm 100uP and the negative arm 100uN is connected to the U-phase terminal of the transformer 3.
- the leg circuit 100v has a pair of arms, a positive arm 100vP and a negative arm 100vN, which are connected in series with each other.
- One end of the positive arm 100vP is connected to the positive DC terminal 6P, and one end of the negative arm 100vN is connected to the negative DC terminal 6N.
- the connection point 4v between the positive arm 100vP and the negative arm 100vN is connected to the V-phase terminal of the transformer 3.
- the leg circuit 100w has a pair of arms, a positive arm 100wP and a negative arm 100wN, which are connected in series with each other. One end of the positive arm 100wP is connected to the positive DC terminal 6P, and one end of the negative arm 100wN is connected to the negative DC terminal 6N. In addition, the connection point 4w between the positive arm 100wP and the negative arm 100wN is connected to the W-phase terminal of the transformer 3.
- each of the leg circuits 100u, 100v, and 100w will be described below. Since the V-phase and W-phase leg circuits 100v and 100w have the same configuration as the U-phase leg circuit 100u, the U-phase leg circuit 100u will be used as a representative example.
- the positive arm 100uP of the leg circuit 100u has a plurality of converter cells 111 and a reactor 112uP connected in series, and is configured by connecting these plurality of converter cells 111 and the reactor 112uP in series with each other.
- the negative arm 100uN of the leg circuit 100u has a plurality of converter cells 111 and a reactor 112uN connected in series, and is configured by connecting these converter cells 111 and the reactor 112uN in series with each other. Note that each arm may have only one converter cell 111.
- the reactor 112uP may be located anywhere within the positive arm 100uP, and similarly, the reactor 112uN may be located anywhere within the negative arm 100uN.
- the inductance values of the reactors 112uP and 112uN may be different from each other, or may be coupled with a reactor of another phase.
- the reactor 112uP may be provided only in the positive arm 100uP, or the reactor 112uN may be provided only in the negative arm 100uN.
- arm 100 when there is no need to distinguish between the positive arms 100uP, 100vP, 100wP and the negative arms 100uN, 100vN, 100wN, they will be referred to as arm 100, or positive arm 100P and negative arm 100N.
- Fig. 2A is a circuit diagram showing an example of the configuration of the converter cell 111 according to the first embodiment.
- Fig. 2B is a circuit diagram showing an example of the configuration of the converter cell 111 according to the first embodiment, which is different from that of Fig. 2A.
- Fig. 2C is a circuit diagram showing an example of the configuration of the converter cell 111 according to the first embodiment, which is different from that of Fig. 2A and Fig. 2B.
- the converter cell 111 may use any of the circuit configurations shown in FIGS. 2A to 2C, and each circuit configuration may be combined in the positive arm 100uP and the negative arm 100uN.
- the converter cell 111 shown in FIG. 2A has a series body of semiconductor switching elements 111U and 111L connected in series with each other, a DC capacitor 111C connected in parallel to the series body as an energy storage element, and a voltage sensor 111S that detects the voltage Vcap of the DC capacitor 111C.
- the connection point between the semiconductor switching elements 111U and 111L is connected to the positive input/output terminal 111a, and the connection point between the semiconductor switching element 111L and the DC capacitor 111C is connected to the negative input/output terminal 111b.
- the semiconductor switching elements 111U and 111L are controlled by gate signals GU and GL so that one is turned on and the other is turned off.
- the semiconductor switching element 111U is on and the semiconductor switching element 111L is off, the voltage across the DC capacitor 111C is applied between the input/output terminals 111a and 111b.
- a positive voltage is applied to the input/output terminal 111a, and a negative voltage is applied to the input/output terminal 111b.
- the converter cell 111 shown in FIG. 2B has a series body of semiconductor switching elements 111U and 111L connected in series with each other, a DC capacitor 111C connected in parallel to the series body as an energy storage element, and a voltage sensor 111S that detects the voltage value Vcap of the DC capacitor 111C.
- the connection point between the semiconductor switching elements 111U and 111L is connected to the negative input/output terminal 111b, and the connection point between the semiconductor switching element 111U and the DC capacitor 111C is connected to the positive input/output terminal 111a.
- the semiconductor switching elements 111U and 111L are controlled by gate signals GU and GL so that one is turned on and the other is turned off.
- the semiconductor switching element 111U is in the off state and the semiconductor switching element 111L is in the on state
- the voltage across the DC capacitor 111C is applied between the input/output terminals 111a and 111b.
- a positive voltage is applied to the input/output terminal 111a, and a negative voltage is applied to the input/output terminal 111b.
- the converter cell 111 shown in FIG. 2C has a series body of semiconductor switching elements 111U1 and 111L1 connected in series with each other, a series body of semiconductor switching elements 111U2 and 111L2 connected in series with each other, a DC capacitor 111C as an energy storage element, and a voltage sensor 111S that detects the voltage Vcap of the DC capacitor 111C.
- the series body of semiconductor switching elements 111U1 and 111L1, the series body of semiconductor switching elements 111U2 and 111L2, and the DC capacitor 111C are connected in parallel.
- the semiconductor switching elements 111U1 and 111L1 are controlled by gate signals GU1 and GL1 so that one is on and the other is off.
- the semiconductor switching elements 111U2 and 111L2 are controlled by gate signals GU2 and GL2 so that one is on and the other is off.
- the power conversion device 1 includes a plurality of detectors for detecting the voltage and current of the power converter 10 in addition to the voltage sensor 111S for detecting the DC capacitor voltage Vcap. 1, values detected by these detectors are input to the control device 20. That is, the phase voltages Vacu, Vacv, Vacw at the AC end of the power converter 10, the currents Iacu, Iacv, Iacw at the AC end, the DC voltage Vdc between the positive side DC terminal 6P and the negative side DC terminal 6N, the DC current Idc flowing through the positive side DC terminal 6P or the negative side DC terminal 6N, the currents IuP, IvP, IwP flowing through the positive side arms 100uP, 100vP, 100wP, the currents IuN, IvN, IwN flowing through the negative side arms 100uN, 100vN, 100wN, and the voltage Vcap of the DC capacitor 111C are input to the control device 20.
- the control device 20 generates gate signals GU, GL that drive the respective semiconductor switching elements 111U, 111L in the respective converter cells 111 of the power converter 10, based on the detection values detected by each detector.
- FIG. 3 is a functional block diagram showing the configuration of the main parts of the control device 20 according to the first embodiment.
- the control device 20 includes a DC control unit 21, an AC current control unit 22, a circulating current control unit 23, a command value generation unit 24, and an arm capacitor voltage average value calculation unit 25.
- the DC control unit 21 receives the DC voltage Vdc between the positive DC terminal 6P and the negative DC terminal 6N of the power converter 10, and the DC current Idc flowing through the positive DC terminal 6P or the negative DC terminal 6N. It also receives the DC voltage command value Vdcref and the DC current command value Idcref. The DC control unit 21 outputs an arm DC component voltage command value VarmDC such that the DC voltage Vdc follows the DC voltage command value Vdcref, or the DC current Idc follows the DC current command value Idcref.
- the AC current control unit 22 receives the AC current Iac at the AC end of the power converter 10 (when the AC end currents Iacu, Iacv, and Iacw are collectively referred to as AC current Iac) and the AC voltage command value Iacref that controls the AC voltage of each phase (the AC voltage command value Iacref is used as a collective term for the AC voltage command values of the U phase, V phase, and W phase).
- the AC current control unit 22 outputs an arm AC component voltage command value VarmAC such that the AC current Iac follows the AC current command value Iacref.
- the circulating current control unit 23 outputs an arm circulating voltage command value Varmcc for controlling the circulating current Icc to follow the circulating current command value Iccref for balancing the voltage of the DC capacitor 111C included in each arm 100 between the arms 100.
- the circulating current Icc does not flow through the AC end or DC end in the power converter 10, but indicates the current that flows between the phase leg circuits 100u, 100v, and 100w.
- the arm capacitor voltage average value calculation unit 25 calculates the average value of the voltage of the DC capacitor in each arm.
- the arm capacitor total values Vcpu, Vcnu, Vcpv, Vcnv, Vcpw, and Vcnw which are the sum of the voltages Vcap of the DC capacitors 111C in the converter cells 111 in each arm, are input to the arm capacitor voltage average value calculation unit 25, and the arm capacitor voltage average values Vcarmpu, Vcarmnu, Vcarmpv, Vcarmnv, Vcarmpw, and Vcarmnw, which are values divided by the number N of converter cells in each arm (N is an integer of 1 or more), are output.
- N is an integer of 1 or more
- the command value generating unit 24 receives the arm DC component voltage command value VarmDC from the DC control unit 21, the arm AC component voltage command value VarmAC from the AC current control unit 22, the arm circulating voltage command value Varmcc from the circulating current control unit 23, and the average capacitor voltage Vcarm of each arm from the arm capacitor voltage average value calculation unit 25.
- the command value generating unit 24 outputs a modulation command kref for each arm (the arm modulation command kref is used as a general term for the modulation commands krefpu, krenu, krefpv, krefnv, krefpw, and krenw for each arm).
- FIG. 4 is a diagram showing the state in which the modulation command kref for each arm generated and output by the command value generation unit 24 is input to the gate signal generation unit 26.
- the modulation command kref for each arm is input to the gate signal generation unit 26, and generates gate signals G (G1U, G1L, G2U, G2L, G3U, G3L, etc.) that drive the semiconductor switching elements 111U, 111L included in all converter cells 111 of the corresponding arm 100.
- the gate signal generation unit 26 obtains the gate signal G, for example, by a pulse width modulation (PWM) method that compares the magnitude of the input modulation command kref for the arm with that of a carrier wave.
- PWM pulse width modulation
- each gate signal generating unit 26 may be provided in the control device 20 as a stage subsequent to the command value generating unit 24, but each gate signal generating unit 26 may also be configured to be included in each converter cell 111.
- Fig. 5 is a functional block diagram showing a configuration of the command generating unit 24.
- the command generating unit 24 includes an arm output voltage command value generating unit 244, a voltage command value correcting unit 240, and a normalizing unit 246.
- the arm DC voltage command value VarmDC, the arm AC voltage command value VarmAC, and the arm circulating voltage command value Varmcc are input to the arm output voltage command value generator 244, which calculates the voltages output by each arm and outputs them as arm output voltage command values Varmpu, Varmnu, Varmpv, Varmnv, Varmpw, and Varmnw.
- Fig. 6 is a diagram showing the configuration of a voltage command value correction unit 240 included in the command generating unit 24. As shown in Fig. 6, the voltage command value correction unit 240 includes a correction voltage calculation unit 241.
- Fig. 7 is a diagram showing the configuration of the correction voltage calculation unit 241. Figs. 6 and 7 will be explained using U-phase voltage command value correction unit 240U as an example of the voltage command value correction unit.
- the positive arm output voltage command value Varmpu, the negative arm output voltage command value Varmnu, the sum of capacitor voltages in the positive arm Vcpu, the sum of capacitor voltages in the negative arm Vcnu, and a determination signal CCprModeU indicating whether the power converter 10 is in circulating current priority mode are input to the correction voltage calculation unit 241U of the U-phase voltage command value correction unit 240U.
- adders 2411p, 2413p, 2415p, 2416p, 2417, 2411n, 2413n, 2415n, and 2416n add and output the input signals
- filters 2412p, 2414p, 2412n, and 2414n each output 0 when the input signal is 0 or less, and output the value when the input signal is greater than 0.
- Multiplier 2418 receives an input of 1 for CCprModeU when power converter 10 is in the circulating current priority mode, and receives an input of 0 for CCprModeU when power converter 10 is not in the circulating current priority mode.
- the circulating current priority mode is a mode in which, when the total value of all capacitor voltages included in one leg circuit becomes equal to or exceeds a preset threshold value ( ⁇ 1) and the arm included in the leg circuit becomes overmodulated, the output voltage of the arm is corrected to give priority to the output of the circulating current control.
- the arm capacitor voltage average values Vcarmpu and Vcarmnu are input to the U-phase voltage command value correction unit 240U. That is, the positive arm capacitor voltage total value Vcpu and the negative arm capacitor voltage total value Vcnu are input.
- the output of the circulating current priority mode determination signal CCprModeU is set to 0. In this way, it is determined whether the circulating current priority mode is active, and the circulating current priority mode determination signal CCprModeU is output.
- the arm output voltage command value generator 244 When the circulating current priority mode determination signal CCprModeU is 0, in FIG. 5, the arm output voltage command value generator 244 generates the arm output voltage command value Varm without considering the arm circulating voltage command value Varmcc.
- the threshold value ( ⁇ 1) should be set to a value equal to or greater than 1/2 of the DC voltage Vdc between the positive DC terminal 6P and the negative DC terminal 6N of the power converter 10.
- the operation of the correction voltage calculation unit 241U will be described for the following five cases.
- adder 2416p In the positive arm, in the case of overmodulation in which the positive arm output voltage command value Varmpu is greater than the total capacitor voltage value Vcpu in the positive arm (Vcpu ⁇ Varmpu), adder 2416p outputs positive arm output voltage command correction value ⁇ Varmpu ( ⁇ 0). At this time, if the total capacitor voltage value (Vcpu+Vcnu) in U-phase leg circuit 100u is greater than a preset threshold value ⁇ 1, 1 is input to multiplier 2418 as a CCprModeU signal, and voltage command correction value ⁇ Varmu is output.
- the correction voltage calculation unit 241 if the arm output voltage command value on one side of the corresponding phase exceeds the arm capacitor voltage total value on that side, and if the arm output voltage command value is less than 0 V, a correction voltage is output in the circulating current priority mode.
- the voltage command correction value ⁇ Varmpu output from the correction voltage calculation unit 241 is subtracted from the positive arm output voltage command value Varmpu to output the corrected positive arm output voltage command value Varmpu*. Also, the voltage command correction value ⁇ Varmpu is added to the negative arm output voltage command value Varmnu to output the corrected negative arm output voltage command value Varmnu*.
- the corrected arm output voltage command values Varmpu*, Varmnu*, Varmpv*, Varmnv*, Varmpw*, and Varmnw* (when collectively referred to, the arm output voltage command value Varm*) for each phase output from the voltage command value correction unit 240 are input to the normalization unit 246.
- the normalization unit 246 normalizes the corrected output voltage command value for each arm output from the voltage command value correction unit 240 based on the total capacitor voltage value for each arm, and outputs the modulation command kref for each arm.
- Fig. 8A is a diagram for explaining the effect of the power conversion device according to the first embodiment
- Fig. 8B is an enlarged view of the area surrounded by dotted lines A and B in Fig. 8A.
- Figure 8A shows the behavior of the positive arm capacitor voltage sum Vcpu, positive arm output voltage command value Varmpu, negative arm capacitor voltage sum Vcnu, and negative arm output voltage command value Varmnu in the U-phase leg circuit 100u.
- An accident occurs at time t0, and an overmodulation state occurs immediately thereafter.
- the negative arm the negative arm output voltage command value Varmnu increases and exceeds the negative arm capacitor voltage sum Vcnu. This period is shown by the area of dotted line A in the figure.
- the positive arm even if the positive arm output voltage command value Varmpu oscillates, it will not exceed the positive arm capacitor voltage sum Vcpu.
- the area of the positive arm at the same time corresponding to the area of dotted line A in the negative arm is shown by dotted line B.
- the U-phase leg circuit 100u is in circulating current priority mode.
- the upper threshold of the positive arm output voltage command value Varmpu is the sum of the capacitor voltages in the positive arm Vcpu
- the upper threshold of the negative arm output voltage command value Varmnu is the sum of the capacitor voltages in the negative arm Vcnu.
- the lower thresholds are both 0V.
- the negative arm output voltage command value Varmnu exceeds the sum of the capacitor voltages in the negative arm Vcnu in the region of dotted line A.
- the negative arm output voltage command value Varmnu that exceeds this sum of the capacitor voltages in the negative arm Vcnu is shown by a dashed line.
- the negative arm output voltage command value Varmnu is corrected by the voltage command correction value ⁇ Varmu so that it falls within a range that does not exceed the sum of the capacitor voltages in the negative arm Vcnu.
- the corrected negative arm output voltage command value Varmnu* is equal to the sum of the capacitor voltages in the negative arm Vcnu.
- the corresponding positive arm is corrected by the voltage command correction value ⁇ Varmu so that the positive and negative capacitor voltages are balanced and the total output voltage value in leg circuit 100u is equal before and after correction. Therefore, within the area of dotted line B, the positive arm output voltage command value Varmpu shown by the dashed line becomes the corrected positive arm output voltage command value Varmpu* shown by the solid line.
- a correction voltage is used to make the output voltage of the arm that is overmodulated equal to the output range, which is the sum of the capacitor voltages, and the output voltage of the other arm is also corrected, so that the total output voltage of the two arms in one leg circuit does not change before and after correction. This makes it possible to control the desired circulating current even during overmodulation.
- a power conversion device includes a power converter in which multiple leg circuits, each having a positive arm and a negative arm connected in series, are connected in parallel, and the connection points between the positive and negative arms of the multiple leg circuits are connected to the AC lines of each phase to perform power conversion between multiple phases of AC and DC, and a control device that controls the power converter, and each arm is configured by connecting in series converter cells each having a series body in which multiple semiconductor switching elements are connected in series and a DC capacitor connected in parallel to the series body.
- the control device has an arm output voltage command value generating unit that generates an arm output voltage command value, which is a command value for the voltage output by the multiple arms, and performs circulating current control for each leg circuit.
- a correction voltage is generated to correct the arm output voltage command value of one arm in the leg circuit so that the arm output voltage command value is equal to or less than the preset upper threshold when it exceeds a preset upper threshold, and is equal to or greater than the lower threshold when it falls below a lower threshold, and the arm output voltage command value of the other arm is also corrected based on the correction voltage.
- the output voltage command values of both arms are corrected with the correction voltage, so that the total value of the output voltages can be equalized, and circulating current control is facilitated. Therefore, the capacitor voltages can be quickly balanced in response to an arm-to-arm capacitor voltage imbalance during an accident or immediately after recovery from the accident.
- the circulating current priority mode is set up so that the output voltage of the overmodulated arm is corrected to prioritize the circulating current control output.
- the first threshold value is set to 1/2 or more of the DC voltage of the power converter, the output voltage of the arm can be corrected to prioritize the circulating current control output only when necessary in response to the capacitor voltage imbalance between the arms.
- the possible output range of the arm output voltage is from 0V to the total value of the capacitor voltage of that arm, so if the upper threshold for overmodulation is set to the total value of the capacitor voltage of that arm and the upper threshold is set to 0V, it is possible to maximize the range of the arm output voltage.
- Embodiment 2 The power conversion device according to the second embodiment will be described below with reference to the drawings.
- the power conversion device according to the second embodiment includes the control device 20 similar to that in Fig. 3, but the configuration of the command generating unit 24 is different from that in the first embodiment.
- the following description will focus on the differences from the first embodiment, and a description of the corresponding parts will be omitted.
- FIG. 9 is a functional block diagram showing the configuration of the command generating unit 24 included in the control device 20 according to the second embodiment.
- the command generating unit 24 includes an arm output voltage command value generating unit 244, a voltage command value correcting unit 1240, and a standardizing unit 246.
- the arm output voltage command value generating unit 244 and the standardizing unit 246 are the same as those shown in FIG. 5 of the first embodiment.
- FIG. 10 is a diagram showing the configuration of the voltage command value correction unit 1240.
- the voltage command value correction unit 1240 includes correction voltage calculation units 1241 for each phase, that is, a U-phase correction voltage calculation unit 1241U, a V-phase correction voltage calculation unit 1241V, and a W-phase correction voltage calculation unit 1241W, as well as a correction zero-phase voltage calculation unit 1242 and various computing units.
- FIG. 11 is a diagram showing the configuration of the correction voltage calculation units 1241 for each phase
- FIG. 13 is a diagram showing the configuration of the correction zero-phase voltage calculation unit 1242. Note that the correction voltage calculation unit 1241 is used as a general term for the U-phase correction voltage calculation unit 1241U, the V-phase correction voltage calculation unit 1241V, and the W-phase correction voltage calculation unit 1241W.
- the correction voltage calculation unit 1241 in FIG. 11 is assumed to be the U-phase correction voltage calculation unit 1241U, and the description will be given using a U-phase signal. Note that the correction voltage calculation unit 1241 in FIG. 11 has a similar configuration to the correction voltage calculation unit 241 for each phase shown in FIG. 7 of the first embodiment, and although the input signals are the same, the output signals are partially different.
- the U-phase correction voltage calculation unit 241U receives as input the positive arm output voltage command value Varmpu, the negative arm output voltage command value Varmnu, the positive arm capacitor voltage sum Vcpu, the negative arm capacitor voltage sum Vcnu, and a judgment signal CCprModeU indicating whether the power converter 10 is in the circulating current priority mode.
- the judgment signal CCprModeU is input, but as explained in FIG. 6 of the first embodiment, the sum Vcu of the positive arm capacitor voltage sum Vcpu and the negative arm capacitor voltage sum Vcnu is compared with a threshold value ( ⁇ 1) to generate the judgment signal CCprModeU.
- the generation of the judgment signal CCprModeU is omitted.
- adders 2411p, 2413p, 2416p, 2417, 2411n, 2413n, 2415n, and 2416n output the difference between the input signals
- filters 2412p, 2414p, 2412n, and 2414n output 0 when the input signal is 0 or less, and output the value when the input signal is greater than 0.
- Multiplier 2418 receives an input of 1 when the power converter 10 is in circulating current priority mode, and a value of 0 when the power converter 10 is not in circulating current priority mode.
- the circulating current priority mode is a mode in which the circulating current is controlled to follow the circulating current command value when the total value of all capacitor voltages included in one leg circuit becomes equal to or greater than a preset threshold value, thereby balancing the output voltages of the positive and negative arms in the leg circuit.
- the correction voltage calculation unit 1241 if the arm output voltage command value on one side of the corresponding phase exceeds the arm capacitor voltage total value on that side or if the arm output voltage command value is less than 0 V, the correction voltage calculation unit 1241 outputs a voltage command correction value ⁇ Varm if the circulating current priority mode is selected.
- FIG. 12 is a diagram for explaining the voltage correction tolerance, showing the behavior of the positive arm output voltage command value Varmpu of the U phase.
- ⁇ Upu is the positive arm upper correction tolerance of the U phase, and is the value obtained by subtracting the positive arm output voltage command value Varmpu from the capacitor voltage sum value Vcpu in the positive arm.
- ⁇ Lpu is the positive arm lower correction tolerance of the U phase, and is the value of the positive arm output voltage command value Varmpu.
- the U-phase negative arm upper correction tolerance ⁇ Unu and the U-phase negative arm lower correction tolerance ⁇ Lnu are also calculated.
- a V-phase correction voltage calculation unit 1241V and a W-phase correction voltage calculation unit 1241W output a voltage command correction value ⁇ Varmv and correction tolerances ⁇ Upv, ⁇ Lpv, ⁇ Unv, and ⁇ Lnv, a voltage command correction value ⁇ Varmw and correction tolerances ⁇ Upw, ⁇ Lpw, ⁇ Unw, and ⁇ Lnw, respectively.
- the correction zero-phase voltage calculation unit 1242 will be described with reference to FIG. 13.
- the correction voltage and correction margin of each phase which are the output of the correction voltage calculation unit 1241 of each phase, are input to the correction zero-phase voltage calculation unit 1242, and the correction zero-phase voltage ⁇ Vz is output.
- the correction is performed using the correction zero-phase voltage ⁇ Vz.
- the correction zero-phase voltage ⁇ Vz is used for correction in both arms, and if the correction zero-phase voltage ⁇ Vz is large, there is a possibility that overmodulation of other arms in which overmodulation does not occur is caused.
- a limit value of the correction zero-phase voltage ⁇ Vz is set from the correction margin of the correction voltage of each arm, and the correction zero-phase voltage ⁇ Vz is calculated.
- Filter 2421 detects the maximum value from the voltage command correction values ⁇ Varmu, ⁇ Varmv, ⁇ Varmw of each phase input to the corrected zero-phase voltage calculation unit 1242, and filter 2422 detects the minimum value.
- the detected maximum and minimum values are added together and input to limiter 2423.
- Limiter 2423 limits the input value to a maximum value ⁇ VzLIMH and a minimum value ⁇ VzLIML.
- the maximum value ⁇ VzLIMH and minimum value ⁇ VzLIML of limiter 2423 are calculated as follows.
- the negative arm upper correction tolerances ⁇ Unu, ⁇ Unv, ⁇ Unw and the positive arm lower correction tolerances ⁇ Lpu, ⁇ Lpv, ⁇ Lpw of each phase are decreasing.
- any of ⁇ Unu, ⁇ Unv, ⁇ Unw, ⁇ Lpu, ⁇ Lpv, ⁇ Lpw may become 0 or less, and an arm other than the correction arm may become overmodulated. Therefore, it is necessary to limit the positive side value for the corrected zero-sequence voltage ⁇ Vz to the minimum value of ⁇ Unu, ⁇ Unv, ⁇ Unw, ⁇ Lpu, ⁇ Lpv, ⁇ Lpw.
- the filter 2424 detects the minimum value from the negative arm upper correction tolerances ⁇ Unu, ⁇ Unv, ⁇ Unw and the positive arm lower correction tolerances ⁇ Lpu, ⁇ Lpv, ⁇ Lpw of each phase among the correction tolerances of the correction voltages of each arm input to the correction zero-phase voltage calculation unit 1242, and sets the detected value as the maximum value ⁇ VzLIMH of the limiter 2423.
- the positive arm upper correction tolerances ⁇ Upu, ⁇ Upv, ⁇ Upw of each phase and the negative arm lower correction tolerances ⁇ Lnu, ⁇ Lnv, ⁇ Lnw of each phase are decreasing.
- any of ⁇ Upu, ⁇ Upv, ⁇ Upw, ⁇ Lnu, ⁇ Lnv, ⁇ Lnw may become 0 or less, and an arm other than the correction arm may become overmodulated.
- the filter 2425 detects the minimum value from the positive arm upper correction tolerances ⁇ Upu, ⁇ Upv, ⁇ Upw of each phase and the negative arm lower correction tolerances ⁇ Lnu, ⁇ Lnv, ⁇ Lnw of each phase among the correction tolerances of the correction voltages of each arm input to the correction zero-phase voltage calculation unit 1242, and the value whose sign is inverted by the inversion circuit 2426 of the detected value is set as the minimum value ⁇ VzLIML of the limiter 2423.
- the method of calculating the corrected positive arm output voltage command value Varmpu* and the corrected negative arm output voltage command value Varmnu* will be explained using the U phase as an example.
- the U phase is the phase that includes the arm that is the target of overmodulation correction.
- the U phase is a phase that includes an arm that is the subject of overmodulation correction
- the other phases are phases that do not include an arm that is the subject of overmodulation correction.
- the corrected zero-phase-sequence voltage ⁇ Vz output from the corrected zero-phase-sequence voltage calculation unit 1242 is input to an adder 1243u and subtracted from the positive arm output voltage command value Varmpu. Also, the corrected zero-phase-sequence voltage ⁇ Vz is added to the negative arm output voltage command value Varmnu by an adder 1244u.
- the U-phase voltage command correction value ⁇ Varmu calculated by the U-phase correction voltage calculation unit 1241U is input to the filter 1246u.
- the filter 1246u outputs 0 to the multiplier 1247u when the input value (input) is 0, and outputs 1 when the input value (input) is other than 0.
- a value obtained by subtracting the correction zero-phase voltage ⁇ Vz from the U-phase voltage command correction value ⁇ Varmu by the adder 1245u is input to the multiplier 1247u.
- the U-phase is a phase including an arm to be corrected for overmodulation
- the U-phase voltage command correction value ⁇ Varmu is not 0, and the output of the multiplier 1247u is 1.
- Varmpu- ⁇ Varmu is output from the voltage command value corrector 1240 as the corrected positive arm output voltage command value Varmpu*, and Varmnu+ ⁇ Varmu is output as the corrected negative arm output voltage command value Varmnu*.
- the corrected positive arm output voltage command value Varmpv* for the V phase is Varmpv- ⁇ Vz
- the corrected negative arm voltage output voltage command value Varmnv* is Varmnv+ ⁇ Vz
- the corrected positive arm output voltage command value Varmpw* for the W phase is Varmpw- ⁇ Vz
- the corrected negative arm voltage output voltage command value Varmnw* is Varmpw+ ⁇ Vz.
- the maximum value ⁇ VzLIMH of the U-phase voltage command correction value ⁇ Varmu is corrected with the zero-phase voltage component, the change in the phase-to-phase voltage can be kept to a minimum compared to when the zero-phase voltage is not used (when the V phase and W phase are not corrected).
- the voltage of the circulating current control portion of the U-phase becomes equal before and after the correction, so the effect on the circulating current control is reduced, contributing to the capacitor voltage balance.
- the same effect is achieved when the voltage command correction value ⁇ Varmu of the U-phase is below the minimum value ⁇ VzLIML ( ⁇ Varmu ⁇ VzLIML) or when another phase includes an arm to be corrected.
- the U phase has been used as an example, but the other phases can also output similarly corrected positive arm output voltage command values and corrected negative arm output voltage command values.
- the corrected arm output voltage command values Varmpu*, Varmnu*, Varmpv*, Varmnv*, Varmpw*, and Varmnw* for each phase output from the voltage command value correction unit 1240 are input to the standardization unit 246.
- the standardization unit 246 standardizes the corrected output voltage command value for each arm output from the voltage command value correction unit 1240 based on the total capacitor voltage value for each arm, and outputs the modulation command kref for each arm.
- the same effects as those of the first embodiment are achieved. Furthermore, when circulating current control is performed in all of the multiple leg circuits, the voltage command correction value ⁇ Varm corresponding to overmodulation is corrected by the zero-sequence voltage, i.e., the correction zero-sequence voltage that corrects the zero-sequence voltage, so that the influence on the AC side can be suppressed.
- the zero-sequence voltage i.e., the correction zero-sequence voltage that corrects the zero-sequence voltage
- correction zero-phase voltage used for correction is limited by the tolerance between all arm output voltage command values and the upper and lower thresholds, so that the effect on arms where overmodulation does not occur can also be suppressed.
- the control device 20 includes, for example, a processor 1000 and a storage device 1100 as a processing circuit.
- the processor 1000 may include a central processing unit (CPU), an application specific integrated circuit (ASIC), an integrated circuit (IC), a field programmable gate array (FPGA), various logic circuits, and various signal processing circuits.
- the processor 1000 may include a plurality of processors of the same type or different types, and each process may be shared and executed.
- the storage device 1100 may include a random access memory (RAM) configured to be able to read and write data from the processor 1000, and a read only memory (ROM) configured to be able to read data from the processor 1000.
- RAM random access memory
- ROM read only memory
- the processor 1000 executes a program input from a storage device 1100 such as a ROM.
- the hardware configuration may be as shown in FIG. 13.
- the semiconductor switching elements 111U and 111L constituting the converter cell 111 are described as IGBTs (Insulated Gate Bipolar Transistors) with diodes connected inversely in parallel, but MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) may also be used.
- IGBTs Insulated Gate Bipolar Transistors
- MOSFETs Metal Oxide Semiconductor Field Effect Transistors
- the semiconductor switching element is not limited to being made of a Si (silicon) semiconductor, and may be made of a wide band gap semiconductor such as SiC (silicon carbide) or GaN (gallium nitride). Wide band gap semiconductors are suitable for use in MMCs due to their characteristics such as faster switching, high temperature operation, and high dielectric breakdown field strength.
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Abstract
Description
正側アームと負側アームとが直列接続されたレグ回路が複数並列に接続され、複数の前記レグ回路の正側アームと負側アームとの接続点が各相の交流線に接続されて複数相の交流と直流との間で電力変換を行う電力変換器と、前記電力変換器を制御する制御装置とを備えた電力変換装置であって、
前記正側アーム及び前記負側アームのそれぞれは、複数の半導体スイッチング素子が直列接続された直列体とこの直列体に並列接続された直流コンデンサとを有する変換器セルが1つまたは複数直列接続されており、
前記制御装置は、複数の前記アームが出力する電圧の指令値であるアーム出力電圧指令値を生成するアーム出力電圧指令値生成部を有し、
それぞれの前記レグ回路に対し循環電流制御を行い、
少なくとも一つの前記レグ回路に含まれる全ての前記直流コンデンサの電圧の合計値が予め設定された第一閾値以上の時に、該レグ回路において、前記正側アーム及び前記負側アームのうち一方のアームのアーム出力電圧指令値が、予め設定された上側閾値を上回る場合は前記上側閾値以下になるように、前記アーム出力電圧指令値が予め設定された下側閾値を下回る場合は前記下側閾値以上になるように、前記アーム出力電圧指令値を補正する電圧指令補正値を生成して補正するとともに、
循環電流制御が行われている前記レグ回路の他方のアームのアーム出力電圧指令値を前記電圧指令補正値に基づいて補正する、ように構成されている。
以下、実施の形態1に係る電力変換装置について、図を用いて説明する。
<電力変換装置の構成>
図1は実施の形態1に係る電力変換装置1が適用される電力系統の一例の概略構成を示す図である。図1に示すように、電力変換装置1は、主回路である電力変換器10と、この電力変換器10を制御する制御部としての制御装置20と、を備える。電力変換器10は、交流と直流との間で相互に電力変換を行うものであり、その交流側が変圧器3を介して複数相交流としての三相交流系統である交流電源2に接続され、その直流側が正側直流端子6P、負側直流端子6Nを介して図示しない直流系統に接続される。直流系統は、例えば、大規模太陽光発電システム、産業用UPS(Uninterrptible Power Supply:無停電電源装置)のような直流電源、または他の電力変換器等である。
レグ回路100uの正側アーム100uPは、直列接続された複数の変換器セル111と、リアクトル112uPとを有し、これら複数の変換器セル111とリアクトル112uPとが互いに直列接続されて構成される。同様に、レグ回路100uの負側アーム100uNは、直列接続された複数の変換器セル111と、リアクトル112uNを有し、これら変換器セル111とリアクトル112uNとが互いに直列接続されて構成される。なお、各アーム内の変換器セル111は1つであってもよい。
なお、以降の説明において、正側アーム100uP,100vP,100wP、負側アーム100uN,100vN,100wNのそれぞれを区別する必要がない場合は、アーム100あるいは、正側アーム100P、負側アーム100Nと称して用いる。
図2Aは、実施の形態1に係る変換器セル111の構成の一例を示す回路図である。図2Bは、実施の形態1に係る変換器セル111の、図2Aとは異なる構成例を示す回路図である。図2Cは、実施の形態1に係る変換器セル111の、図2A、図2Bとは異なる構成例を示す回路図である。
なお、変換器セル111は、図2Aから図2Cに示すいずれの回路構成を用いても良く、正側アーム100uP、負側アーム100uN内で各回路構成を組み合わせても良い。
図1に示すように、制御装置20には、これらの検出器により検出された値が入力される。すなわち、電力変換器10の交流端の相電圧Vacu,Vacv,Vacw、交流端の電流Iacu,Iacv,Iacw、正側直流端子6Pと負側直流端子6Nとの間の直流電圧Vdc、正側直流端子6Pまたは負側直流端子6Nを流れる直流電流Idc、正側アーム100uP,100vP,100wPを流れる電流IuP,IvP,IwP、負側アーム100uN,100vN,100wNを流れる電流IuN,IvN,IwN及び直流コンデンサ111Cの電圧Vcapが制御装置20に入力される。
制御装置20は、各検出器により検出された検出値に基づいて、電力変換器10のそれぞれの変換器セル111内のそれぞれの半導体スイッチング素子111U、111Lを駆動するゲート信号GU,GLを生成する。
図5は、指令生成部24の構成を示す機能ブロック図である。図5に示すように、指令値生成部24はアーム出力電圧指令値生成部244、電圧指令値補正部240及び規格化部246を備えている。
図6は、指令生成部24の具備する電圧指令値補正部240の構成を示す図である。図6に示すように、電圧指令値補正部240は補正電圧計算部241を備えている。図7は、補正電圧計算部241の構成を示す図である。図6,図7は電圧指令値補正部としてU相電圧指令値補正部240Uを例にして説明する。
補正電圧計算部241において、加算器2411p,2413p,2415p,2416p,2417,2411n,2413n,2415n,2416nは入力された信号を加算して出力し、フィルタ2412p,2414p,2412n,2414nはそれぞれ入力信号が0以下の場合0を出力し、入力信号が0より大きい場合はその値を出力する。乗算器2418には、電力変換器10が循環電流優先モードの場合CCprModeUは1が、循環電流優先モードでない場合CCprModeUは0が入力される。
(1)正側アームにおいて、正側アーム内コンデンサ電圧合計値Vcpuが正側アーム出力電圧指令値Varmpuより大きく(Vcpu>Varmpu)、かつ負側アーム内コンデンサ電圧合計値Vcnuが負側アーム出力電圧指令値Varmnuより大きい(Vcnu>Varmnu)場合、すなわち過変調が生じていない場合、加算器2416pから出力される正側アーム出力電圧指令補正値ΔVarmpu及び加算器2416nから出力される負側アーム出力電圧指令補正値ΔVarmnuはいずれも0であり、補正電圧計算部241からは電圧指令補正値ΔVarmu=0が出力される。
以下、実施の形態2に係る電力変換装置について図を用いて説明する。
実施の形態2に係る電力変換装置は図3と同様の制御装置20を具備するが、指令生成部24の構成が実施の形態1のものと異なっている。以下、実施の形態1と異なる点を中心に説明し、相当する部分については説明を省略する。
(1)正側アームにおいて、正側アーム内コンデンサ電圧合計値Vcpuが正側アーム出力電圧指令値Varmpuより大きく(Vcpu>Varmpu)かつ負側アーム内コンデンサ電圧合計値Vcnuが負側アーム出力電圧指令値Varmnuより大きい(Vcnu>Varmnu)場合、すなわち過変調が生じていない場合、電圧指令補正値ΔVarmu=0が出力される。
また、他のV相補正電圧計算部1241V及びW相補正電圧計算部1241Wにおいても、それぞれ電圧指令補正値ΔVarmvと補正裕度σUpv、σLpv、σUnv、σLnv、電圧指令補正値ΔVarmwと補正裕度σUpw、σLpw、σUnw、σLnwを出力する。
補正零相電圧計算部1242から出力された補正零相電圧ΔVzは加算器1243uに入力され、正側アーム出力電圧指令値Varmpuから減算される。また、負側アーム出力電圧指令値Varmnuは加算器1244uで補正零相電圧ΔVzが加算される。
従って、補正された正側アーム出力電圧指令値Varmpu*としてVarmpu―ΔVarmuが、補正された負側アーム出力電圧指令値Varmnu*としてVarmnu+ΔVarmuが電圧指令値補正部1240から出力されることになる。
プロセッサ1000として、CPU(Central Processing Unit)、ASIC(Application Specific Integrated Circuit)、IC(Integrated Circuit)、FPGA(Field Programmable Gate Array)、各種の論理回路、及び各種の信号処理回路等が備えられてもよい。また、プロセッサ1000として、同じ種類のもの又は異なる種類のものが複数備えられ、各処理が分担して実行されてもよい。記憶装置1100として、プロセッサ1000からデータを読み出し及び書き込みが可能に構成されたRAM(Random Access Memory)、及びプロセッサ1000からデータを読み出し可能に構成されたROM(Read Only Memory)等が備えられている。プロセッサ1000は、ROM等の記憶装置1100から入力されたプログラムを実行する。
(1)図2Aから図2Cにおいて、変換器セル111を構成するスイッチング素子として半導体スイッチング素子111U、111Lはダイオードが逆並列に接続されたIGBT(Insulated Gate Bipolar Transistor:絶縁ゲートトランジスタ)を例に説明したが、MOSFET(Metal Oxide Semiconductor Field Effect Transistor:金属酸化膜半導体電界効果トランジスタ)を用いてもよい。
従って、例示されていない無数の変形例が、本願明細書に開示される技術の範囲内において想定される。例えば、少なくとも1つの構成要素を変形する場合、追加する場合または省略する場合、さらには、少なくとも1つの構成要素を抽出し、他の実施の形態の構成要素と組み合わせる場合が含まれるものとする。
Idc:直流電流、 Vdc:直流電圧、 Iac:交流電流、 Icc:循環電流、 Vcap:コンデンサ電圧、 Vc:アーム内コンデンサ電圧合計値、 Vcarm:アーム内コンデンサ電圧平均値、 Varm:アーム出力電圧指令値、 kref:アームの変調指令、 G:ゲート信号
Claims (6)
- 正側アームと負側アームとが直列接続されたレグ回路が複数並列に接続され、複数の前記レグ回路の正側アームと負側アームとの接続点が各相の交流線に接続されて複数相の交流と直流との間で電力変換を行う電力変換器と、前記電力変換器を制御する制御装置とを備えた電力変換装置であって、
前記正側アーム及び前記負側アームのそれぞれは、複数の半導体スイッチング素子が直列接続された直列体とこの直列体に並列接続された直流コンデンサとを有する変換器セルが1つまたは複数直列接続されており、
前記制御装置は、複数の前記アームが出力する電圧の指令値であるアーム出力電圧指令値を生成するアーム出力電圧指令値生成部を有し、
それぞれの前記レグ回路に対し循環電流制御を行い、
少なくとも一つの前記レグ回路に含まれる全ての前記直流コンデンサの電圧の合計値が予め設定された第一閾値以上の時に、該レグ回路において、前記正側アーム及び前記負側アームのうち一方のアームのアーム出力電圧指令値が、予め設定された上側閾値を上回る場合は前記上側閾値以下になるように、前記アーム出力電圧指令値が予め設定された下側閾値を下回る場合は前記下側閾値以上になるように、前記アーム出力電圧指令値を補正する電圧指令補正値を生成して補正するとともに、
循環電流制御が行われている前記レグ回路の他方のアームのアーム出力電圧指令値を前記電圧指令補正値に基づいて補正する、電力変換装置。 - 前記第一閾値は、前記電力変換器の直流端子間電圧の1/2以上である請求項1に記載の電力変換装置。
- 複数の前記アームのそれぞれにおいて、前記上側閾値は該アーム内の前記直流コンデンサの電圧合計値であり、前記下側閾値は0Vである、請求項1または2に記載の電力変換装置。
- 前記制御装置は、
全ての前記直流コンデンサの電圧の合計値が予め設定された第一閾値以上である前記レグ回路において、前記正側アーム及び前記負側アームのコンデンサ電圧の合計値の和が、前記電圧指令補正値に基づいて補正する前後で等しくなるように制御する、請求項1から3のいずれか1項に記載の電力変換装置。 - 複数の前記レグ回路の全てにおいて、それぞれの前記レグ回路に含まれる全ての前記直流コンデンサの電圧の合計値が予め設定された第一閾値以上である時に、
零相電圧を補正する補正零相電圧を用いて前記電圧指令補正値を補正する、請求項1から4のいずれか1項に記載の電力変換装置。 - 前記補正零相電圧は全ての前記アーム出力電圧指令値と前記上側閾値及び前記下側閾値との裕度により制限されている、請求項5に記載の電力変換装置。
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| JP2024565528A JPWO2024134858A1 (ja) | 2022-12-23 | 2022-12-23 | |
| EP22969242.1A EP4641909A4 (en) | 2022-12-23 | 2022-12-23 | POWER CONVERSION DEVICE |
| PCT/JP2022/047521 WO2024134858A1 (ja) | 2022-12-23 | 2022-12-23 | 電力変換装置 |
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| PCT/JP2022/047521 WO2024134858A1 (ja) | 2022-12-23 | 2022-12-23 | 電力変換装置 |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010512133A (ja) * | 2006-12-08 | 2010-04-15 | シーメンス アクチエンゲゼルシヤフト | エネルギー蓄積器が配分されたモジュール式コンバータ |
| JP2018196237A (ja) | 2017-05-17 | 2018-12-06 | 株式会社東芝 | 電力変換装置 |
| WO2021199150A1 (ja) | 2020-03-30 | 2021-10-07 | 三菱電機株式会社 | 電力変換装置 |
| JP2021185727A (ja) * | 2020-05-25 | 2021-12-09 | 株式会社日立製作所 | 電力変換装置の制御装置及び制御方法 |
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- 2022-12-23 JP JP2024565528A patent/JPWO2024134858A1/ja active Pending
- 2022-12-23 WO PCT/JP2022/047521 patent/WO2024134858A1/ja not_active Ceased
- 2022-12-23 EP EP22969242.1A patent/EP4641909A4/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010512133A (ja) * | 2006-12-08 | 2010-04-15 | シーメンス アクチエンゲゼルシヤフト | エネルギー蓄積器が配分されたモジュール式コンバータ |
| JP2018196237A (ja) | 2017-05-17 | 2018-12-06 | 株式会社東芝 | 電力変換装置 |
| WO2021199150A1 (ja) | 2020-03-30 | 2021-10-07 | 三菱電機株式会社 | 電力変換装置 |
| JP2021185727A (ja) * | 2020-05-25 | 2021-12-09 | 株式会社日立製作所 | 電力変換装置の制御装置及び制御方法 |
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| Title |
|---|
| See also references of EP4641909A4 |
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| EP4641909A1 (en) | 2025-10-29 |
| EP4641909A4 (en) | 2026-02-25 |
| JPWO2024134858A1 (ja) | 2024-06-27 |
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