WO2025194591A1 - 太阳能电池及其制作方法、光伏组件及光伏系统 - Google Patents

太阳能电池及其制作方法、光伏组件及光伏系统

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Publication number
WO2025194591A1
WO2025194591A1 PCT/CN2024/096597 CN2024096597W WO2025194591A1 WO 2025194591 A1 WO2025194591 A1 WO 2025194591A1 CN 2024096597 W CN2024096597 W CN 2024096597W WO 2025194591 A1 WO2025194591 A1 WO 2025194591A1
Authority
WO
WIPO (PCT)
Prior art keywords
layer
solar cell
doped
electrode
passivation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
PCT/CN2024/096597
Other languages
English (en)
French (fr)
Inventor
杨广涛
陈奕峰
陈达明
胡匀匀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Trina Solar Co Ltd
Original Assignee
Trina Solar Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Trina Solar Co Ltd filed Critical Trina Solar Co Ltd
Priority to EP24765934.5A priority Critical patent/EP4654785A4/en
Priority to US18/867,574 priority patent/US12464850B2/en
Priority to AU2024219405A priority patent/AU2024219405B2/en
Publication of WO2025194591A1 publication Critical patent/WO2025194591A1/zh
Priority to US19/342,843 priority patent/US20260026132A1/en
Priority to US19/342,871 priority patent/US20260026133A1/en
Priority to MX2025014189A priority patent/MX2025014189A/es
Pending legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/14—Photovoltaic cells having only PN homojunction potential barriers
    • H10F10/146—Back-junction photovoltaic cells, e.g. having interdigitated base-emitter regions on the back side
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/16—Photovoltaic cells having only PN heterojunction potential barriers
    • H10F10/164—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells
    • H10F10/165—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells
    • H10F10/166—Photovoltaic cells having only PN heterojunction potential barriers comprising heterojunctions with Group IV materials, e.g. ITO/Si or GaAs/SiGe photovoltaic cells the heterojunctions being Group IV-IV heterojunctions, e.g. Si/Ge, SiGe/Si or Si/SiC photovoltaic cells the Group IV-IV heterojunctions being heterojunctions of crystalline and amorphous materials, e.g. silicon heterojunction [SHJ] photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F10/00—Individual photovoltaic cells, e.g. solar cells
    • H10F10/10—Individual photovoltaic cells, e.g. solar cells having potential barriers
    • H10F10/17—Photovoltaic cells having only PIN junction potential barriers
    • H10F10/174—Photovoltaic cells having only PIN junction potential barriers comprising monocrystalline or polycrystalline materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/128—Annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/129—Passivating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/20—Electrodes
    • H10F77/206—Electrodes for devices having potential barriers
    • H10F77/211—Electrodes for devices having potential barriers for photovoltaic cells
    • H10F77/219—Arrangements for electrodes of back-contact photovoltaic cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/30—Coatings
    • H10F77/306—Coatings for devices having potential barriers
    • H10F77/311—Coatings for devices having potential barriers for photovoltaic cells

Definitions

  • the present application relates to the technical field of solar cells, and in particular to a solar cell and a manufacturing method thereof, a photovoltaic module and a photovoltaic system.
  • BC cell technology is considered the future development direction of crystalline silicon solar cells.
  • BC cell types mainly include TBC, HPBC, and HBC. BC cells move the PN junction and metal contact to the back of the cell, eliminating the electrode from blocking the front. This allows the cell to absorb sunlight over a larger area, thereby improving conversion efficiency and generating more power.
  • a solar cell and a method for manufacturing the same, a photovoltaic module, and a photovoltaic system are provided.
  • a first aspect of an embodiment of the present application provides a solar cell, comprising:
  • the substrate comprises a first surface and a second surface disposed opposite to each other; wherein the first surface has a first area and a second area adjacent to each other in a first direction;
  • the passivation contact layer located in the first region of the first surface;
  • the passivation contact layer comprising a first tunneling layer and a first doping layer, the first tunneling layer and the first doping layer being stacked in sequence on the first region of the first surface of the substrate in a direction away from the second surface;
  • a polysilicon layer located on a surface of at least a portion of the passivation contact layer away from the substrate;
  • a first passivation layer is located on a surface of the polysilicon layer away from the passivation contact layer and on the second region of the first surface.
  • a second aspect of the embodiments of the present application provides a method for manufacturing a solar cell, comprising:
  • a substrate is provided; wherein the substrate includes a base and a passivation contact layer; wherein the base includes a first surface and a second surface disposed opposite to each other, the first surface including a first region and a second region adjacent to each other in a first direction; the passivation contact layer is located in the first region of the first surface; the passivation contact layer includes a first tunneling layer and a first doping layer, the first tunneling layer and the first doping layer being stacked in sequence in the first region of the first surface of the base in a direction away from the second surface;
  • a first passivation layer is formed on a surface of the polysilicon layer away from the passivation contact layer and on a second region of the first surface of the substrate.
  • a third aspect of an embodiment of the present application provides a photovoltaic module, comprising at least one cell string, the cell string comprising at least two of the aforementioned solar cells, or the cell string comprising at least two solar cells manufactured by the aforementioned solar cell manufacturing method.
  • a fourth aspect of an embodiment of the present application provides a photovoltaic system, comprising the above-mentioned photovoltaic assembly.
  • the solar cell provided by the embodiment of the present application includes a substrate, a passivation contact layer, a polysilicon layer and a first passivation layer, wherein the polysilicon layer is arranged between the passivation contact layer and the first passivation layer, so that in the subsequent laser process, the laser Light can act directly on the polysilicon layer, which can reduce the loss introduced by the doped polysilicon in the passivation contact layer and avoid laser damage to the passivation contact layer, thereby improving the photoelectric conversion efficiency of the solar cell.
  • FIG1 is a schematic diagram of the structure of a solar cell provided in Example 1 of the present application.
  • FIG2 is a top view of the solar cell structure provided in an embodiment of the present application.
  • FIG3 is a second schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG4 is a third schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG5 is a fourth schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG6 is a fifth schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG7 is a sixth schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG8 is a seventh schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG9 is an eighth schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG10 is a ninth schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG11 is a tenth schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG12 is an eleventh schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG13 is a twelfth schematic diagram of a solar cell provided in an embodiment of the present application.
  • FIG14 is a schematic flow chart of a method for manufacturing a solar cell according to an embodiment of the present application.
  • FIG15 is a schematic cross-sectional view of a solar cell in a method for manufacturing a solar cell according to an embodiment of the present application
  • FIG16 is a schematic structural diagram of a transparent conductive layer formed in a method for manufacturing a solar cell provided in an embodiment of the present application;
  • FIG17 is a schematic diagram of forming an electrode opening in a method for manufacturing a solar cell according to an embodiment of the present application.
  • FIG18 is a schematic diagram of forming a transparent conductive layer in a method for manufacturing a solar cell according to another embodiment of the present application.
  • FIG19 is a schematic diagram of forming a second tunneling layer in the method for manufacturing a solar cell provided in an embodiment of the present application.
  • FIG20 is a schematic structural diagram of forming a first diffusion layer in the method for manufacturing a solar cell provided in an embodiment of the present application;
  • FIG21 is a schematic structural diagram of forming an insulating layer in the method for manufacturing a solar cell provided in an embodiment of the present application.
  • FIG22 is a schematic diagram of forming a second diffusion region, a second passivation layer, and an anti-reflection layer on a substrate in a method for manufacturing a solar cell provided in an embodiment of the present application;
  • FIG23 is a schematic diagram of the structure of a photovoltaic module provided in an embodiment of the present application.
  • first and second are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as “first” or “second” may explicitly or implicitly include at least one of such features.
  • plural means at least two, for example, two, three, etc., unless otherwise specifically defined.
  • the terms “installed,” “connected,” “connect,” “fixed,” etc. should be understood in a broad sense. For example, they can refer to fixed connection, detachable connection, or integration; mechanical connection or electrical connection; direct connection or indirect connection through an intermediate medium; internal communication between two elements or interaction between two elements, unless otherwise specified. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.
  • first feature when a first feature is “above” or “below” a second feature, it may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Furthermore, when a first feature is “above,” “above,” or “above” a second feature, it may mean that the first feature is directly above or diagonally above the second feature, or simply means that the first feature is at a higher level than the second feature. When a first feature is “below,” “below,” or “below” a second feature, it may mean that the first feature is directly below or diagonally below the second feature, or simply means that the first feature is at a lower level than the second feature.
  • FIG1 is a schematic diagram of the structure of a solar cell provided in an embodiment of the present application.
  • an embodiment of the present application provides a solar cell.
  • a solar cell is described using a back-contact crystalline silicon heterojunction solar cell (HBC) as an example.
  • the solar cell may include a substrate 110, a passivation contact layer 120, a polysilicon layer 130, and a first passivation layer 140.
  • the substrate 110 includes a first surface S1 and a second surface S2 arranged opposite to each other; wherein the first surface S1 has a first area A and a second area B adjacent to each other in the first direction D1. It can be understood that the substrate 110 has a first surface S1 (or backlight surface) and a second surface S2 (or light-receiving surface) opposite to each other in the second direction D2 (i.e., the thickness direction of the solar cell).
  • the light-receiving surface and the backlight surface can also be understood as the outermost two surfaces of the solar cell facing the sunlight and facing away from the sunlight.
  • the first area A and the second area B may be arranged flush or not.
  • the substrate 110 where the first area A is located there is a step between the substrate 110 where the first area A is located and the substrate 110 where the second area B is located.
  • the thickness of the substrate 110 where the first area A is located is greater than or equal to the thickness of the substrate 110 where the second area B is located.
  • the substrate 110 is used to receive incident light and generate photogenerated carriers.
  • the substrate 110 includes but is not limited to a doped semiconductor substrate made of silicon or germanium, or a doped substrate such as silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide or gallium oxide.
  • Compound semiconductor substrate for example, in the embodiment of the present application, the material of the substrate 110 can be a doped single crystal silicon material.
  • the doping element type of the substrate 110 can be N-type, and the N-type element can be, for example, any one of phosphorus, arsenic or antimony; the doping element type of the substrate 110 can also be P-type, and the P-type element can be, for example, boron and gallium.
  • the first surface S1 and the second surface S2 of the substrate 110 will also have certain morphological changes based on the morphology of features such as the battery film layer.
  • the light-receiving surface can be a velvet structure
  • the backlight portion can be a planar structure, and the other portion of the backlight surface can also be a velvet structure.
  • the passivation contact layer 120 is located in the first region A of the first surface S1. It is understood that the passivation contact layer 120 is located in the first region A of the backlight side of the substrate 110.
  • the passivation contact layer 120 can reduce carrier recombination on the surface of the substrate 110, thereby increasing the open-circuit voltage of the solar cell and improving the photovoltaic conversion efficiency of the solar cell.
  • the passivation contact layer 120 may include a first tunneling layer 121 and a first doping layer 122, which are stacked sequentially on the first region A of the first surface S1 of the substrate 110, moving away from the second surface S2.
  • the first tunneling layer 121 is used to achieve interfacial passivation on the first surface S1 of the substrate 110, providing a chemical passivation effect. By saturating the dangling bonds on the surface of the substrate 110, the density of interfacial defect states on the first surface S1 of the substrate 110 is reduced, thereby reducing the number of recombination centers on the first surface S1 of the substrate 110 and lowering the carrier recombination rate.
  • the thickness of the first tunneling layer 121 is less than or equal to 3 nanometers.
  • the first tunneling layer 121 may be made of a dielectric material, such as at least one of silicon oxide, amorphous silicon, polycrystalline silicon, silicon carbide, silicon nitride, silicon oxynitride, aluminum oxide, or titanium oxide.
  • the dielectric material may contain the same doping element as the substrate 110 .
  • the thickness of the first doped layer 122 is greater than or equal to 20 nanometers and not greater than 600 nanometers.
  • the material of the first doped layer 122 can be doped polysilicon, or doped polysilicon containing at least one of oxygen, carbon, and nitrogen.
  • the doping type of the first doped layer 122 can be the same as the doping type of the substrate 110, or the opposite.
  • the polysilicon layer 130 is located on a surface of at least a portion of the passivation contact layer 120 that is away from the substrate 110.
  • the first tunneling layer 121, the first doped layer 122, and the polysilicon layer 130 are sequentially stacked on the first surface S1 in a direction away from the second surface S2.
  • the polysilicon layer 130 may be made of intrinsic polysilicon.
  • the doping element of the polysilicon layer 130 includes at least one of oxygen, carbon, and nitrogen.
  • the thickness of the polysilicon layer 130 ranges from 3 nanometers to 150 nanometers.
  • the laser can act on the polysilicon layer 130 (e.g., intrinsic poly-Si) during the laser process, reducing the loss introduced by the poly-Si into the first doped layer 122 and improving the conversion efficiency of the battery.
  • the polysilicon layer 130 e.g., intrinsic poly-Si
  • uniform doping can be formed in the contact area of the first doped layer 122, reducing the thickness requirement of the first doped layer 122, reducing the optical loss in the first doped layer, and improving the battery efficiency.
  • the first passivation layer 140 is located on the surface of the polysilicon layer 130 away from the passivation contact layer 120, and on the second region B of the first surface S1.
  • the thickness of the first passivation layer 140 ranges from 3 to 15 nanometers.
  • the material of the first passivation layer 140 can include intrinsic amorphous silicon, or the material of the first passivation layer can be doped with at least one of oxygen, carbon, and nitrogen, for example, amorphous silicon containing at least one of oxygen, carbon, and nitrogen.
  • the solar cell provided in the embodiment of the present application includes a substrate, a passivation contact layer, a polycrystalline silicon layer and a first passivation layer, wherein the polycrystalline silicon layer is arranged between the passivation contact layer and the first passivation layer.
  • the laser can act on the polycrystalline silicon layer, which can reduce the loss introduced by the doped polycrystalline silicon in the passivation contact layer and can also avoid laser damage to the passivation contact layer, thereby improving the photoelectric conversion efficiency of the solar cell.
  • FIG 2 is a top view of the solar cell structure provided in an embodiment of the present application
  • Figure 3 is a second schematic diagram of the solar cell provided in an embodiment of the present application.
  • the solar cell provided in this embodiment may further include a second doped layer 150, a transparent conductive layer 160, a first electrode 170, and a second electrode 180.
  • the second doped layer 150 is located on the surface of the first passivation layer 140 away from the polysilicon layer 130.
  • the material of the second doped layer 150 may include doped amorphous silicon or microcrystalline silicon, or doped amorphous silicon or microcrystalline silicon containing at least one of oxygen, carbon, and nitrogen.
  • the doping type of the second doped layer 150 is opposite to that of the first doped layer 122.
  • the thickness of the second doped layer 150 ranges from 3 to 60 nanometers.
  • the first passivation layer 140 and the second doped layer 150 extend from the space where the first region A is located to the space where the second region B is located. It can be understood that the first passivation layer 140 covers the polysilicon layer 130 and the second region B of the second surface S2 of the substrate 110, and the second doping layer 150 The first passivation layer 140 covers a side away from the substrate 110 .
  • Transparent conductive layer 160 is located on the surface of second doped layer 150 away from second doped layer 150.
  • Transparent conductive layer 160 has a thickness greater than or equal to 10 nanometers and less than or equal to 200 nanometers.
  • the material of transparent conductive layer 160 can be one or more of zinc oxide (ZnO), indium oxide (InO), and tin oxide (SnO).
  • the transparent conductive material can be doped with one or more of gallium (Ga), tin (Sn), molybdenum (Mo), cerium (Ce), fluorine (F), tungsten (W), and aluminum (Al).
  • the first electrode 170 is located in the first region and extends from the transparent conductive layer 160 through at least the polysilicon layer 130. A first end of the first electrode 170 is in electrical contact with the first doped layer 122, and a second end of the first electrode 170 is in contact with the transparent conductive layer 160 located in the first region A. It will be understood that the first electrode 170 may extend from the transparent conductive layer 160 through the polysilicon layer 130 to electrically contact the first doped layer 122 through the transparent conductive layer 160, or may extend from the transparent conductive layer 160 through the first doped layer 122 to directly contact the first doped layer 122.
  • the second electrode 180 is located in the second region, wherein the second electrode 180 is disposed in contact with the transparent conductive layer 160. It is understood that the projection of the second electrode 180 toward the substrate 110 is located in the second region B.
  • the transparent conductive layer 160 is provided with an isolation trench 104, which is disposed between the first electrode 170 and the second electrode 180 and extends at least through the transparent conductive layer 160.
  • the isolation trench 104 may extend through the first passivation layer 140, the second doping layer 150, and the transparent conductive layer 160 to insulate the first electrode 170 from the second electrode 180.
  • the isolation trench 104 is located in the first region.
  • the isolation trench 104 is located in the second region.
  • the isolation trench 104 is located at the boundary between the first and second regions.
  • the materials of the first electrode 170 and the second electrode 180 include, but are not limited to, one or more of aluminum (Al), titanium (Ti), nickel (Ni), cobalt (Co), silver (Ag), copper (Cu), and tin (Sn).
  • the first electrode 170 and the second electrode 180 may be formed by screen printing, laser transfer, and electroplating.
  • the first electrode 170 and the second electrode 180 can be understood as metal gate lines, and the width and thickness of the metal gate lines are not limited.
  • the electrical contact between the first electrode 170 and the first doping layer 122 will be described below with reference to FIG. 3 to FIG. 6 .
  • a transparent conductive layer 160 may be located on the surface of the second doped layer 150 away from the first passivation layer 140.
  • the transparent conductive layer 160 may include an integrally formed transparent conductive layer segment A and a transparent conductive layer segment B.
  • the projection of the transparent conductive layer segment A toward the substrate 110 falls within the first region A of the first surface S1 of the substrate 110, while the projection of the transparent conductive layer segment B toward the substrate 110 falls within the second region B of the first surface S1 of the substrate 110.
  • the transparent conductive layer segment A is stacked on the second doped layer 150.
  • a first electrode 170 extends from the transparent conductive layer 160 through the first doped layer 122, and the first electrode 170 is disposed in contact with the first doped layer 122.
  • the first electrode 170 may extend through the interface between the first doped layer 122 and the polysilicon layer 130, thereby contacting the first doped layer 122.
  • the first electrode 170 may extend through the interior of the first doped layer 122, thereby contacting the first doped layer 122.
  • an electrode opening may be formed in the transparent conductive layer 160, the second doped layer 150, and the first passivation layer 140, wherein the bottom of the electrode opening is at least partially the first doped layer 122, and the first electrode 170 is located in the electrode opening to electrically contact the first doped layer 122.
  • the first electrode 170 may include a first electrode portion 171 and a second electrode portion 172, wherein the first electrode portion 171 is located in the electrode opening, and a first end of the first electrode portion 171 is in contact with the first doped layer 122.
  • the first electrode portion 171 extends from the transparent conductive layer 160 through the first doped layer 122, the first end of the first electrode portion 171 is in contact with the first doped layer 122, the second end of the first electrode portion 171 is in contact with the second electrode portion 172, and the second electrode portion 172 is exposed in section A of the transparent conductive layer.
  • the first doped layer 122 includes an intrinsic portion 1221 and a doped diffusion portion 1222, wherein the intrinsic portion 1221 is located on the surface of the first tunneling layer 121 away from the substrate 110, and the polysilicon layer 130 is located on the surface of the intrinsic portion 1221 away from the first doped layer 122; the doped diffusion portion 1222 is located on a portion of the surface of the intrinsic portion 1221 away from the first tunneling layer 121, and diffuses to the polysilicon layer 130 along the direction of the substrate 110 pointing to the first passivation layer 140; the doped diffusion portion 1222 is in contact with the first electrode 170.
  • the doped diffusion portion 1222 may penetrate the polysilicon layer 130. Alternatively, the doped diffusion portion 1222 may diffuse into the polysilicon layer 130 and not penetrate the polysilicon layer 130.
  • the doped diffusion portion 1222 may be understood as a contact area that contacts the first electrode 170, where the doped polysilicon in the contact area is doped with the same or opposite doping type as the substrate 110.
  • the doped diffusion portion 1222 may be formed by laser during the preparation of the solar cell. The heat generated during the process of forming the electrode opening causes the doping elements of the first doping layer 122 to diffuse into the polysilicon layer 130 to form a diffusion portion in the polysilicon layer 130 .
  • the first doped layer further includes a doped diffusion portion diffused into the polysilicon layer, wherein the doped diffusion portion is electrically connected to the first electrode.
  • the doped diffusion portion can collect current and transmit the collected current to the first electrode via the doped diffusion portion, thereby reducing or eliminating the short-circuit effect between adjacent electrodes, thereby reducing electrical losses and improving the photovoltaic conversion efficiency of the solar cell.
  • the polysilicon layer includes intrinsic polysilicon. The introduction of intrinsic polysilicon can form uniform doping in the doped diffusion portion of the first doped layer, reducing the thickness requirement of the first doped layer, thereby reducing optical losses in the first doped layer, and further improving the photovoltaic conversion efficiency of the cell.
  • the transparent conductive layer 160 in the solar cell provided in this embodiment has a different structure than the transparent conductive layer 160 of the solar cell shown in Figures 3 and 4 .
  • electrode grooves are provided in the second doped layer 150 and the first passivation layer 140, and at least a portion of the bottom of the electrode grooves is the first doped layer 122.
  • the transparent conductive layer 160 is located on the surface of the second doped layer 150 away from the first passivation layer 140, as well as on the bottom and walls of the electrode grooves.
  • a portion of the first electrode 170 is located within the electrode grooves to electrically contact the first doped layer 122, while the remaining portion of the first electrode 170 is exposed outside the electrode grooves to electrically contact the transparent conductive layer 160 outside the electrode grooves.
  • the first electrode portion 171 of the first electrode 170 is located within the electrode grooves and can be electrically connected to the first doped layer 122 via the transparent conductive layer 160 located at the bottom of the grooves.
  • the second electrode portion 172 of the first electrode 170 is exposed outside the transparent conductive layer 160 to connect to an external power supply.
  • the transparent conductive layer 160 at the bottom of the electrode trench is entirely in contact with the first doped layer 122, so that the first electrode 170 built into the electrode trench can be in direct electrical contact with the first doped layer 122.
  • the contact surface between the transparent conductive layer 160 at the bottom of the electrode trench and the first doped layer 122 can be part of the contact surface between the first doped layer 122 and the polysilicon layer 130.
  • the contact surface between the transparent conductive layer 160 at the bottom of the electrode trench and the first doped layer 122 extends into the interior of the first doped layer 122.
  • the transparent conductive layer 160 at the bottom of the electrode trench can contact the doped diffusion portion diffused into the polysilicon layer 130, so that the first electrode 170 is electrically in contact with the doped diffusion portion of the first doped layer 122 through the transparent conductive layer 160.
  • the contact surface between the transparent conductive layer 160 at the bottom of the electrode trench and the first doped layer 122 can be determined based on the diffusion depth of the doped diffusion portion.
  • the contact surface between the transparent conductive layer 160 at the bottom of the electrode trench and the first doped layer 122 can be part of the contact surface between the second doped layer 150 and the polysilicon layer 130, or can extend into the interior of the polysilicon layer 130.
  • the first electrode is electrically connected or in contact with the first doped layer via the transparent conductive layer, which can improve the electrical contact stability between the first doped layer and the first electrode, thereby improving the stability of the transmitted current and further improving the efficiency of the solar cell.
  • the solar cell may further include an insulating layer 190.
  • the insulating layer 190 is located on the surface of the polysilicon layer 130 away from the passivation contact layer 120, and is located between the polysilicon layer 130 and the first passivation layer 140.
  • the material of the insulating layer 190 may include at least one of a silicon oxide layer, a silicon nitride layer, and a silicon oxynitride layer.
  • the material of the insulating layer 190 may also include the same doping element as the material of the first doping layer 122.
  • the thickness of the insulating layer 190 is greater than or equal to 1.5 nanometers. It should be noted that in the embodiment of the present application, the insulating layer 190 may be retained or removed, and may be set according to actual preparation requirements.
  • the insulating layer 190 if the insulating layer 190 is removed from the solar cell, it can reduce the electrical loss in the contact area between the first doped layer and the second doped layer. Alternatively, if the insulating layer 190 is retained in the solar cell, it can increase the protection of the polysilicon layer and the first doped layer.
  • the solar cell provided in this embodiment may further include a second tunneling layer 123.
  • the second tunneling layer 123 is located on the surface of the first doped layer 122 on the side away from the first tunneling layer 121, and is located between the first doped layer 122 and the polysilicon layer 130.
  • the second tunneling layer 123 may be formed by natural oxidation of the first doped layer 122 during the preparation process.
  • the second tunneling layer 123 may also be formed by chemical vapor deposition.
  • the material of the second tunneling layer 123 may include at least one of silicon oxide, silicon oxynitride, aluminum oxide, or titanium oxide.
  • the region of the polysilicon layer 130 close to the second tunneling layer 123 is a lightly doped region, wherein the lightly doped region
  • the doping type of the lightly doped region is the same as the doping type of the first doping layer 122.
  • the doping concentration of the lightly doped region decreases along the direction from the first tunneling layer 121 to the first passivation layer 140 until the doping concentration is zero.
  • a second tunneling layer is provided between the first doped layer and the polysilicon layer, which can be naturally formed in the process flow.
  • the second tunneling layer can reduce the diffusion of the doping elements in the first doped layer to the polysilicon layer under low temperature conditions, and at the same time can reduce the mutual transmission of current between the first doped layer and the polysilicon layer, thereby improving the photoelectric conversion efficiency of the solar cell.
  • the solar cell provided in the present embodiment may further include a first diffusion layer 112 .
  • the first diffusion layer 112 is located in the first region A of the first surface S1 and between the substrate 110 and the first tunneling layer 121 .
  • the first diffusion layer 112 includes a crystalline silicon substrate, wherein the conductivity type of the doping element of the crystalline silicon substrate is the same as the conductivity type of the doping element in the first doping layer 122, and the doping concentration of the doping element in the crystalline silicon substrate is less than or equal to the doping concentration of the doping element in the first doping layer 122.
  • the diffusion depth of the doping element in the first doped crystalline silicon is greater than or equal to 10 nanometers and less than or equal to 1500 nanometers.
  • the diffusion of the doping elements in the substrate can be improved.
  • the solar cell provided in the embodiment of the present application may further include a second diffusion region 101 , relative to any of the aforementioned embodiments.
  • the material of the second diffusion region 101 includes a second doped crystalline silicon, wherein the doping concentration of the second doped crystalline silicon is greater than the doping concentration of the doping element in the substrate 110.
  • the diffusion depth of the doping element in the second doped crystalline silicon is greater than or equal to 10 nanometers and less than or equal to 1500 nanometers.
  • the provision of the second diffusion region can improve the fill factor of the solar cell.
  • the adjustment space for the size ratio of the first and second electrodes can be increased, which can reserve more space for laser patterning and reduce the requirements for the laser beam during the laser patterning process.
  • the solar cell further includes a passivation anti-reflection layer located on the second surface of the substrate 110.
  • the passivation anti-reflection layer includes a second passivation layer 102 and an anti-reflection layer 103 stacked on the second surface of the substrate 110.
  • the second passivation layer 102 can have a single-layer or multi-layer structure, and the material of the second passivation layer 102 can be at least one of aluminum oxide, silicon oxide, silicon nitride, and silicon oxynitride.
  • the material of the second passivation layer 102 can be intrinsic amorphous silicon, or amorphous silicon containing at least one of oxygen, carbon, and nitrogen.
  • the thickness of the second passivation layer 102 can be greater than or equal to 1.5 nanometers.
  • the second passivation layer 102 can be formed by chemical deposition.
  • the second passivation layer 102 serves as a surface passivation in the solar cell, effectively chemically passivating dangling bonds on the surface of the substrate 110.
  • the anti-reflection layer 103 can have a single-layer or multi-layer structure.
  • each layer can be made of materials such as silicon oxide, silicon nitride, or silicon oxynitride.
  • the thickness of the anti-reflection layer 103 can be greater than or equal to 40 nanometers.
  • the anti-reflection layer 103 is located on the backlight side of the solar cell and provides an anti-reflection effect on the back surface of the solar cell. Alternatively, in other embodiments, the anti-reflection layer 103 can be omitted.
  • FIG14 is a flow chart of a method for manufacturing a solar cell provided in Example 4 of the present application.
  • Figure 15 is a flow chart of a method for manufacturing a solar cell in one embodiment.
  • the method for manufacturing a solar cell includes steps 1410 to 1430.
  • Step 1410 provide a substrate.
  • the substrate includes a base 110 and a passivation contact layer.
  • the base 110 includes a first surface S1 and a second surface S2 arranged opposite to each other, and the first surface S1 includes a first surface S1 having a first region A and a second region B adjacent to each other in a first direction.
  • the base 110 includes but is not limited to a doped semiconductor substrate made of silicon or germanium, or a doped compound semiconductor substrate made of silicon carbide, silicon germanium, gallium arsenide, indium phosphide, zinc oxide or gallium oxide.
  • a part of the surface of the provided base 110 can also be subjected to a texturing treatment.
  • the base 110 is a doped single crystal silicon substrate as an example.
  • the anisotropic corrosion characteristics of the silicon substrate reacting in a low concentration alkali solution form a pyramid velvet surface. Furthermore, It can also remove dirt on the surface of the silicon substrate and remove the cutting damage layer, which can reduce the reflectivity and increase the silicon substrate's absorption of sunlight.
  • a passivation contact layer may be formed on the first surface S1 of the substrate 110 by plasma enhanced chemical vapor deposition (PECVD). It is understood that the passivation contact layer is formed on the backlight side of the substrate 110. Furthermore, the passivation contact layer may include a first tunneling layer 121 and a first doping layer 122, which are deposited sequentially on the first surface S1 of the substrate 110 in a direction away from the second surface S2. The first tunneling layer 121 is used to achieve interface passivation of the first surface S1 of the substrate 110, thereby achieving a chemical passivation effect.
  • PECVD plasma enhanced chemical vapor deposition
  • the interface defect state density of the first surface S1 of the substrate 110 is reduced, thereby reducing the recombination center of the first surface S1 of the substrate 110 to reduce the carrier recombination rate.
  • Step 1420 forming a polysilicon layer on a surface of the passivation contact layer away from the substrate.
  • a polysilicon layer 130 can be formed on one side of the first doped layer 122 and the first tunneling layer 121 using PECVD.
  • the first tunneling layer 121, the first doped layer 122, and the polysilicon layer 130 are sequentially deposited on the first surface S1 of the substrate 110 in a direction away from the second surface S2. It should be noted that the formation process of the polysilicon layer 130 is not limited to that described in the embodiment of the present application, and other processes may also be used.
  • Step 1430 Form a first passivation layer on a surface of the polysilicon layer away from the passivation contact layer and on a second region of the first surface of the substrate.
  • the structure obtained in step 1420 may be subjected to backside patterning to remove a portion of the passivation contact layer 120 and the polysilicon layer 130 to expose the substrate 110 , thereby obtaining a second region on the first surface of the substrate.
  • a first passivation layer 140 is formed on the surface of the polysilicon layer 130 away from the passivation contact layer 120 (the first doping layer 122 away from the first tunneling layer 121) and the second area of the first surface of the substrate.
  • the method for preparing a solar cell may further include cleaning the structure after the back surface patterning treatment.
  • the first passivation layer 140 is formed after the cleaning treatment.
  • PECVD plasma enhanced atomic layer deposition
  • PEALD or atomic layer deposition ALD can be used to deposit relevant passivation materials, such as intrinsic amorphous silicon, or intrinsic amorphous silicon containing at least one of oxygen, carbon and nitrogen, on the surface of the polysilicon layer 130 away from the passivation contact layer 120 and the second area of the first surface of the substrate to form the first passivation layer 140.
  • the structures, film materials, setting ranges, etc. of the substrate 110, the first tunneling layer 121 and the first doping layer 122, the polysilicon layer 130 and the first passivation layer 140 have been described in detail in the aforementioned embodiments and will not be repeated here.
  • the solar cell fabrication method provided in the embodiments of the present application forms a polysilicon layer on the surface of the passivation contact layer away from the substrate before forming the first passivation layer. This allows the laser to act on the polysilicon layer during the subsequent laser process, reducing losses introduced by the doped polysilicon in the passivation contact layer and preventing laser damage to the passivation contact layer, thereby improving the solar cell's photoelectric conversion efficiency. Furthermore, the solar cell fabrication method provided in the embodiments of the present application, without changing the basic HBC process, does not use a nitrogen source to form the polysilicon layer before forming the first passivation layer, further effectively improving the cell's photoelectric conversion efficiency.
  • the solar cell preparation method further includes: forming a second doped layer on the surface of the first passivation layer away from the polysilicon layer; forming a transparent conductive layer and a first electrode on the surface of the second doped layer away from the first passivation layer; forming a second electrode on the surface of the transparent conductive layer away from the first passivation layer; wherein the second electrode is located in the second area.
  • a related conductive doping material can be deposited on the surface of the first passivation layer 140 away from the polysilicon layer 130 by PECVD or the like to form a second doping layer 150 on the first passivation layer.
  • a related conductive transparent material can be deposited on the surface of the first passivation layer 140 away from the polysilicon layer 130 by PECVD or the like to form a transparent conductive layer 160 on the second doping layer 150.
  • an electrode opening or an electrode groove is formed by laser patterning or the like, and the electrode metal material is filled to form a first electrode 170.
  • the first electrode 170 extends from the transparent conductive layer 160 to at least the polysilicon layer 130.
  • a first end of the first electrode 170 is in electrical contact with the first doped layer 122, and a second end of the first electrode 170 is in contact with the transparent conductive layer 160 located in the first region A.
  • the first electrode 170 is located in the first region and extends from the transparent conductive layer 160 at least through the polysilicon layer 130. At least a portion of the first electrode 170 is in contact with at least one of the first doped layer 122 and the polysilicon layer 130, and the remaining portion of the first electrode 170 is in contact with the transparent conductive layer 160 located in the first region.
  • the resulting structure can be seen in Figures 3 and 4.
  • forming a transparent conductive layer and a first electrode on a surface of the second doped layer away from the first passivation layer includes the steps of: forming a transparent conductive layer on a surface of the second doped layer away from the first passivation layer; forming an electrode opening in the transparent conductive layer, the second doped layer, and the first passivation layer; and forming the first electrode in the electrode opening.
  • the bottom of the electrode opening is at least partially formed by the first doped layer.
  • a conductive transparent material can be deposited on the surface of the first passivation layer 140 facing away from the polysilicon layer 130 using a method such as PECVD to form a transparent conductive layer 160 on the second doped layer 150 .
  • PECVD a method such as PECVD
  • an electrode opening C can be formed within the transparent conductive layer 160, the second doped layer 150, the first passivation layer 140, and a portion of the polysilicon layer 130, and a first electrode 170 can be formed within the electrode opening C.
  • the resulting structure can be referenced to FIG3-4 .
  • the electrode opening C can be formed using a laser patterning process.
  • the electrode opening C can be opened to the polysilicon layer 130, and the first electrode 170 within the electrode opening C can be in electrical contact with the doped diffusion portion 1222 diffused into the polysilicon layer.
  • the electrode opening C can be opened to the first doped layer 122, and the first electrode 170 within the electrode opening C can be in contact with the first doped layer 122.
  • the transparent conductive layer 160, the second doped layer 150, and the first passivation layer 140 may be patterned to form the isolation trench 104. Furthermore, while forming the first electrode 170, the second electrode 180 may be formed on the transparent conductive layer. The first electrode 170 and the second electrode 180 are insulated by the isolation trench 104.
  • a transparent conductive layer and a first electrode are formed on a surface of the second doped layer facing away from the first passivation layer.
  • This includes forming an electrode trench within the transparent conductive layer, the second doped layer, and the first passivation layer; forming a transparent conductive layer on a surface of the second doped layer facing away from the first passivation layer, as well as on the walls and bottom of the electrode trench; and forming the first electrode in the remaining area within the electrode trench.
  • the transparent conductive layer 160 in this embodiment is formed after the electrode trench is formed.
  • the electrode trench E can be formed using a laser patterning process, where the electrode trench E can be opened to the polysilicon layer 130 or the first doped layer 122.
  • a conductive transparent material can be deposited on a surface of the second doped layer 150 facing away from the first passivation layer 140 using methods such as PECVD to form a transparent conductive layer on the second doped layer 150 and the walls and bottom of the electrode trench E.
  • PECVD PECVD
  • the first electrode is electrically connected or in contact with the first doped layer via the transparent conductive layer, which can improve the electrical contact stability between the first doped layer and the first electrode, thereby improving the stability of the transmitted current and further improving the efficiency of the solar cell.
  • the solar cell manufacturing method further includes a step of performing a localized laser heat treatment on the polycrystalline silicon layer to diffuse the dopant elements of the first doping layer into the polycrystalline silicon layer, thereby forming a dopant diffusion portion in the polycrystalline silicon layer.
  • the first doping layer 122 includes an intrinsic portion 1221 and a dopant diffusion portion 1222, wherein the intrinsic portion 1221 is located on the surface of the first tunneling layer 121 away from the substrate 110.
  • the heat treatment can be understood as the process of forming electrode openings or electrode grooves by laser patterning.
  • the laser patterning process generates a large amount of heat, which acts on the polycrystalline silicon layer 130 and is transferred to the first doping layer 122, causing the dopant elements of the first doping layer 122 to diffuse into the polycrystalline silicon layer 130, thereby forming the dopant diffusion portion 1222 in the polycrystalline silicon layer 130.
  • the heat treatment is not limited to the examples described in this application, and other processes can also be used to achieve the heat treatment to form the dopant diffusion portion 1222 in the polycrystalline silicon layer 130.
  • the first electrode 170 may be formed to electrically contact the doped diffusion portion 1222 to transmit the current collected by the doped diffusion portion 1222 .
  • the first doped layer can be diffused into the polysilicon layer to form a doped diffusion portion, which can be electrically connected to the first electrode.
  • the doped diffusion portion can collect current and transmit the collected current to the first electrode through the doped diffusion portion, thereby avoiding a short circuit between the first doped layer and the second doped layer in the second region, thereby reducing electrical losses and improving the photoelectric conversion efficiency of the solar cell.
  • the polycrystalline The silicon layer includes intrinsic polysilicon.
  • the formation of intrinsic polysilicon can make the first doping layer diffuse into the polysilicon layer, forming uniform doping in the doping diffusion part, reducing the requirement for the thickness of the first doping layer, reducing the optical loss in the first doping layer, and further improving the photoelectric conversion efficiency of the battery.
  • the solar cell fabrication method before forming a polysilicon layer on at least a portion of the surface of the passivation contact layer facing away from the substrate, the solar cell fabrication method further includes forming a second tunneling layer on the surface of the first doped layer facing away from the substrate.
  • the first doped layer 122 is exposed. Oxygen in the environment causes an oxidation reaction on the exposed surface of the first doped layer 122, forming the second tunneling layer 123.
  • a second tunneling layer is formed on the surface of the first doped layer close to the polysilicon layer.
  • the second tunneling layer is located between the first doped layer and the polysilicon layer, and can be naturally formed under the process preparation environment.
  • the second tunneling layer formed can reduce the diffusion of the doping elements in the first doped layer to the polysilicon layer under low temperature conditions, and at the same time can reduce the mutual transmission of current between the first doped layer and the polysilicon layer, thereby improving the photoelectric conversion efficiency of the solar cell.
  • the step of providing a substrate includes providing a base, the base including a first surface and a second surface disposed opposite to each other, and the step of sequentially stacking a first diffusion layer, a first tunneling layer, and a first doping layer on the first surface of the base in a direction away from the second surface.
  • the substrate in the embodiment of the present application further includes a first diffusion layer formed before the first tunneling layer is formed.
  • a method such as plasma-enhanced chemical vapor deposition (PECVD) can be used to deposit relevant diffusion materials on the first surface S1 of the base 110 to form the first diffusion layer 112.
  • PECVD plasma-enhanced chemical vapor deposition
  • a first tunneling layer 121 and a first doping layer 122 are sequentially formed on the surface of the first diffusion layer 112 away from the base 110.
  • the first diffusion layer 112 between the first doping layer 122 and the polysilicon layer 130 , diffusion of the doping elements in the substrate and the doping elements in the first doping layer can be improved.
  • the solar cell manufacturing method further includes the steps of forming an insulating layer on the surface of the first doped layer away from the first tunneling layer, and removing a portion of the first diffusion layer, the first tunneling layer, the first doped layer, and the insulating layer to expose the second region of the substrate.
  • the insulating layer 190 and the polysilicon layer 130 can be manufactured using the same process equipment.
  • the insulating layer 190 can be formed on the side of the polysilicon layer 130 away from the second tunneling layer 123, and then patterned to remove a portion of the first diffusion layer 112, the first tunneling layer 121, the first doped layer 122, and the insulating layer 190 to expose the second region B of the substrate.
  • the insulating layer 190 can be completely removed. If completely removed, the resulting solar cell has no insulating layer between the polysilicon layer 130 and the first passivation layer 140, which can reduce electrical losses in the contact area between the first doped layer and the second doped layer.
  • the insulating layer 190 can be partially removed to retain the insulating layer 190 between the polysilicon layer 130 and the first passivation layer 140. This can increase protection for the polysilicon layer and the first doped layer, and can also reduce or eliminate the short-circuit effect between adjacent electrodes.
  • the solar cell preparation method further includes the steps of sequentially forming a second diffusion region, a second passivation layer, and an anti-reflection layer on the second surface of the substrate.
  • the second diffusion region 101 can be formed simultaneously with the first diffusion layer 112, and the second diffusion region 101 is formed on the second surface S2 of the substrate 110.
  • the formation principle of the second diffusion region 101 is the same as the formation principle of the first diffusion layer 112, and will not be repeated here.
  • a second passivation layer 102 and an anti-reflection layer 103 can be sequentially deposited on the side of the second diffusion region 101 away from the substrate.
  • the fill factor of the solar cell can be improved; in addition, the adjustment space for the size ratio of the first electrode and the second electrode can be increased, and more space can be reserved for laser patterning, thereby reducing the requirements for the laser beam during the laser patterning process.
  • FIG23 is a schematic diagram of the structure of a photovoltaic module provided in an embodiment of the present application.
  • this embodiment provides a photovoltaic module 200 comprising at least one cell string 210 , each cell string 210 comprising at least two solar cells 100 according to any of the aforementioned embodiments, each solar cell 100 being connected together by serial welding.
  • multiple solar cells can be connected in series by welding ribbons, so that the electricity generated by a single solar cell can be collected for subsequent transmission.
  • the solar cells can be arranged at intervals or in a stacked manner. The tiles are stacked together.
  • the photovoltaic module 200 further includes an encapsulation layer and a cover plate (not shown), the encapsulation layer is used to cover the surface of the battery string 210, and the cover plate is used to cover the surface of the encapsulation layer away from the battery string 210.
  • the solar cells are electrically connected in the form of a whole piece or multiple pieces to form a plurality of battery strings 210, and the plurality of battery strings 210 are electrically connected in series and/or in parallel.
  • the plurality of battery strings 210 can be electrically connected by a conductive tape.
  • the encapsulation layer covers the surface of the solar cell.
  • the encapsulation layer can be an organic encapsulation film such as an ethylene-vinyl acetate copolymer film, a polyethylene octene co-elastomer film or a polyethylene terephthalate film.
  • the cover plate can be a cover plate with a light-transmitting function such as a glass cover plate or a plastic cover plate.
  • This embodiment provides a photovoltaic system (not shown), including the aforementioned photovoltaic components.
  • the photovoltaic system can be used in photovoltaic power stations, such as ground power stations, rooftop power stations, water surface power stations, etc., and can also be used in equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc.
  • the application scenarios of the photovoltaic system are not limited to this, that is, the photovoltaic system can be used in all fields that require solar energy to generate electricity.
  • the photovoltaic system may include a photovoltaic array, a junction box and an inverter.
  • the photovoltaic array can be an array combination of multiple photovoltaic components.
  • multiple photovoltaic components can form multiple photovoltaic arrays.
  • the photovoltaic array is connected to the junction box.
  • the junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter to convert it into the alternating current required by the mains power grid and then connected to the mains power network to achieve solar power supply.

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Abstract

本申请涉及一种太阳能电池及其制作方法、光伏组件及光伏系统。太阳能电池包括：基底(110)，包括相对设置的第一表面(S1)和第二表面(S2)；其中，第一表面(S1)具有在第一方向上相邻的第一区域(A)和第二区域(B)；钝化接触层(120)，位于第一表面(S1)的第一区域(A)；多晶硅层(130)，位于至少部分钝化接触层(120)远离基底(110)一侧的表面；钝化接触层(120)包括第一隧穿层(121)和第一掺杂层(122)，第一隧穿层(121)和第一掺杂层(122)在基底(110)第一表面(S1)的第一区域(A)上向远离第二表面(S2)的方向依次层叠；第一钝化层(140)，位于多晶硅层(130)远离钝化接触层(120)一侧的表面，以及位于第一表面(S1)的第二区域(B)上。

Description

太阳能电池及其制作方法、光伏组件及光伏系统
相关申请
本申请要求2024年3月21日申请的，申请号为2024103251946，名称为“太阳能电池及其制作方法、光伏组件及光伏系统”的中国专利申请的优先权，在此将其全文引入作为参考。
技术领域
本申请涉及太阳能电池技术领域，特别是涉及一种太阳能电池及其制作方法、光伏组件及光伏系统。
背景技术
随着光伏技术的快速发展，晶体硅太阳能电池的转换效率逐年提高。背接触电池(Back Contact，BC)电池技术被认为是未来晶体硅太阳能电池技术的发展方向。目前，BC电池的类型主要有TBC、HPBC、HBC等，是将PN结和金属接触挪到电池背面，使得正面没有电极遮挡，电池吸收太阳光照射的面积更大，从而提高了转换效率，能发出更多的电量。
相关技术中，BC电池的制作过程中，在利用激光图形化的过程中会对钝化接触结构中的掺杂多晶硅产生激光损伤，从而降低了太阳能电池的效率。
发明内容
根据本申请的各种实施例，提供一种太阳能电池及其制作方法、光伏组件及光伏系统。
本申请实施例第一方面提供一种太阳能电池，包括：
基底，包括相对设置的第一表面和第二表面；其中，所述第一表面具有在第一方向上相邻的第一区域和第二区域；
钝化接触层，位于所述第一表面的第一区域；所述钝化接触层包括第一隧穿层和第一掺杂层，所述第一隧穿层和所述第一掺杂层在所述基底第一表面的第一区域上向远离所述第二表面的方向依次层叠；
多晶硅层，位于至少部分所述钝化接触层远离所述基底一侧的表面；以及
第一钝化层，位于所述多晶硅层远离所述钝化接触层一侧的表面，以及位于所述第一表面的第二区域上。
本申请实施例第二方面提供一种太阳能电池的制作方法，包括：
提供一基片；其中，所述基片包括基底和钝化接触层；其中，所述基底包括相对设置的第一表面和第二表面，所述第一表面包括所述第一表面具有在第一方向上相邻的第一区域和第二区域；所述钝化接触层位于所述第一表面的第一区域；所述钝化接触层包括第一隧穿层和第一掺杂层，所述第一隧穿层和所述第一掺杂层在所述基底第一表面的第一区域向远离所述第二表面的方向依次层叠；
于至少部分所述钝化接触层远离所述基底一侧的表面形成多晶硅层；以及
于所述多晶硅层远离所述钝化接触层一侧的表面和所述基底第一表面的第二区域上形成第一钝化层。
本申请实施例第三方面提供一种光伏组件，包括至少一个电池串，电池串包括至少两个上述的太阳能电池，或，所述电池串包括至少两个如前述太阳能电池的制作方法制备而成的太阳能电池。
本申请实施例第四方面提供一种光伏系统，包括上述的光伏组件。
上述的太阳能电池及其制作方法、光伏组件及光伏系统的有益效果：
本申请实施例提供的太阳能电池包括基底、钝化接触层、多晶硅层和第一钝化层，其中，对多晶硅层设置在钝化接触层和第一钝化层之间，这样，在后续激光工艺过程中，激 光可直接作用在多晶硅层上，可以降低对钝化接触层的掺杂多晶硅引入的损失，也可以避免激光对钝化接触层产生激光损伤，进而可以提高太阳能电池的光电转换效率。
本公开的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其他特征、目的和有点将从说明书、附图以及权利要求变得明显。
附图说明
为了更清楚地说明本申请实施例或传统技术中的技术方案，下面将对实施例或传统技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本申请的实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据公开的附图获得其他的附图。
图1为本申请实施例一提供的太阳能电池的结构示意图之一；
图2为本申请实施例提供的太阳能电池的俯视结构图；
图3为本申请实施例提供的太阳能电池的示意图之二；
图4为本申请实施例提供的太阳能电池的示意图之三；
图5为本申请实施例提供的太阳能电池的示意图之四；
图6为本申请实施例提供的太阳能电池的示意图之五；
图7为本申请实施例提供的太阳能电池的示意图之六；
图8为本申请实施例提供的太阳能电池的示意图之七；
图9为本申请实施例提供的太阳能电池的示意图之八；
图10为本申请实施例提供的太阳能电池的示意图之九；
图11为本申请实施例提供的太阳能电池的示意图之十；
图12为本申请实施例提供的太阳能电池的示意图之十一；
图13为本申请实施例提供的太阳能电池的示意图之十二；
图14为本申请实施例提供的太阳能电池的制作方法流程示意图；
图15为本申请实施例提供的太阳能电池的制作方法中的太阳能电池的剖视示意图；
图16为本申请实施例提供的太阳能电池的制作方法中形成透明导电层的结构示意图；
图17为本申请实施例提供的太阳能电池的制作方法中形成电极开口的示意图；
图18为本申请另一实施例提供的太阳能电池的制作方法中形成透明导电层的示意图；
图19为本申请实施例提供的太阳能电池的制作方法中形成第二隧穿层的示意图；
图20为本申请实施例提供的太阳能电池的制作方法中形成第一扩散层的结构示意图；
图21为本申请实施例提供的太阳能电池的制作方法中形成绝缘层的结构示意图；
图22为本申请实施例提供的太阳能电池的制作方法中在基片上形成第二扩散区域、第二钝化层和减反射层的示意图；
图23为本申请实施例提供的光伏组件的结构示意图。
附图标号说明：
110-基底；S1-第一表面；S2-第二表面；A-第一区域；B-第二区域；
112-第一扩散层；120-钝化接触层；121-第一隧穿层；122-第一掺杂层；1221-本征部；
1222-掺杂扩散部；123-第二隧穿层；130-多晶硅层；140-第一钝化层；150-第二掺杂层；160-透明导电层；
170-第一电极；180-第二电极；190-绝缘层；
101-第二扩散区域、102-第二钝化层；103-减反射层；104-隔离槽；
200-光伏组件；210-电池串。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本 申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
为使本申请的上述目的、特征和优点能够更加明显易懂，下面结合附图对本申请的具体实施方式做详细的说明。在下面的描述中阐述了很多具体细节以便于充分理解本申请。但是本申请能够以很多不同于在此描述的其它方式来实施，本领域技术人员可以在不违背本申请内涵的情况下做类似改进，因此本申请不受下面公开的具体实施例的限制。
在本申请的描述中，需要理解的是，术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”、“轴向”、“径向”、“周向”等指示的方位或位置关系为基于附图所示的方位或位置关系，仅是为了便于描述本申请和简化描述，而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作，因此不能理解为对本申请的限制。
此外，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本申请的描述中，“多个”的含义是至少两个，例如两个，三个等，除非另有明确具体的限定。
在本申请中，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”、“固定”等术语应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或成一体；可以是机械连接，也可以是电连接；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系，除非另有明确的限定。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
在本申请中，除非另有明确的规定和限定，第一特征在第二特征“上”或“下”可以是第一和第二特征直接接触，或第一和第二特征通过中间媒介间接接触。而且，第一特征在第二特征“之上”、“上方”和“上面”可是第一特征在第二特征正上方或斜上方，或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”可以是第一特征在第二特征正下方或斜下方，或仅仅表示第一特征水平高度小于第二特征。
需要说明的是，当元件被称为“固定于”或“设置于”另一个元件，它可以直接在另一个元件上或者也可以存在居中的元件。当一个元件被认为是“连接”另一个元件，它可以是直接连接到另一个元件或者可能同时存在居中元件。本文所使用的术语“垂直的”、“水平的”、“上”、“下”、“左”、“右”以及类似的表述只是为了说明的目的，并不表示是唯一的实施方式。
下面结合附图说明本申请实施例的太阳能电池及其制作方法、光伏组件及光伏系统。
图1为本申请实施例提供的太阳能电池的结构示意图之一。参考图1，本申请实施例提供一种太阳能电池。在本申请实施例中，为了便于说明，以太阳能电池为背接触晶硅异质结太阳电池(Heterojunction Back Contact，HBC)为例进行说明。其中，太阳能电池可包括基底110、钝化接触层120、多晶硅层130和第一钝化层140。
基底110，包括相对设置的第一表面S1和第二表面S2；其中，第一表面S1具有在第一方向D1上相邻的第一区域A和第二区域B。可以理解的是，基底110具有在第二方向D2(即太阳能电池的厚度方向)上相对的第一表面S1(或背光面)和第二表面S2(或受光面)。受光面和背光面也可以理解为是太阳能电池面向太阳光和背向太阳光的最外侧两个表面。在本申请实施例中，第一区域A和第二区域B可以齐平设置，也可以不齐平设置。可选地，第一区域A所在基底110与第二区域B所在基底110之间具有一台阶。其中，第一区域A所在基底110的厚度大于或等于第二区域B所在基底110的厚度。
基底110用于接收入射光线并产生光生载流子。基底110包括但不限于以硅或锗等为材料的掺杂半导体衬底、或者碳化硅、硅锗、砷化镓、磷化铟、氧化锌或氧化镓等的掺杂 化合物半导体衬底。示例性地，在本申请实施例中，基底110的材料可选用掺杂单晶硅材料。进一步地，基底110的掺杂元素类型可以为N型，N型元素例如可以为磷、砷或者锑中的任意一种元素；基底110的掺杂元素类型也可以为P型，P型元素例如可以为硼元素和镓元素。在本申请实施中，基底110的第一表面S1和第二表面S2也会基于电池膜层等特征的形貌而具有一定的形貌变化。例如，受光面可为绒面结构；而背光面的部分可以为平面结构，背光面的另一部分也可为绒面结构。
钝化接触层120，位于第一表面S1的第一区域A。可以理解，钝化接触层120位于基底110的背光面的第一区域A。钝化接触层120可以降低载流子在基底110表面的复合，从而增加太阳能电池的开路电压，提升太阳能电池的光电转化效率。其中，钝化接触层120可包括第一隧穿层121和第一掺杂层122，第一隧穿层121和第一掺杂层122在基底110第一表面S1的第一区域A上向远离第二表面S2的方向依次层叠。第一隧穿层121用于实现基底110第一表面S1的界面钝化，起到化学钝化的效果。其中，通过饱和基底110表面的悬挂键，降低基底110的第一表面S1的界面缺陷态密度，从而减少基底110的第一表面S1的复合中心来降低载流子复合速率。其中，第一隧穿层121的厚度小于或等于3纳米。第一隧穿层121的材料可以为电介质材料，例如为氧化硅、非晶硅、多晶硅、碳化硅、氮化硅、氮氧化硅、氧化铝或者氧化钛中的至少一种。其中，电介质材料中可以含有与基底110的掺杂元素类型相同的掺杂元素。
第一掺杂层122的厚度大于或等于20纳米，且不大于600纳米。第一掺杂层122的材料可以为掺杂多晶硅，或者含有氧、碳、氮元素中的至少一种元素的掺杂多晶硅。其中，第一掺杂层122的掺杂类型可以与基底110的掺杂类型相同，或者相反。
多晶硅层130，位于至少部分钝化接触层120远离基底110一侧的表面。其中，第一隧穿层121、第一掺杂层122、多晶硅层130在第一表面S1上向远离第二表面S2的方向依次层叠设置。其中，多晶硅层130的材料可为本征多晶硅。可选地，多晶硅层130的掺杂元素包括氧、碳和氮元素中的至少一种元素。多晶硅层130的厚度为3纳米至150纳米。
在本申请实施例中，通过在第一掺杂层122和第一钝化层140之间形成多晶硅层130，其可在激光工艺过程中激光作用在多晶硅层130，例如，本征poly-Si上，降低了对第一掺杂层122的poly-Si引入的损失，提高了电池的转换效率。同时，通过设置多晶硅层130(例如，本征poly-Si)可以在第一掺杂层122的接触区域形成均匀的掺杂，减少了对第一掺杂层122厚度的需求，使得在第一掺杂曾的光学损失降低，提高了电池效率。
第一钝化层140，位于多晶硅层130远离钝化接触层120一侧的表面，以及位于第一表面S1的第二区域B上。其中，第一钝化层140的厚度范围为3至15纳米。第一钝化层140的材料可以包括本征非晶硅，或第一钝化层的材料掺杂有氧、碳和氮元素中的至少一种元素，例如，含有氧、碳和氮元素中的至少一种元素的非晶硅。
本申请实施例提供的太阳能电池包括基底、钝化接触层、多晶硅层和第一钝化层，其中，对多晶硅层设置在钝化接触层和第一钝化层之间，这样，在后续激光工艺过程中，激光可作用在多晶硅层上，可以降低对钝化接触层的掺杂多晶硅引入的损失，也可以避免激光对钝化接触层产生激光损伤，进而可以提高太阳能电池的光电转换效率。
图2为本申请实施例提供的太阳能电池的俯视结构图，图3本申请实施例提供的太阳能电池的示意图之二。参考图3，在前述实施例的基础上，本实施例提供的太阳能电池还可包括第二掺杂层150、透明导电层160、第一电极170和第二电极180。其中，第二掺杂层150位于第一钝化层140远离多晶硅层130一侧的表面。第二掺杂层150的材料可包括掺杂非晶硅或微晶硅，或含有氧、碳、氮元素中的至少一种元素的掺杂非晶硅或微晶硅。其中，第二掺杂层150的掺杂类型与第一掺杂层122的掺杂类型相反。在本实施例中，第二掺杂层150的厚度范围为3至60纳米。在本申请实施例中，第一钝化层140和第二掺杂层150分别由第一区域A所在的空间延伸至第二区域B所在的空间。可以理解，第一钝化层140覆盖在多晶硅层130和基底110第二表面S2的第二区域B上，第二掺杂层150 覆盖在第一钝化层140远离基底110的一侧。
透明导电层160，位于第二掺杂层150远离第二掺杂层150一侧的表面。其中，透明导电层160的厚度大于等于10纳米且小于等于200纳米。透明导电层160的材料可以为氧化锌ZnO、氧化铟InO和氧化锡SnO中的一种或多种。透明导电材料中可掺杂有镓元素Ga、锡元素Sn、钼元素Mo、铈元素Ce、氟元素F、钨元素W和铝元素Al中的一种或多种。
第一电极170，位于第一区域，自透明导电层160至少延伸贯穿至多晶硅层130，第一电极170的第一端与第一掺杂层122电接触，第一电极170的第二端与位于第一区域A的透明导电层160接触设置。可以理解的是，第一电极170可由透明导电层160延伸贯穿至多晶硅层130，其可通过透明导电层160与第一掺杂层122电接触，也可以由透明导电层160延伸贯穿至第一掺杂层122，以使第一电极170与第一掺杂层122直接接触。
第二电极180，位于第二区域，其中，第二电极180与透明导电层160接触设置。可以理解，第二电极180朝向基底110的投影位于第二区域B。其中，透明导电层160开设有隔离槽104，其隔离槽104设置在第一电极170和第二电极180之间，并贯穿至少贯穿至透明导电层160。可选地，隔离槽104可贯穿至第一钝化层140、第二掺杂层150和透明导电层160，以使第一电极170与第二电极180绝缘设置。进一步地，隔离槽104位于所述第一区域。可选地，隔离槽104位于所述第二区域。可选地，隔离槽104位于横跨所述第一区域和所述第二区域的交界处。
在本申请实施例中，第一电极170和第二电极180的材料包括但不限于铝Al、钛Ti、镍Ni、钴Co、银Ag、铜Cu以及锡Sn中的一种或多种。第一电极170和第二电极180的形成方式可包括丝网印刷、激光转印及电镀中的一种。在本申请实施例中，第一电极170和第二电极180可理解为金属栅线，对金属栅线的宽度厚度不做限定。
下面结合图3-图6来介绍第一电极170与第一掺杂层122的电接触。
参考图3，透明导电层160可位于第二掺杂层150远离第一钝化层140一侧的表面上。其中，透明导电层160可包括一体成型的透明导电层A段和透明导电层B段。其中，透明导电层A段朝向基底110的投影落入基底110第一表面S1的第一区域A，透明导电层B段朝向基底110的投影落入基底110第一表面S1的第二区域B。在图3中，透明导电层A段层叠于第二掺杂层150上。其中，第一电极170自透明导电层160延伸贯穿至第一掺杂层122，第一电极170与第一掺杂层122接触设置。第一电极170可延伸贯穿至第一掺杂层122与多晶硅层130的交接面，以与第一掺杂层122接触设置。可选地，第一电极170可延伸贯穿至第一掺杂层122内部，以与第一掺杂层122接触设置。在本实施例中，可在透明导电层160、第二掺杂层150和第一钝化层140中形成电极开口，其中，电极开口的口底至少部分为第一掺杂层122，第一电极170位于电极开口以与第一掺杂层122电接触。其中，第一电极170可包括第一电极部171和第二电极部172，其中，第一电极部171位于电极开口内，第一电极部171的第一端与第一掺杂层122接触设置，可以理解为，第一电极部171自透明导电层160延伸贯穿至第一掺杂层122，第一电极部171的第一端与第一掺杂层122接触设置，第一电极部171的第二端与第二电极部172接触设置，且第二电极部172外露于透明导电层A段。
可选地，参考图4，第一掺杂层122包括本征部1221和掺杂扩散部1222，其中，本征部1221位于第一隧穿层121远离基底110一侧的表面，多晶硅层130位于本征部1221远离第一掺杂层122的表面；掺杂扩散部1222位于本征部1221远离第一隧穿层121一侧的部分表面，且沿基底110指向第一钝化层140的方向扩散至多晶硅层130；掺杂扩散部1222与第一电极170接触。
在一实施例中，掺杂扩散部1222可贯穿多晶硅层130。可选地的，掺杂扩散部1222可扩散至多晶硅层130内部，并未贯穿多晶硅层130。其中，掺杂扩散部1222可理解为与第一电极170接触的接触区，该接触区的掺杂多晶硅掺杂有与基底110的掺杂类型相同，或者相反的掺杂元素。掺杂扩散部1222的形成，可由太阳能电池制备过程中，通过激光 工艺形成电极开口的过程中产生的热量，使得第一掺杂层122的掺杂元素向所述多晶硅层130中扩散，以在多晶硅层130中形成的扩散部。
在本实施例中，第一掺杂层还包括扩散至多晶硅层的掺杂扩散部，其掺杂扩散部能够与第一电极电连接，这样，掺杂扩散部可以收集电流，以通过掺杂扩散部将收集的电流传输至第一电极，降低或消除相邻电极之间的短路效应，进而可降低电学损失，以提高太阳能电池的光电转化效率。另外，多晶硅层中包括本征多晶硅，其本征多晶硅的引入可以在第一掺杂层的掺杂扩散部形成均匀的掺杂，减少了对第一掺杂层厚度的需求，使得在第一掺杂层的光学损失降低，可进一步提高电池光电转化效率。
参考图5和图6，本实施例提供的太阳能电池中的透明导电层160与图3和图4所示的太阳能电池的透明导电层160的结构不同。本实施例中，第二掺杂层150和第一钝化层140中设有电极槽，电极槽的槽底至少部分为第一掺杂层122。其中，透明导电层160位于第二掺杂层150远离第一钝化层140一侧的表面，以及电极槽的槽底和槽壁上。其中，第一电极170的部分位于电极槽内，以与第一掺杂层122电接触，第一电极170的其余部分外露于电极槽外与电极槽外的透明导电层160电接触。第一电极170的第一电极部171位于电极槽内，可通过位于槽底的透明导电层160与第一掺杂层122电连接。第一电极170的第二电极部172外露于透明导电层160，以与外部供电设备连接。
参考图5和图6，位于电极槽槽底的透明导电层160全部与第一掺杂层122接触设置，这样内置在电极槽的第一电极170可与第一掺杂层122直接电接触。在本申请实施例中，如图5所示，位于电极槽槽底的透明导电层160与第一掺杂层122的接触面可为第一掺杂层122与多晶硅层130的部分接触面。可选地，如图6所示，位于电极槽槽底的透明导电层160与第一掺杂层122的接触面延伸至第一掺杂层122的内部。
参考图7，位于电极槽槽底的透明导电层160可与扩散至多晶硅层130的掺杂扩散部接触，以使第一电极170通过透明导电层160与第一掺杂层122的掺杂扩散部电接触。在本申请实施例中，位于电极槽槽底的透明导电层160与第一掺杂层122的接触面可基于掺杂扩散部的扩散深度来确定。示例性地，位于电极槽槽底的透明导电层160与第一掺杂层122的接触面可为第二掺杂层150与多晶硅层130的部分接触面，也可以延伸至多晶硅层130的内部。
在实施例中，第一电极通过透明导电层与第一掺杂层电连接或电接触，可以提高第一掺杂层与第一电极的电接触稳定性，以提成传输电流的稳定性，进而可提高太阳能电池的效率。
参考图8-图11，在前述任一实施例的基础上，太阳能电池还可包括绝缘层190。绝缘层190位于多晶硅层130远离钝化接触层120一侧的表面，且位于多晶硅层130与第一钝化层140之间。绝缘层190的材料可包括氧化硅层、氮化硅层和氮氧化硅层中的至少一种。其中，绝缘层190的材料中还可包括与第一掺杂层122的材料相同的掺杂元素。在本申请实施例中，绝缘层190的大于或等于1.5纳米。需要说明的是，在本申请实施例中，绝缘层190也可以保留，也可以去除，可以根据实际制备需求来设定。
在本实施例中，太阳能电池中若去除绝缘层190，其可以降低第一掺杂层与第二掺杂层接触区的电学损失。可选地，太阳能电池中若保留绝缘层190，其可以增加对多晶硅层、第一掺杂层的保护。
参考图12，在前述实施例的基础上，本实施例提供的太阳能电池还可包括第二隧穿层123。其中，第二隧穿层123位于所述第一掺杂层122远离所述第一隧穿层121一侧的表面，且位于所述第一掺杂层122与所述多晶硅层130之间。在本申请实施例中，第二隧穿层123可在第一掺杂层122在制备过程中自然氧化而成。可选地，第二隧穿层123也可以通过化学气相沉积而成。第二隧穿层123的材料可包括氧化硅、氮氧化硅、氧化铝或者氧化钛中的至少一种。
可选地，多晶硅层130靠近第二隧穿层123的区域为轻掺杂区域，其中，轻掺杂区域 的掺杂类型与所述第一掺杂层122的掺杂类型相同。进一步地，在多晶硅层130内，轻掺杂区域的掺杂浓度沿第一隧穿层121向第一钝化层140的方向递减，直至掺杂浓度为零。
在本申请实施例中，通过在第一掺杂层和多晶硅层之间设置第二隧穿层，可以在工艺流程中自然形成，其第二隧穿层可减少第一掺杂层中的掺杂元素在低温情况下，向多晶硅层的扩散，同时可以减少第一掺杂层与多晶硅层之间的电流的相互传输，进而可提高太阳能电池的光电转换效率。
在前述任一实施例的基础上，请继续参考图8-图13，本申请实施例提供的太阳能电池还可包括第一扩散层112。其中，第一扩散层112位于第一表面S1的第一区域A，且位于基底110与第一隧穿层121之间。
进一步地，第一扩散层112包括晶体硅基底，其中，晶体硅基底的掺杂元素的掺杂导电类型与第一掺杂层122中的掺杂元素的导电类型相同，且晶体硅基底的掺杂元素的掺杂浓度小于或等于第一掺杂层122中的掺杂元素的掺杂浓度。第一掺杂晶体硅的掺杂元素的扩散深度大于或等于10纳米，且小于或等于1500纳米。
在本申请实施例中，通过在第一掺杂层122和多晶硅层130之间设置第一扩散层112，可以提高基底中掺杂元素的扩散。
可选地，请继续参考图8-图13，本申请实施例提供的太阳能电池相对于前述任一实施例，其太阳能电池还可包括第二扩散区域101。
进一步地，第二扩散区域101的材料包括第二掺杂晶体硅，其中，第二掺杂晶体硅的掺杂浓度大于基底110中的掺杂元素的掺杂浓度。第二掺杂晶体硅的掺杂元素的扩散深度大于或等于10纳米，且小于或等于1500纳米。通过设置第二扩散区域，可以提高太阳能电池的填充因子；另外，可以增加第一电极和第二电极尺寸比例的调节空间，可以预留出更多进行激光图形化的空间，进而可以降低激光图形化过程中对激光光束的要求。
在其中一个实施例中，请继续参考图8-图13，太阳能电池还包括：钝化减反层，位于基底110的第二表面的钝化减反层。其中，钝化减反层包括：层叠在基底110第二表面第二钝化层102和减反射层103。其中，第二钝化层102可以采用单层结构或者多层结构，第二钝化层102的材料可以为氧化铝、氧化硅、氮化硅和氮氧化硅中的至少一者。可选地，第二钝化层102的材料还可以为本征非晶硅，或含有氧、碳、氮元素中的至少一种元素的非晶硅。第二钝化层102的厚度可大于或等于1.5纳米。另外，第二钝化层102可以通过化学沉积的方式形成。第二钝化层102在太阳能电池中起到表面钝化作用，可以对基底110表面的悬挂键进行较好的化学钝化。
减反射层103可以采用单层结构或多层结构。多层结构的减反射层103中，各层的材料可以为氧化硅、氮化硅或者氮氧化硅等材料。减反射层103的厚度可大于或等于40纳米。减反射层103位于太阳能电池的背光面，在太阳能电池背面起到减反射效果。可选地，在其他实施例中，减反射层103可省略。
图14为本申请实施例四提供的太阳能电池的制作方法的流程示意图。
本实施例提供一种太阳能电池的制作方法，该方法用于制作出以上任一实施例中的太阳能电池。太阳能电池的结构、功能、工作原理等已经在实施例一中进行过详细说明，此处不再赘述。在其中一个实施例中，图15为一个实施例中太阳能电池的制备方法的流程图。其中，太阳能电池的制作方法包括步骤1410-步骤1430。
步骤1410，提供一基片。
参考图15，基片包括基底110和钝化接触层。其中，基底110包括相对设置的第一表面S1和第二表面S2，第一表面S1包括第一表面S1具有在第一方向上相邻的第一区域A和第二区域B。基底110包括但不限于以硅或锗等为材料的掺杂半导体衬底、或者碳化硅、硅锗、砷化镓、磷化铟、氧化锌或氧化镓等的掺杂化合物半导体衬底。可选地，还可以对提供的基底110的部分表面进行制绒处理。示例性地，以基底110为掺杂单晶硅衬底为例进行说明。硅衬底在低浓度碱液中反应的各向异性腐蚀特性，形成金字塔绒面。进一步地， 还可以去除硅衬底表面脏污以及去除切割损伤层，这样可以降低反射率，增加硅衬底对太阳光的吸收。
在本申请实施例中，可以采用等离子体增强化学气相沉积(plasma enhanced chemical vapor deposition，PECVD)方式于基底110的第一表面S1形成钝化接触层。可以理解，钝化接触层形成于基底110的背光面。进一步地，钝化接触层可包括第一隧穿层121和第一掺杂层122，第一隧穿层121和第一掺杂层122在基底110第一表面S1上向远离第二表面S2的方向依次沉积而成。第一隧穿层121用于实现基底110第一表面S1的界面钝化，起到化学钝化的效果。其中，通过饱和基底110表面的悬挂键，降低基底110的第一表面S1的界面缺陷态密度，从而减少基底110的第一表面S1的复合中心来降低载流子复合速率。
步骤1420，于钝化接触层远离基底一侧的表面形成多晶硅层。
请继续参考图15，其中，可以采用PECVD方式于第一掺杂层122第一隧穿层121的一侧表面形成多晶硅层130。其中第一隧穿层121、第一掺杂层122、多晶硅层130于基底110的第一表面S1上向远离第二表面S2的方向依次形成沉积而成。需要说明的是，多晶硅层130的形成工艺不限于本申请实施例的举例说明，还是采用其他工艺方式形成。
步骤1430，于多晶硅层远离钝化接触层一侧的表面和基底第一表面的第二区域上形成第一钝化层。
请继续参考图15，可继续对步骤1420所得结构进行背面图形化处理，去除部分钝化接触层120和多晶硅层130，露出基底110，以得到基底第一表面的第二区域。
于多晶硅层130远离钝化接触层120(第一掺杂层122远离第一隧穿层121)一侧的表面和基底第一表面的第二区域上形成第一钝化层140。可选地，太阳能电池的制备方法还可包括对背面图形化处理后的结构进行清洗处理。清洗处理后再形成第一钝化层140。在本申请实施例中，可以采用PECVD、等离子增强原子层沉积PEALD或原子层沉积ALD等方式，于多晶硅层130远离钝化接触层120一侧的表面和基底第一表面的第二区域上沉积相关钝化材料，例如，本征非晶硅，或含有氧，碳，氮元素中的至少一种元素的本征非晶硅，以形成第一钝化层140。
可以理解的是，基底110、第一隧穿层121和第一掺杂层122、多晶硅层130和第一钝化层140的结构、膜层材料、设置范围等已经在前述实施例中进行过详细描述，此处不再赘述。
本申请实施例提供的太阳能电池制备方法，在形成第一钝化层之前，于钝化接触层远离基底一侧的表面形成多晶硅层，这样，在后续激光工艺过程中，激光可作用在多晶硅层上，可以降低对钝化接触层的掺杂多晶硅引入的损失，也可以避免激光对钝化接触层产生激光损伤，进而可以提高太阳能电池的光电转换效率。另外，本申请实施例提供的太阳能电池制备方法在不改变HBC基本工艺的条件下，在制备第一钝化层前，不使用氮源形成多晶硅层，可以进一步有效提升电池的光电转换效率。
在其中一个实施例中，于多晶硅层远离钝化接触层一侧的表面和基底第一表面的第二区域上形成第一钝化层的步骤之后，太阳能电池制备方法还包括：于第一钝化层远离多晶硅层的一侧表面形成第二掺杂层；于第二掺杂层远离第一钝化层的一侧表面形成透明导电层和第一电极；于透明导电层远离所述第一钝化层的一侧表面形成第二电极；其中，所述第二电极位于所述第二区域的步骤。
参考图16，可在图15所示的结构的基础上，可采用PECVD等方式于第一钝化层140远离多晶硅层130的一侧表面沉积相关的导电掺杂材料，以在第一钝化层上形成第二掺杂层150。进一步地，可采用PECVD等方式于第一钝化层140远离多晶硅层130的一侧表面沉积相关的导电透明材料，以在第二掺杂层150上形成透明导电层160。参考图3，基于所得结构，采用激光图形化等方式形成电极开口或电极槽，通过填充电极金属材料，以形成第一电极170。其中，第一电极170自透明导电层160至少延伸贯穿至多晶硅层130， 第一电极170的第一端与第一掺杂层122电接触，第一电极170的第二端与位于第一区域A的透明导电层160接触设置。示例性地，第一电极170位于第一区域，自透明导电层160至少延伸贯穿至多晶硅层130，第一电极170的至少部分与第一掺杂层122和多晶硅层130中的至少一层接触，第一电极170的其余部分与位于第一区域的透明导电层160接触设置，所得结构可参考图3-图4。
在其中一个实施例中，于第二掺杂层远离第一钝化层的一侧表面形成透明导电层和第一电极，包括：于第二掺杂层远离第一钝化层的一侧表面形成透明导电层；于透明导电层、第二掺杂层、第一钝化层内形成电极开口；以及于电极开口内形成第一电极的步骤。其中，电极开口的口底至少部分为第一掺杂层。
参考图17，可采用PECVD等方式于第一钝化层140远离多晶硅层130的一侧表面沉积相关的导电透明材料，以在第二掺杂层150上形成透明导电层160。基于所得结构可于透明导电层160、第二掺杂层150、第一钝化层140和部分多晶硅层130内形成电极开口C，以及在电极开口C中形成第一电极170，所得结构可参考图3-图4。其中，可采用激光图形化工艺形成电极开口C，其中，电极开口C可开至多晶硅层130，其电极开口C内的第一电极170可与扩散至多晶硅层中的掺杂扩散部1222电接触。可选地，电极开口C可以开至第一掺杂层122，其电极开口C内的第一电极170可第一掺杂层122接触。
进一步地，在形成第一电极170前，还可对透明导电层160、第二掺杂层150、第一钝化层140进行图形化处理，以形成隔离槽104。进一步地，在形成第一电极170的同时，还可于透明导电层上形成第二电极180。其中，第一电极170与第二电极180通过隔离槽104实现绝缘设置。
可选地，参考图18，在其中一个实施例中，于第二掺杂层远离第一钝化层的一侧表面形成透明导电层和第一电极，包括：于透明导电层、第二掺杂层、第一钝化层内形成电极槽；于第二掺杂层远离第一钝化层的一侧表面，以及电极槽的槽壁、槽底形成透明导电层；于电极槽内的剩余区域形成第一电极。与前述实施例不同的是，本申请实施例中的透明导电层160在形成电极槽之后形成。其中，可采用激光图形化工艺形成电极槽E，其中，电极槽E可开至多晶硅层130，或可以开至第一掺杂层122。可采用PECVD等方式于第二掺杂层150远离第一钝化层140的一侧表面沉积相关的导电透明材料，以在第二掺杂层150以及电极槽E的槽壁、槽底形成上形成透明导电层。基于所得结构，于电极槽内的剩余区域F形成第一电极170，所得结构可参考图5至图7。
在实施例中，第一电极通过透明导电层与第一掺杂层电连接或电接触，可以提高第一掺杂层与第一电极的电接触稳定性，以提成传输电流的稳定性，进而可提高太阳能电池的效率。
在其中一个实施例中，太阳能电池制备方法还包括对多晶硅层进行激光局域热处理，以使第一掺杂层的掺杂元素向多晶硅层中扩散，在多晶硅层中形成掺杂扩散部的步骤。其中，参考图4和图7，第一掺杂层122包括本征部1221和掺杂扩散部1222，本征部1221位于第一隧穿层121远离基底110一侧的表面。其中，热处理可以理解为采用激光图形化形成电极开口或电极槽的过程中，激光图形化的过程中会产生大量的热量，其热量作用于多晶硅层130并传到至第一掺杂层122，使得第一掺杂层122的掺杂元素向所述多晶硅层130中扩散，以在多晶硅层130中形成的掺杂扩散部1222。需要说明的是，热处理不限于本申请的举例说明，还可以采用其他工艺来实现热处理，以在多晶硅层130中形成的掺杂扩散部1222。这样，形成的第一电极170可与掺杂扩散部1222电接触，以传输掺杂扩散部1222收集的电流。
在本实施例中，在形成第一掺杂层的过程中，可使第一掺杂层扩散至多晶硅层，以形成掺杂扩散部，其掺杂扩散部能够与第一电极电连接，这样，掺杂扩散部可以收集电流，以通过掺杂扩散部将收集的电流传输至第一电极，可以避免第一掺杂层与第二区域的第二掺杂层发生短路，进而可降低电学损失，以提高太阳能电池的光电转化效率。另外，多晶 硅层中包括本征多晶硅，其本征多晶硅的形成，可以使得第一掺杂层向多晶硅层扩散，在掺杂扩散部形成均匀的掺杂，减少了对第一掺杂层厚度的需求，使得在第一掺杂层的光学损失降低，可进一步提高电池光电转化效率。
在其中一个实施例中，于至少部分钝化接触层远离基底一侧的表面形成多晶硅层的步骤之前，太阳能电池制备方法还包括：于第一掺杂层远离基底一侧的表面形成第二隧穿层的步骤。参考图19，在形成多晶硅层130之前，其第一掺杂层122为外露状态，因为环境中的氧气，使得在第一掺杂层122的外露的表层发生氧化反应，以形成第二隧穿层123。
在本申请实施例中，通过在第一掺杂层靠近多晶硅层的表层形成第二隧穿层，在太阳能电池中，第二隧穿层位于第一掺杂层与多晶硅层之间，进而可在工艺制备工艺环境下自然形成，其形成的第二隧穿层可减少第一掺杂层中的掺杂元素在低温情况下，向多晶硅层的扩散，同时可以减少第一掺杂层与多晶硅层之间的电流的相互传输，进而可提高太阳能电池的光电转换效率。
在其中一个实施例中，提供一基片的步骤包括提供基底，基底包括相对设置的第一表面和第二表面，于基底的第一表面向远离第二表面的方向依次层叠形成第一扩散层、第一隧穿层和第一掺杂层的步骤。在前述实施例的基础上，本申请实施例中的基片还包括在第一隧穿层形成之前，形成的第一扩散层。其中，参考图20，在本申请实施例中，可以采用等离子体增强化学气相沉积PECVD等方式于基底110的第一表面S1沉积相关扩散材料，以形成第一扩散层112。进而在第一扩散层112远离基底110的一侧表面依次形成第一隧穿层121和第一掺杂层122。
在本申请实施例中，通过在第一掺杂层122和多晶硅层130之间形成第一扩散层112，可以提高基底中掺杂元素与第一掺杂层中的掺杂元素的扩散。
在其中一个实施例中，于基底的第一表面向远离第二表面的方向依次层叠形成第一扩散层、第一隧穿层和第一掺杂层之后，太阳能电池制备方法还包括：于第一掺杂层远离第一隧穿层的一侧表面形成绝缘层，以及去除部分第一扩散层、第一隧穿层、第一掺杂层和绝缘层，以外露基底的第二区域的步骤。其中，参考图21，绝缘层190和多晶硅层130可利用同一工艺设备制备而成。示例性地，可在多晶硅层130远离第二隧穿层123的一侧形成绝缘层190，进而可图形化，以去除部分第一扩散层112、第一隧穿层121、第一掺杂层122和绝缘层190，以外露基底的第二区域B。
在本申请实施例中，绝缘层190可全部去除，若全部去除，则制备而成的太阳能电池在多晶硅层130和第一钝化层140之间无绝缘层，其可以降低第一掺杂层与第二掺杂层接触区的电学损失。可选地，绝缘层190可部分去除，以保留位于多晶硅层130和第一钝化层140之间的绝缘层190，则可以增加对多晶硅层、第一掺杂层的保护，也可以降低或消除相邻电极之间的短路效应。
在其中一个实施例中，太阳能电池制备方法还包括于基底的第二表面依次形成第二扩散区域、第二钝化层和减发射层的步骤。如图22所示，在本申请实施例中，第二扩散区域101可以与第一扩散层112同步形成，其第二扩散区域101形成在基底110的第二表面S2。第二扩散区域101的形成原理与第一扩散层112的形成原理相同，在此不再赘述。进一步地，在形成第二扩散区域101之后，可在第二扩散区域101远离基底的一侧依次沉积形成第二钝化层102和减反射层103。本申请实施例中，通过形成第二扩散区域，可以提高太阳能电池的填充因子；另外，可以增加第一电极和第二电极尺寸比例的调节空间，可以预留出更多进行激光图形化的空间，进而可以降低激光图形化过程中对激光光束的要求。
图23为本申请实施例提供的光伏组件的结构示意图。参照图23，本实施例提供一种光伏组件200，包括至少一个电池串210，电池串210包括至少两个前述任一实施例中的太阳能电池100，各太阳能电池100之间可以通过串焊的方式连接在一起。
示例性地，多个太阳能电池可通过焊带而串焊在一起，从而将单个太阳能电池产生的电能进行汇集以便进行后续的输送。当然，太阳能电池之间可以间隔排布，也可以采用叠 瓦形式堆叠在一起。
示例性地，光伏组件200还包括封装层和盖板(未图示)，封装层用于覆盖电池串210的表面，盖板用于覆盖封装层远离电池串210的表面。太阳能电池以整片或者多分片的形式电连接形成多个电池串210，多个电池串210以串联和/或并联的方式进行电连接。其中，在一些实施例中，多个电池串210之间可以通过导电带电连接。封装层覆盖太阳能电池的表面。示例地，封装层可以为乙烯-乙酸乙烯共聚物胶膜、聚乙烯辛烯共弹性体胶膜或者聚对苯二甲酸乙二醇酯胶膜等有机封装胶膜。盖板可以为玻璃盖板、塑料盖板等具有透光功能的盖板。
本实施例提供一种光伏系统(未图示)，包括前述的光伏组件。光伏系统可应用在光伏电站中，例如地面电站、屋顶电站、水面电站等，也可应用在利用太阳能进行发电的设备或者装置上，例如用户太阳能电源、太阳能路灯、太阳能汽车、太阳能建筑等等。当然，可以理解的是，光伏系统的应用场景不限于此，也即是说，光伏系统可应用在需要采用太阳能进行发电的所有领域中。以光伏发电系统网为例，光伏系统可包括光伏阵列、汇流箱和逆变器，光伏阵列可为多个光伏组件的阵列组合，例如，多个光伏组件可组成多个光伏阵列，光伏阵列连接汇流箱，汇流箱可对光伏阵列所产生的电流进行汇流，汇流后的电流流经逆变器转换成市电电网要求的交流电之后接入市电网络以实现太阳能供电。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (40)

  1. 一种太阳能电池，所述太阳能电池包括：
    基底，包括相对设置的第一表面和第二表面；其中，所述第一表面具有在第一方向上相邻的第一区域和第二区域；
    钝化接触层，位于所述第一表面的第一区域；所述钝化接触层包括第一隧穿层和第一掺杂层，所述第一隧穿层和所述第一掺杂层在所述基底第一表面的第一区域上向远离所述第二表面的方向依次层叠；
    多晶硅层，位于至少部分所述钝化接触层远离所述基底一侧的表面；以及
    第一钝化层，位于所述多晶硅层远离所述钝化接触层一侧的表面，以及位于所述第一表面的第二区域上。
  2. 根据权利要求1所述的太阳能电池，其中，所述太阳能电池还包括：
    第二掺杂层，位于所述第一钝化层远离所述多晶硅层一侧的表面。
  3. 根据权利要求2所述的太阳能电池，其特征在于，所述太阳能电池还包括：
    透明导电层，位于所述第二掺杂层远离所述第一掺杂层一侧的表面；
    第一电极，位于所述第一区域，自所述透明导电层至少延伸贯穿至所述多晶硅层，所述第一电极的至少部分与所述第一掺杂层和所述多晶硅层中的至少一层接触，所述第一电极的其余部分与位于所述第一区域的所述透明导电层接触设置；
    第二电极，位于所述第二区域，与所述透明导电层接触。
  4. 根据权利要求3所述的太阳能电池，其中，所述第一掺杂层包括本征部和掺杂扩散部，所述掺杂扩散部位于所述第一掺杂层远离所述第一隧穿层一侧的部分表面，且沿所述基底指向所述第一钝化层的方向贯穿所述多晶硅层；所述掺杂扩散部与所述第一电极接触。
  5. 根据权利要求2所述的太阳能电池，其中，在所述第一区域的所述第二掺杂层和所述第一钝化层中设有电极槽，所述电极槽的槽底至少延伸至所述多晶硅层远离第一掺杂层的表面；其中，所述太阳能电池还包括：
    透明导电层，位于所述第二掺杂层远离所述第一钝化层一侧的表面，以及所述第一区域的电极槽的槽底和槽壁上；
    第一电极，位于第一区域，至少部分位于电极槽内，以与所述电极槽槽底的所述透明导电层电接触，所述第一电极的其余部分外露于所述电极槽外与所述电极槽外的所述透明导电层电接触；
    第二电极，位于第二区域，与所述透明导电层接触。
  6. 根据权利要求5所述的太阳能电池，其中，所述第一掺杂层包括本征部和掺杂扩散部，所述掺杂扩散部位于所述第一掺杂层远离所述第一隧穿层一侧的部分表面，且沿所述基底指向所述第一钝化层的方向贯穿所述多晶硅层；所述掺杂扩散部与所述电极槽槽底的所述透明导电层接触。
  7. 根据权利要求3或5所述的太阳能电池，其中，所述太阳能电池还开设有隔离槽，所述隔离槽至少贯穿所述透明导电层，所述隔离槽位于所述第一电极和所述第二电极之间。
  8. 根据权利要求7所述的太阳能电池，其中，所述隔离槽位于所述第一区域。
  9. 根据权利要求7所述的太阳能电池，其中，所述隔离槽位于所述第二区域。
  10. 根据权利要求7所述的太阳能电池，其中，所述隔离槽位于横跨所述第一区域和所述第二区域的交界处。
  11. 根据权利要求2所述的太阳能电池，其中，所述太阳能电池还包括：
    第二隧穿层，位于所述第一掺杂层远离所述第一隧穿层一侧的表面，且位于所述第一掺杂层与所述多晶硅层之间。
  12. 根据权利要求11所述的太阳能电池，其中，所述多晶硅层靠近第二隧穿层的区域为轻掺杂区域，所述轻掺杂区域的掺杂类型与所述第一掺杂层的掺杂类型相同。
  13. 根据权利要求12所述的太阳能电池，其中，在所述多晶硅层内，所述轻掺杂区域 的掺杂浓度沿所述第一隧穿层向所述第一钝化层的方向递减，直至所述掺杂浓度为零。
  14. 根据权利要求2所述的太阳能电池，其中，所述第一掺杂层的掺杂元素包括氧、碳和氮元素中的至少一种元素。
  15. 根据权利要求2所述的太阳能电池，其中，所述第二掺杂层的掺杂元素包括氧、碳和氮元素中的至少一种元素。
  16. 根据权利要求2所述的太阳能电池，其中，所述太阳能电池还包括：
    第一扩散层，位于所述第一表面的第一区域，且位于所述基底与所述第一隧穿层之间。
  17. 根据权利要求16所述的太阳能电池，其中，所述第一扩散层包括晶体硅基底，其中，所述晶体硅基底的掺杂元素的掺杂导电类型与第一掺杂层中的掺杂元素的导电类型相同，且所述晶体硅基底的掺杂元素的掺杂浓度小于或等于所述第一掺杂层中的掺杂元素的掺杂浓度。
  18. 根据权利要求1所述的太阳能电池，其中，所述太阳能电池还包括：
    绝缘层，位于所述多晶硅层远离所述钝化接触层一侧的表面，且位于所述多晶硅层与所述第一钝化层之间。
  19. 根据权利要求1所述的太阳能电池，其中，所述多晶硅层的材料为本征多晶硅。
  20. 根据权利要求1所述的太阳能电池，其中，所述多晶硅层的掺杂元素包括氧、碳和氮元素中的至少一种元素。
  21. 根据权利要求1所述的太阳能电池，其中，所述多晶硅层的厚度为3纳米至150纳米。
  22. 根据权利要求1所述的太阳能电池，其中，所述太阳能电池还包括：
    第二扩散区域，位于所述基底的第二表面。
  23. 根据权利要求20所述的太阳能电池，其中，所述第二扩散区域包括为晶体硅基底，其中，所述第二扩散区域的掺杂浓度大于所述基底中的掺杂元素的掺杂浓度。
  24. 根据权利要求1所述的太阳能电池，其中，所述太阳能电池还包括：
    钝化减反层，位于所述基底的第二表面。
  25. 根据权利要求24所述的太阳能电池，其中，所述钝化减反层包括：层叠在所述基底第二表面第二钝化层；其中，
    所述第二钝化层的材料包括本征非晶硅、掺杂非晶硅、氧化硅和氧化铝中的一种。
  26. 根据权利要求24所述的太阳能电池，其中，所述钝化减反层包括：层叠在所述基底第二表面第二钝化层和减反射层；其中，
    所述第二钝化层的材料包括本征非晶硅、掺杂非晶硅、氧化硅和氧化铝中的一种；
    所述减反射层的材料包括氮化硅和氮氧化硅中的至少一种。
  27. 根据权利要求1所述的太阳能电池，其中，所述第一钝化层的材料包括本征非晶硅。
  28. 根据权利要求1所述的太阳能电池，其中，所述第一钝化层的材料掺杂有氧、碳和氮元素中的至少一种元素。
  29. 一种太阳能电池的制作方法，包括：
    提供一基片；其中，所述基片包括基底和钝化接触层；其中，所述基底包括相对设置的第一表面和第二表面，所述第一表面包括所述第一表面具有在第一方向上相邻的第一区域和第二区域；所述钝化接触层位于所述第一表面的第一区域；所述钝化接触层包括第一隧穿层和第一掺杂层，所述第一隧穿层和所述第一掺杂层在所述基底第一表面的第一区域向远离所述第二表面的方向依次层叠；
    于至少部分所述钝化接触层远离所述基底一侧的表面形成多晶硅层；以及
    于所述多晶硅层远离所述钝化接触层一侧的表面和所述基底第一表面的第二区域形成第一钝化层。
  30. 根据权利要求29所述的太阳能电池的制作方法，其中，所述于所述多晶硅层远离 所述钝化接触层一侧的表面和所述基底第一表面的第二区域形成第一钝化层的步骤之后还包括：
    于所述第一钝化层远离所述多晶硅层的一侧表面形成第二掺杂层；
    于所述第二掺杂层远离所述第一钝化层的一侧表面形成透明导电层和第一电极；其中，所述第一电极位于第一区域，自所述透明导电层至少延伸贯穿至所述多晶硅层，所述第一电极的至少部分与所述第一掺杂层和多晶硅层中的至少一层接触，所述第一电极的其余部分与位于所述第一区域的透明导电层接触设置；
    于所述透明导电层远离所述第一钝化层的一侧表面形成第二电极；其中，所述第二电极位于所述第二区域。
  31. 根据权利要求30所述的太阳能电池的制作方法，其中，所述于所述第二掺杂层远离所述第一钝化层的一侧表面形成透明导电层和第一电极，包括：
    于所述第二掺杂层远离所述第一钝化层的一侧表面形成透明导电层；
    于所述透明导电层、所述第二掺杂层、所述第一钝化层内形成电极开口；其中，所述电极开口的口底至少部分为所述第一掺杂层；
    于所述电极开口内形成所述第一电极。
  32. 根据权利要求30所述的太阳能电池的制作方法，其中，所述于所述第二掺杂层远离所述第一钝化层的一侧表面形成透明导电层和第一电极，包括：
    于所述透明导电层、所述第二掺杂层、所述第一钝化层内形成电极槽；
    于所述第二掺杂层远离所述第一钝化层的一侧表面，以及所述电极槽的槽壁、槽底形成透明导电层；其中，所述电极槽的槽底至少部分为所述第一掺杂层
    于所述电极槽内的剩余区域形成所述第一电极。
  33. 根据权利要求30所述的太阳能电池的制作方法，其中，所述方法还包括：
    对所述多晶硅层进行激光局域热处理，以使所述第一掺杂层的掺杂元素向所述多晶硅层中扩散，在所述多晶硅层中形成掺杂扩散部；其中，所述第一掺杂层包括本征部和所述掺杂扩散部，所述本征部位于所述第一隧穿层远离所述基底一侧的表面。
  34. 根据权利要求30所述的太阳能电池的制作方法，其中，所述于至少部分所述钝化接触层远离所述基底一侧的表面形成多晶硅层的步骤之前，所述方法还包括：
    于所述第一掺杂层远离所述基底一侧的表面形成第二隧穿层。
  35. 根据权利要求29所述的太阳能电池的制作方法，其中，所述提供一基片的步骤包括：
    提供基底，所述基底包括相对设置的第一表面和第二表面；
    于所述基底的第一表面向远离所述第二表面的方向依次层叠形成第一扩散层、第一隧穿层和第一掺杂层。
  36. 根据权利要求35所述的太阳能电池的制作方法，其中，所述于所述基底的第一表面向远离所述第二表面的方向依次层叠形成第一扩散层、第一隧穿层和第一掺杂层之后，所述方法还包括：
    于所述第一掺杂层远离所述第一隧穿层的一侧表面形成绝缘层；
    去除部分所述第一扩散层、所述第一隧穿层、所述第一掺杂层和所述绝缘层，以外露所述基底的第二区域。
  37. 根据权利要求29所述的太阳能电池的制作方法，其中，所述方法还包括：
    于基底的第二表面依次形成第二扩散区域、第二钝化层和减发射层。
  38. 一种光伏组件，包括至少一个电池串，所述电池串包括至少两个如权利要求1-28中任一项所述的太阳能电池。
  39. 一种光伏组件，包括至少一个电池串，所述电池串包括至少两个如权利要求29-37中任一项所述太阳能电池的制作方法制备而成的太阳能电池。
  40. 一种光伏系统，包括如权利要求38或39所述的光伏组件。
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