ATA283081A - REDUNDANT CONTROL SYSTEM - Google Patents
REDUNDANT CONTROL SYSTEMInfo
- Publication number
- ATA283081A ATA283081A AT283081A AT283081A ATA283081A AT A283081 A ATA283081 A AT A283081A AT 283081 A AT283081 A AT 283081A AT 283081 A AT283081 A AT 283081A AT A283081 A ATA283081 A AT A283081A
- Authority
- AT
- Austria
- Prior art keywords
- control system
- redundant control
- redundant
- control
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1629—Error detection by comparing the output of redundant processing systems
- G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
- G06F11/1645—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components and the comparison itself uses redundant hardware
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
- G06F2201/845—Systems in which the redundancy can be transformed in increased performance
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Hardware Redundancy (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE19803024370 DE3024370C2 (en) | 1980-06-27 | 1980-06-27 | Redundant tax system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| ATA283081A true ATA283081A (en) | 1987-08-15 |
| AT385364B AT385364B (en) | 1988-03-25 |
Family
ID=6105762
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT283081A AT385364B (en) | 1980-06-27 | 1981-06-25 | REDUNDANT CONTROL SYSTEM |
Country Status (3)
| Country | Link |
|---|---|
| AT (1) | AT385364B (en) |
| CH (1) | CH654425A5 (en) |
| DE (1) | DE3024370C2 (en) |
Families Citing this family (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4566106A (en) * | 1982-01-29 | 1986-01-21 | Pitney Bowes Inc. | Electronic postage meter having redundant memory |
| EP0231452B2 (en) * | 1982-01-29 | 2002-01-16 | Pitney Bowes Inc. | Microprocessor systems for electronic postage arrangements |
| US5109507A (en) * | 1982-01-29 | 1992-04-28 | Pitney Bowes Inc. | Electronic postage meter having redundant memory |
| US4916623A (en) * | 1982-01-29 | 1990-04-10 | Pitney Bowes Inc. | Electronic postage meter having redundant memory |
| CA1206619A (en) * | 1982-01-29 | 1986-06-24 | Frank T. Check, Jr. | Electronic postage meter having redundant memory |
| DE3225455C2 (en) * | 1982-07-07 | 1986-07-17 | Siemens AG, 1000 Berlin und 8000 München | Method for the safe operation of a redundant control system |
| US4665522A (en) * | 1985-01-28 | 1987-05-12 | The Charles Stark Draper Laboratory, Inc. | Multi-channel redundant processing systems |
| DE3819994A1 (en) * | 1988-06-11 | 1989-12-14 | Dirar Najib | Circuit arrangement for the monitoring of at least one parameter of an operating means |
| DE4009521B4 (en) * | 1989-06-29 | 2007-03-15 | Linde Ag | Method for two-channel secure control of a process |
| DE4341082A1 (en) * | 1993-12-02 | 1995-06-08 | Teves Gmbh Alfred | Circuit arrangement for safety-critical control systems |
| DE19508841C2 (en) * | 1994-11-18 | 2002-03-28 | Leuze Electronic Gmbh & Co | Safety switch arrangement |
| DE4441070C2 (en) * | 1994-11-18 | 1997-12-11 | Leuze Electronic Gmbh & Co | Safety switch arrangement |
| EP0775332B1 (en) * | 1995-03-11 | 2000-05-10 | Leuze electronic GmbH + Co. | Safety switch arrangement |
| DE19529434B4 (en) | 1995-08-10 | 2009-09-17 | Continental Teves Ag & Co. Ohg | Microprocessor system for safety-critical regulations |
| DE19716197A1 (en) * | 1997-04-18 | 1998-10-22 | Itt Mfg Enterprises Inc | Microprocessor system for safety-critical regulations |
| DE19717686A1 (en) | 1997-04-28 | 1998-10-29 | Itt Mfg Enterprises Inc | Circuit arrangement for a motor vehicle control system |
| DE19800311A1 (en) | 1998-01-07 | 1999-07-08 | Itt Mfg Enterprises Inc | Electronic, digital device |
| DE19801137A1 (en) | 1998-01-14 | 1999-07-22 | Siemens Ag | Automation system operating method e.g. for rapid shut-down of automated processes in emergency |
| DE19802728A1 (en) | 1998-01-24 | 1999-07-29 | Heidenhain Gmbh Dr Johannes | Machine parameter monitoring method for machine tool numerical control |
| DE102023109028B3 (en) * | 2023-04-11 | 2024-10-10 | Scheidt & Bachmann Gmbh | test circuit arrangement |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2108496C3 (en) * | 1971-02-23 | 1978-12-14 | Standard Elektrik Lorenz Ag, 7000 Stuttgart | Circuit arrangement for the continuous functional control of the information processing and the output of data telegrams, in particular for process computer-controlled railway signal systems |
| US4049957A (en) * | 1971-06-23 | 1977-09-20 | Hitachi, Ltd. | Dual computer system |
| DE2647367C3 (en) * | 1976-10-20 | 1982-12-09 | Siemens AG, 1000 Berlin und 8000 München | Redundant process control arrangement |
| DE2931280A1 (en) * | 1979-08-01 | 1981-02-19 | Siemens Ag | Control circuit including several processors - establishes synchronisation by using coincidence elements and comparators |
-
1980
- 1980-06-27 DE DE19803024370 patent/DE3024370C2/en not_active Expired
-
1981
- 1981-06-12 CH CH387681A patent/CH654425A5/en not_active IP Right Cessation
- 1981-06-25 AT AT283081A patent/AT385364B/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| AT385364B (en) | 1988-03-25 |
| DE3024370C2 (en) | 1987-01-02 |
| CH654425A5 (en) | 1986-02-14 |
| DE3024370A1 (en) | 1982-01-28 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| ELJ | Ceased due to non-payment of the annual fee |