ATA85778A - PROGRAMMABLE CIRCUIT FOR DATA PROCESSING - Google Patents

PROGRAMMABLE CIRCUIT FOR DATA PROCESSING

Info

Publication number
ATA85778A
ATA85778A AT85778A AT85778A ATA85778A AT A85778 A ATA85778 A AT A85778A AT 85778 A AT85778 A AT 85778A AT 85778 A AT85778 A AT 85778A AT A85778 A ATA85778 A AT A85778A
Authority
AT
Austria
Prior art keywords
data processing
programmable circuit
programmable
circuit
data
Prior art date
Application number
AT85778A
Other languages
German (de)
Other versions
AT354783B (en
Inventor
Bruno Dr Buchberger
Original Assignee
Bruno Dr Buchberger
Fegerl Josef
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bruno Dr Buchberger, Fegerl Josef filed Critical Bruno Dr Buchberger
Priority to AT85778A priority Critical patent/AT354783B/en
Publication of ATA85778A publication Critical patent/ATA85778A/en
Application granted granted Critical
Publication of AT354783B publication Critical patent/AT354783B/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0692—Multiconfiguration, e.g. local and global addressing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Multi Processors (AREA)
AT85778A 1978-02-07 1978-02-07 PROGRAMMABLE CIRCUIT FOR DATA PROCESSING AT354783B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AT85778A AT354783B (en) 1978-02-07 1978-02-07 PROGRAMMABLE CIRCUIT FOR DATA PROCESSING

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
AT85778A AT354783B (en) 1978-02-07 1978-02-07 PROGRAMMABLE CIRCUIT FOR DATA PROCESSING

Publications (2)

Publication Number Publication Date
ATA85778A true ATA85778A (en) 1979-06-15
AT354783B AT354783B (en) 1980-01-25

Family

ID=3501398

Family Applications (1)

Application Number Title Priority Date Filing Date
AT85778A AT354783B (en) 1978-02-07 1978-02-07 PROGRAMMABLE CIRCUIT FOR DATA PROCESSING

Country Status (1)

Country Link
AT (1) AT354783B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0016523B1 (en) * 1979-02-13 1984-09-26 The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and Data processing unit and data processing system comprising a plurality of such data processing units
SE430106B (en) 1979-06-18 1983-10-17 Ibm Svenska Ab Hierarchical Computer System
NL8002787A (en) * 1980-05-14 1981-12-16 Philips Nv MULTIPROCESSOR CALCULATOR SYSTEM FOR PERFORMING A RECURSIVE ALGORITHME.
US4626634A (en) * 1982-09-30 1986-12-02 At&T Bell Laboratories Multiprocessor computing system featuring shared global control
US4713834A (en) * 1982-09-30 1987-12-15 American Telephone And Telegraph Company, At&T Bell Laboratories Multiprocessor computing system featuring shared global control
DE3300699C2 (en) * 1983-01-11 1985-12-19 Nixdorf Computer Ag, 4790 Paderborn Circuit arrangement for addressing the memory of a plurality of data processing devices, each having an address volume, in a multiprocessor system with a system bus

Also Published As

Publication number Publication date
AT354783B (en) 1980-01-25

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Legal Events

Date Code Title Description
ELJ Ceased due to non-payment of the annual fee
REN Ceased due to non-payment of the annual fee