ATE113740T1 - Integrierte schaltungen des bit-scheibentyps mit zweifachbus. - Google Patents

Integrierte schaltungen des bit-scheibentyps mit zweifachbus.

Info

Publication number
ATE113740T1
ATE113740T1 AT86306270T AT86306270T ATE113740T1 AT E113740 T1 ATE113740 T1 AT E113740T1 AT 86306270 T AT86306270 T AT 86306270T AT 86306270 T AT86306270 T AT 86306270T AT E113740 T1 ATE113740 T1 AT E113740T1
Authority
AT
Austria
Prior art keywords
chip
bus
busses
signals
components
Prior art date
Application number
AT86306270T
Other languages
English (en)
Inventor
Ronald Laugesen
P Venkitakrishnan
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE113740T1 publication Critical patent/ATE113740T1/de

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7828Architectures of general purpose stored program computers comprising a single central processing unit without memory
    • G06F15/7832Architectures of general purpose stored program computers comprising a single central processing unit without memory on one IC chip (single chip microprocessors)
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7896Modular architectures, e.g. assembled from a number of identical packages

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Complex Calculations (AREA)
  • Microcomputers (AREA)
  • Multi Processors (AREA)
  • Signal Processing For Digital Recording And Reproducing (AREA)
AT86306270T 1985-08-30 1986-08-14 Integrierte schaltungen des bit-scheibentyps mit zweifachbus. ATE113740T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/771,387 US4641247A (en) 1985-08-30 1985-08-30 Bit-sliced, dual-bus design of integrated circuits

Publications (1)

Publication Number Publication Date
ATE113740T1 true ATE113740T1 (de) 1994-11-15

Family

ID=25091639

Family Applications (1)

Application Number Title Priority Date Filing Date
AT86306270T ATE113740T1 (de) 1985-08-30 1986-08-14 Integrierte schaltungen des bit-scheibentyps mit zweifachbus.

Country Status (5)

Country Link
US (1) US4641247A (de)
EP (1) EP0213844B1 (de)
JP (1) JP2724326B2 (de)
AT (1) ATE113740T1 (de)
DE (1) DE3650121T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4718057A (en) 1985-08-30 1988-01-05 Advanced Micro Devices, Inc. Streamlined digital signal processor
US4760517A (en) * 1986-10-17 1988-07-26 Integrated Device Technology, Inc. Thirty-two bit, bit slice processor
JPH01158758A (ja) * 1987-12-16 1989-06-21 Toshiba Corp 半導体集積回路
CA2007059C (en) * 1989-01-27 1994-05-24 Steven P. Davies Register and arithmetic logic unit
JPH0594546A (ja) * 1991-02-05 1993-04-16 American Teleph & Telegr Co <Att> デジタルプロセツサ
JP2597784B2 (ja) * 1992-02-12 1997-04-09 株式会社宇宙通信基礎技術研究所 アンテナ反射鏡面用メッシュ材料の製造方法
JP3224885B2 (ja) * 1993-01-14 2001-11-05 三菱電機株式会社 集積回路装置及びその設計方法
JP3165592B2 (ja) * 1994-08-04 2001-05-14 松下電器産業株式会社 データパス自動配置方法及びその装置
US5754807A (en) * 1995-11-20 1998-05-19 Advanced Micro Devices, Inc. Computer system including a multimedia bus which utilizes a separate local expansion bus for addressing and control cycles
US6880133B2 (en) * 2002-05-15 2005-04-12 Sonics, Inc. Method and apparatus for optimizing distributed multiplexed bus interconnects
US7007254B1 (en) * 2003-01-17 2006-02-28 Synplicity, Inc. Method and apparatus for the design and analysis of digital circuits with time division multiplexing
TW200538919A (en) * 2004-05-21 2005-12-01 Hon Hai Prec Ind Co Ltd System and method for checking split plane of motherboard layout
US20100281289A1 (en) * 2007-11-21 2010-11-04 Kun-Yung Chang Bidirectional Memory Interface with Glitch Tolerant Bit Slice Circuits
JP7425432B2 (ja) * 2019-01-28 2024-01-31 国立研究開発法人宇宙航空研究開発機構 メッシュ構造体およびその製造方法、アンテナ反射鏡、電磁シールド材、導波管

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0340804B1 (de) * 1980-05-29 1993-12-15 Texas Instruments Incorporated Modulares E/A-System
EP0232796B1 (de) * 1980-11-24 1991-07-03 Texas Instruments Incorporated Pseudo-Mikroprogrammsteuerung in einem Mikroprozessor mit komprimiertem Steuerfestwertspeicher und mit Bandanordnung von Sammelschienen, ALU und Registern
JPS5880860A (ja) 1981-11-09 1983-05-16 Mitsubishi Electric Corp 半導体集積回路装置
JPS58115828A (ja) * 1981-12-29 1983-07-09 Fujitsu Ltd 半導体集積回路
DE3365300D1 (en) * 1982-09-15 1986-09-18 Plessey Overseas Improvements in or relating to digital electronic switching systems
NL8304442A (nl) * 1983-12-27 1985-07-16 Koninkl Philips Electronics Nv Geintegreerde en programmeerbare processor voor woordsgewijze digitale signaalbewerking.
US4718057A (en) 1985-08-30 1988-01-05 Advanced Micro Devices, Inc. Streamlined digital signal processor

Also Published As

Publication number Publication date
DE3650121D1 (de) 1994-12-08
DE3650121T2 (de) 1995-05-18
JPS6255723A (ja) 1987-03-11
US4641247A (en) 1987-02-03
EP0213844A2 (de) 1987-03-11
EP0213844B1 (de) 1994-11-02
JP2724326B2 (ja) 1998-03-09
EP0213844A3 (en) 1988-10-12

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee