ATE114213T1 - Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte. - Google Patents

Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte.

Info

Publication number: ATE114213T1
Authority: AT; Austria
Prior art keywords: chip carrier; grounding; high density; ultra high; density pads
Prior art date: 1989-05-01

Application number

AT90907603T

Other languages

English (en)

Inventor

Bruce J Freyman

Barry M Miles

Frank J Juskey

Original Assignee

Motorola Inc

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1989-05-01

Filing date

1990-04-09

Publication date

1994-12-15

1990-04-09 Application filed by Motorola Inc filed Critical Motorola Inc

1994-12-15 Application granted granted Critical

1994-12-15 Publication of ATE114213T1 publication Critical patent/ATE114213T1/de

Links

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/63—Vias, e.g. via plugs
- H10W70/635—Through-vias
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
- H10W70/654—Top-view layouts
- H10W70/655—Fan-out layouts
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/073—Connecting or disconnecting of die-attach connectors
- H10W72/07331—Connecting techniques
- H10W72/07337—Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/321—Structures or relative sizes of die-attach connectors
- H10W72/325—Die-attach connectors having a filler embedded in a matrix
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/351—Materials of die-attach connectors
- H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
- H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/30—Die-attach connectors
- H10W72/381—Auxiliary members
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/551—Materials of bond wires
- H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
- H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

Die Bonding (AREA)
Wire Bonding (AREA)
Crystals, And After-Treatments Of Crystals (AREA)

AT90907603T 1989-05-01 1990-04-09 Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte. ATE114213T1 (de)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US07/345,280 US5077633A (en)	1989-05-01	1989-05-01	Grounding an ultra high density pad array chip carrier

Publications (1)

Publication Number	Publication Date
ATE114213T1 true ATE114213T1 (de)	1994-12-15

Family

ID=23354353

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
AT90907603T ATE114213T1 (de)	1989-05-01	1990-04-09	Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte.

Country Status (6)

Country	Link
US (1)	US5077633A (de)
EP (1)	EP0471003B1 (de)
JP (1)	JPH0834225B2 (de)
AT (1)	ATE114213T1 (de)
DE (1)	DE69014202T2 (de)
WO (1)	WO1990013991A1 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US5917707A (en)	1993-11-16	1999-06-29	Formfactor, Inc.	Flexible contact structure with an electrically conductive shell
US5834799A (en) *	1989-08-28	1998-11-10	Lsi Logic	Optically transmissive preformed planar structures
US5504035A (en) *	1989-08-28	1996-04-02	Lsi Logic Corporation	Process for solder ball interconnecting a semiconductor device to a substrate using a noble metal foil embedded interposer substrate
US5489804A (en) *	1989-08-28	1996-02-06	Lsi Logic Corporation	Flexible preformed planar structures for interposing between a chip and a substrate
US5299730A (en) *	1989-08-28	1994-04-05	Lsi Logic Corporation	Method and apparatus for isolation of flux materials in flip-chip manufacturing
US5175612A (en) *	1989-12-19	1992-12-29	Lsi Logic Corporation	Heat sink for semiconductor device assembly
US5399903A (en) *	1990-08-15	1995-03-21	Lsi Logic Corporation	Semiconductor device having an universal die size inner lead layout
JP2822272B2 (ja) *	1990-12-21	1998-11-11	モトローラ・インコーポレイテッド	リードレス・パッド・アレイ・チップ・キャリア
DE69229661T2 (de) *	1991-04-26	1999-12-30	Citizen Watch Co., Ltd.	Verfahren zur Herstellung einer Anschlusstruktur für eine Halbleiteranordnung
US5249098A (en) *	1991-08-22	1993-09-28	Lsi Logic Corporation	Semiconductor device package with solder bump electrical connections on an external surface of the package
JPH05109922A (ja) *	1991-10-21	1993-04-30	Nec Corp	半導体装置
US5434750A (en) *	1992-02-07	1995-07-18	Lsi Logic Corporation	Partially-molded, PCB chip carrier package for certain non-square die shapes
US5517752A (en) *	1992-05-13	1996-05-21	Fujitsu Limited	Method of connecting a pressure-connector terminal of a device with a terminal electrode of a substrate
US5592025A (en) *	1992-08-06	1997-01-07	Motorola, Inc.	Pad array semiconductor device
US5481436A (en) *	1992-12-30	1996-01-02	Interconnect Systems, Inc.	Multi-level assemblies and methods for interconnecting integrated circuits
US5479319A (en) *	1992-12-30	1995-12-26	Interconnect Systems, Inc.	Multi-level assemblies for interconnecting integrated circuits
US5767580A (en) *	1993-04-30	1998-06-16	Lsi Logic Corporation	Systems having shaped, self-aligning micro-bump structures
US5438477A (en) *	1993-08-12	1995-08-01	Lsi Logic Corporation	Die-attach technique for flip-chip style mounting of semiconductor dies
US5388327A (en) *	1993-09-15	1995-02-14	Lsi Logic Corporation	Fabrication of a dissolvable film carrier containing conductive bump contacts for placement on a semiconductor device package
US5820014A (en)	1993-11-16	1998-10-13	Form Factor, Inc.	Solder preforms
US7073254B2 (en)	1993-11-16	2006-07-11	Formfactor, Inc.	Method for mounting a plurality of spring contact elements
EP1213754A3 (de)	1994-03-18	2005-05-25	Hitachi Chemical Co., Ltd.	Halbleitergehäuseherstellung und Halbleitergehäuse
US5745985A (en) *	1995-06-23	1998-05-05	Texas Instruments Incorporated	Method of attaching a semiconductor microchip to a circuit board
US6097099A (en) *	1995-10-20	2000-08-01	Texas Instruments Incorporated	Electro-thermal nested die-attach design
US5770889A (en) *	1995-12-29	1998-06-23	Lsi Logic Corporation	Systems having advanced pre-formed planar structures
US8033838B2 (en)	1996-02-21	2011-10-11	Formfactor, Inc.	Microelectronic contact structure
US5994152A (en)	1996-02-21	1999-11-30	Formfactor, Inc.	Fabricating interconnects and tips using sacrificial substrates
JP3928753B2 (ja)	1996-08-06	2007-06-13	日立化成工業株式会社	マルチチップ実装法、および接着剤付チップの製造方法
US6051888A (en) *	1997-04-07	2000-04-18	Texas Instruments Incorporated	Semiconductor package and method for increased thermal dissipation of flip-chip semiconductor package
FR2790905A1 (fr) *	1999-03-09	2000-09-15	Sagem	Composant electrique de puissance a montage par brasage sur un support et procede de montage correspondant
GB2356737A (en) *	1999-11-26	2001-05-30	Nokia Mobile Phones Ltd	Ground Plane for a Semiconductor Chip
EP1710845A4 (de) *	2004-01-30	2012-07-04		Led und led-anbringstruktur
US8629539B2 (en) *	2012-01-16	2014-01-14	Allegro Microsystems, Llc	Methods and apparatus for magnetic sensor having non-conductive die paddle
US10234513B2 (en)	2012-03-20	2019-03-19	Allegro Microsystems, Llc	Magnetic field sensor integrated circuit with integral ferromagnetic material
US9812588B2 (en)	2012-03-20	2017-11-07	Allegro Microsystems, Llc	Magnetic field sensor integrated circuit with integral ferromagnetic material
US10991644B2 (en)	2019-08-22	2021-04-27	Allegro Microsystems, Llc	Integrated circuit package having a low profile

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
JPS57122592A (en) *	1981-01-23	1982-07-30	Tokyo Shibaura Electric Co	Method of producing hybrid integrated circuit
JPS59200427A (ja) *	1983-04-28	1984-11-13	Toshiba Corp	ハイブリツド集積回路
FR2545312B1 (fr) *	1983-04-29	1986-05-30	Thomson Csf	Picot de support de fixation de composant electronique sur circuit imprime et support comportant ces picots
JPS59207645A (ja) *	1983-05-11	1984-11-24	Toshiba Corp	半導体装置およびリ−ドフレ−ム
US4574879A (en) *	1984-02-29	1986-03-11	The Bergquist Company	Mounting pad for solid-state devices
US4626309A (en) *	1984-07-02	1986-12-02	Motorola, Inc.	Selective bonding interconnection mask
US4700276A (en) *	1986-01-03	1987-10-13	Motorola Inc.	Ultra high density pad array chip carrier
US4700473A (en) *	1986-01-03	1987-10-20	Motorola Inc.	Method of making an ultra high density pad array chip carrier
JPS62216259A (ja) *	1986-03-17	1987-09-22	Fujitsu Ltd	混成集積回路の製造方法および構造
JPS62229896A (ja) *	1986-03-29	1987-10-08	株式会社東芝	印刷配線基板
JPS63237373A (ja) *	1987-03-26	1988-10-03	キヤノン株式会社	電気的接続部材及びそれを用いた電気回路部材

1989
- 1989-05-01 US US07/345,280 patent/US5077633A/en not_active Expired - Lifetime
1990
- 1990-04-09 WO PCT/US1990/001828 patent/WO1990013991A1/en not_active Ceased
- 1990-04-09 DE DE69014202T patent/DE69014202T2/de not_active Expired - Fee Related
- 1990-04-09 JP JP2507470A patent/JPH0834225B2/ja not_active Expired - Lifetime
- 1990-04-09 AT AT90907603T patent/ATE114213T1/de not_active IP Right Cessation
- 1990-04-09 EP EP90907603A patent/EP0471003B1/de not_active Expired - Lifetime

Also Published As

Publication number	Publication date
WO1990013991A1 (en)	1990-11-15
JPH04505235A (ja)	1992-09-10
DE69014202T2 (de)	1995-06-01
US5077633A (en)	1991-12-31
EP0471003A1 (de)	1992-02-19
EP0471003A4 (de)	1991-12-06
EP0471003B1 (de)	1994-11-17
JPH0834225B2 (ja)	1996-03-29
DE69014202D1 (de)	1994-12-22

Legal Events

Date	Code	Title	Description
1995-05-15	RER	Ceased as to paragraph 5 lit. 3 law introducing patent treaties

Publication	Publication Date	Title
ATE114213T1 (de)	1994-12-15	Verfahren zur erdung eines chip-trägers mit kontaktfeldern von ultrahoher dichte.
DE3869248D1 (de)	1992-04-23	Traegerelement zum einbau in ausweiskarten.
JPS5595394A (en)	1980-07-19	Method of forming electronic package
SG81960A1 (en)	2001-07-24	Semiconductor device, substrate for a semiconductor device, method of manufacture thereof, and electronic instrument
DE3678058D1 (de)	1991-04-18	Vorrichtung zur herstellung von "geschriebenen" leiterplatten und leiterplatten-modifikationen.
GB9326551D0 (en)	1994-03-02	Integrated circuit chip
WO1997040532A3 (en)	1998-02-26	Molded flex circuit ball grid array and method of making
FR2570882B1 (fr)	1986-12-05	Matiere active positive a base d'un polymere conducteur electronique pour generateur electrochimique
GB2177641B (en)	1988-02-10	Solder preforms
DE69013056D1 (de)	1994-11-10	Verfahren zur Einkapselung von Vorrichtungen.
EP0403992A3 (de)	1992-12-30	Chip-Trägergehäuse und Verfahren zur Herstellung
MY105390A (en)	1994-09-30	Connector for electric parts.
EP0381383A3 (de)	1991-04-03	Halbleitervorrichtung mit auf ein leitendes Substrat aufgeklebtem isolierenden Substrat
CA2110472A1 (en)	1994-09-02	Method and Apparatus for In-Situ Testing of Integrated Circuit Chips
EP0393584A3 (de)	1991-05-02	Hochfrequenz-Halbleiteranordnung
DE3668091D1 (de)	1990-02-08	Anschlussband fuer die herstellung von elektrischen bauelementen in chipbauweise und verfahren zur herstellung dieser bauelemente.
FI905710A0 (fi)	1990-11-19	Skaerm foer radiofrekvenskrets.
MY101869A (en)	1992-01-31	Conductive die attach tape
ATE34881T1 (de)	1988-06-15	Montierung von halbleiterchips.
ATE209801T1 (de)	2001-12-15	Chipkarte mit einer kontaktzone sowie verfahren zur herstellung einer solchen chipkarte
EP0066836A3 (en)	1985-05-15	Method of marking semiconductor chips, and marked semiconductor chip
GB8915816D0 (en)	1989-08-31	Bonding electrical conductors
DE59001454D1 (de)	1993-06-17	Vorrichtung fuer die elektrische funktionspruefung von verdrahtungsfeldern, inbesondere von leiterplatten.
ES2002935A6 (es)	1988-10-01	Un metodo para hacer un miembro conectivo microelectronico elastico
EP0190520A3 (de)	1988-04-27	Elektrische Verbindung für elektronische Schaltungen