ATE135139T1 - Epitaktische siliziumschicht und verfahren zu deren abscheidung - Google Patents

Epitaktische siliziumschicht und verfahren zu deren abscheidung

Info

Publication number
ATE135139T1
ATE135139T1 AT91105949T AT91105949T ATE135139T1 AT E135139 T1 ATE135139 T1 AT E135139T1 AT 91105949 T AT91105949 T AT 91105949T AT 91105949 T AT91105949 T AT 91105949T AT E135139 T1 ATE135139 T1 AT E135139T1
Authority
AT
Austria
Prior art keywords
silicon layer
situ
deposition
type dopant
germanium
Prior art date
Application number
AT91105949T
Other languages
English (en)
Inventor
Bernard S Meyerson
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of ATE135139T1 publication Critical patent/ATE135139T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3438—Doping during depositing
    • H10P14/3441—Conductivity type
    • H10P14/3442—N-type
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/925—Fluid growth doping control, e.g. delta doping

Landscapes

  • Bipolar Transistors (AREA)
  • Thin Film Transistor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Vapour Deposition (AREA)
AT91105949T 1990-05-31 1991-04-15 Epitaktische siliziumschicht und verfahren zu deren abscheidung ATE135139T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/531,218 US5316958A (en) 1990-05-31 1990-05-31 Method of dopant enhancement in an epitaxial silicon layer by using germanium

Publications (1)

Publication Number Publication Date
ATE135139T1 true ATE135139T1 (de) 1996-03-15

Family

ID=24116739

Family Applications (1)

Application Number Title Priority Date Filing Date
AT91105949T ATE135139T1 (de) 1990-05-31 1991-04-15 Epitaktische siliziumschicht und verfahren zu deren abscheidung

Country Status (8)

Country Link
US (1) US5316958A (de)
EP (1) EP0459122B1 (de)
JP (1) JPH0744189B2 (de)
AT (1) ATE135139T1 (de)
BR (1) BR9102127A (de)
CA (1) CA2040660C (de)
DE (1) DE69117582T2 (de)
ES (1) ES2084053T3 (de)

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US11049939B2 (en) 2015-08-03 2021-06-29 Semiwise Limited Reduced local threshold voltage variation MOSFET using multiple layers of epi for improved device operation
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Also Published As

Publication number Publication date
CA2040660A1 (en) 1991-12-01
BR9102127A (pt) 1991-12-24
EP0459122B1 (de) 1996-03-06
DE69117582D1 (de) 1996-04-11
US5316958A (en) 1994-05-31
DE69117582T2 (de) 1996-09-12
JPH04230037A (ja) 1992-08-19
CA2040660C (en) 1996-05-14
ES2084053T3 (es) 1996-05-01
EP0459122A2 (de) 1991-12-04
JPH0744189B2 (ja) 1995-05-15
EP0459122A3 (de) 1994-08-03

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Legal Events

Date Code Title Description
UEP Publication of translation of european patent specification
REN Ceased due to non-payment of the annual fee