ATE161670T1 - Übertragungssystem mit beliebiger parallelrahmensynchronisierungsanordnung - Google Patents

Übertragungssystem mit beliebiger parallelrahmensynchronisierungsanordnung

Info

Publication number
ATE161670T1
ATE161670T1 AT92250263T AT92250263T ATE161670T1 AT E161670 T1 ATE161670 T1 AT E161670T1 AT 92250263 T AT92250263 T AT 92250263T AT 92250263 T AT92250263 T AT 92250263T AT E161670 T1 ATE161670 T1 AT E161670T1
Authority
AT
Austria
Prior art keywords
stream
transmission system
frame synchronization
parallel frame
serial
Prior art date
Application number
AT92250263T
Other languages
English (en)
Inventor
Martin Roberts
David L Manley
Original Assignee
Dsc Communications
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dsc Communications filed Critical Dsc Communications
Application granted granted Critical
Publication of ATE161670T1 publication Critical patent/ATE161670T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/54—Store-and-forward switching systems 
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0602—Systems characterised by the synchronising information used
    • H04J3/0605—Special codes used as synchronising signal
    • H04J3/0608—Detectors therefor, e.g. correlators, state machines

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Communication Control (AREA)
  • Exchange Systems With Centralized Control (AREA)
AT92250263T 1991-09-18 1992-09-17 Übertragungssystem mit beliebiger parallelrahmensynchronisierungsanordnung ATE161670T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US07/761,492 US5253254A (en) 1991-09-18 1991-09-18 Telecommunications system with arbitrary alignment parallel framer

Publications (1)

Publication Number Publication Date
ATE161670T1 true ATE161670T1 (de) 1998-01-15

Family

ID=25062376

Family Applications (1)

Application Number Title Priority Date Filing Date
AT92250263T ATE161670T1 (de) 1991-09-18 1992-09-17 Übertragungssystem mit beliebiger parallelrahmensynchronisierungsanordnung

Country Status (9)

Country Link
US (1) US5253254A (de)
EP (1) EP0535768B1 (de)
JP (1) JPH07202865A (de)
KR (1) KR100263789B1 (de)
AT (1) ATE161670T1 (de)
AU (1) AU654210B2 (de)
DE (1) DE69223718T2 (de)
DK (1) DK0535768T3 (de)
TW (1) TW221542B (de)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5648776A (en) * 1993-04-30 1997-07-15 International Business Machines Corporation Serial-to-parallel converter using alternating latches and interleaving techniques
SE501884C2 (sv) * 1993-10-12 1995-06-12 Ellemtel Utvecklings Ab Synkroniserande kretsarrangemang fastställer gräns mellan konsekutiva paket
US5834980A (en) * 1994-01-03 1998-11-10 Lucent Technologies Inc. Method and apparatus for supplying synchronization signals securing as clock signals with defined phase relationships
CA2120697C (en) * 1994-04-06 1999-08-10 Pmc-Sierra Ltd. Pair division multiplexer for digital communications
US5714904A (en) * 1994-06-06 1998-02-03 Sun Microsystems, Inc. High speed serial link for fully duplexed data communication
JP2817660B2 (ja) * 1995-03-30 1998-10-30 日本電気株式会社 同期回路
US5867543A (en) * 1996-03-29 1999-02-02 Dsc Communications Corporation Multi-rate transmission system
FR2756120B1 (fr) * 1996-11-19 1999-02-05 Sgs Thomson Microelectronics Dispositif de conversion serie/parallele d'un signal haute frequence de faible amplitude
US6970435B1 (en) * 1998-06-15 2005-11-29 International Business Machines Corporation Data alignment compensator
KR100555450B1 (ko) * 1998-06-30 2006-04-21 삼성전자주식회사 고속 직렬 데이타 디코딩장치 및 방법
FI108826B (fi) * 1999-03-12 2002-03-28 Nokia Corp Monitorointimenetelmä ja monitorointijärjestely
US6578153B1 (en) * 2000-03-16 2003-06-10 Fujitsu Network Communications, Inc. System and method for communications link calibration using a training packet
US6934304B2 (en) 2001-01-24 2005-08-23 Infineon Technologies, North America Corp. T1/E1 framer array
CA2493114A1 (en) * 2002-07-31 2004-02-05 Tellabs Operations, Inc. Methods and apparatus for improved communications networks
JP4407104B2 (ja) * 2002-08-30 2010-02-03 富士ゼロックス株式会社 信号伝送システム
CN1729639B (zh) * 2002-12-19 2010-10-06 Nxp股份有限公司 帧同步设备和方法
US20060039411A1 (en) * 2004-08-23 2006-02-23 Suvhasis Mukhopadhyay SONET/SDH frame synchronization in the presence of high bit error rates
US7546401B2 (en) * 2004-09-23 2009-06-09 International Business Machines Corporation Byte to byte alignment of multi-path data
US8069294B2 (en) 2006-03-30 2011-11-29 Intel Corporation Power-optimized frame synchronization for multiple USB controllers with non-uniform frame rates
US20090323730A1 (en) * 2008-04-18 2009-12-31 Honeywell International Inc. Data alignment system and method for double data rate input data stream
CN102983936B (zh) * 2011-06-09 2016-12-07 株式会社巨晶片 接收设备
ITRM20130704A1 (it) * 2013-12-20 2015-06-21 Intecs S P A Metodo e sistema di comunicazione di timing con coerenza di fase tra sistemi collegati in remoto tramite linea dati seriale ottica o elettrica ad alta velocita'
US9887859B2 (en) * 2015-09-08 2018-02-06 Ross Video Limited Data alignment implemented in a field programmable gate array (FPGA) device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT1207258B (it) * 1979-10-11 1989-05-17 Sits Soc It Telecom Siemens Disposizione circuitale atta a riconoscere la parola di allineamento, di particolare applicazione nella sezione ricevente di un multiplatore disegnali digitali.
JPH07105818B2 (ja) * 1986-05-19 1995-11-13 株式会社日立製作所 並列伝送方式
CA1298005C (en) * 1987-03-31 1992-03-24 Kazuo Iguchi Frame synchronizing apparatus
US5060239A (en) * 1989-05-12 1991-10-22 Alcatel Na Network Systems Corp. Transfer strobe time delay selector and method for performing same
JP2747077B2 (ja) * 1990-02-22 1998-05-06 株式会社東芝 フレーム同期回路
US5134633A (en) * 1990-11-30 1992-07-28 At&T Bell Laboratories Digital communications synchronization scheme

Also Published As

Publication number Publication date
JPH07202865A (ja) 1995-08-04
DK0535768T3 (da) 1998-05-25
EP0535768A3 (de) 1993-05-19
TW221542B (de) 1994-03-01
DE69223718T2 (de) 1998-06-25
KR930007133A (ko) 1993-04-22
DE69223718D1 (de) 1998-02-05
KR100263789B1 (ko) 2000-08-16
EP0535768B1 (de) 1997-12-29
EP0535768A2 (de) 1993-04-07
AU654210B2 (en) 1994-10-27
AU2523092A (en) 1993-03-25
US5253254A (en) 1993-10-12

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties