ATE196036T1 - Nichtflüchtige pmos-speicheranordnung mit einer einzigen polysiliziumschicht - Google Patents

Nichtflüchtige pmos-speicheranordnung mit einer einzigen polysiliziumschicht

Info

Publication number
ATE196036T1
ATE196036T1 AT96308360T AT96308360T ATE196036T1 AT E196036 T1 ATE196036 T1 AT E196036T1 AT 96308360 T AT96308360 T AT 96308360T AT 96308360 T AT96308360 T AT 96308360T AT E196036 T1 ATE196036 T1 AT E196036T1
Authority
AT
Austria
Prior art keywords
floating gate
gate
cell
type diffusion
well
Prior art date
Application number
AT96308360T
Other languages
English (en)
Inventor
Shang-De T Chang
Original Assignee
Programmable Microelectronics
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/560,249 external-priority patent/US5736764A/en
Priority claimed from US08/577,405 external-priority patent/US5841165A/en
Priority claimed from US08/744,699 external-priority patent/US5761121A/en
Application filed by Programmable Microelectronics filed Critical Programmable Microelectronics
Application granted granted Critical
Publication of ATE196036T1 publication Critical patent/ATE196036T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • H10D30/684Floating-gate IGFETs having only two programming levels programmed by hot carrier injection
    • H10D30/685Floating-gate IGFETs having only two programming levels programmed by hot carrier injection from the channel
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/60Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates the control gate being a doped region, e.g. single-poly memory cell
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/68Floating-gate IGFETs
    • H10D30/681Floating-gate IGFETs having only two programming levels
    • H10D30/683Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping

Landscapes

  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
AT96308360T 1995-11-21 1996-11-19 Nichtflüchtige pmos-speicheranordnung mit einer einzigen polysiliziumschicht ATE196036T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/560,249 US5736764A (en) 1995-11-21 1995-11-21 PMOS flash EEPROM cell with single poly
US08/577,405 US5841165A (en) 1995-11-21 1995-12-22 PMOS flash EEPROM cell with single poly
US08/744,699 US5761121A (en) 1996-10-31 1996-10-31 PMOS single-poly non-volatile memory structure

Publications (1)

Publication Number Publication Date
ATE196036T1 true ATE196036T1 (de) 2000-09-15

Family

ID=27415820

Family Applications (1)

Application Number Title Priority Date Filing Date
AT96308360T ATE196036T1 (de) 1995-11-21 1996-11-19 Nichtflüchtige pmos-speicheranordnung mit einer einzigen polysiliziumschicht

Country Status (5)

Country Link
EP (1) EP0776049B1 (de)
JP (1) JP2951605B2 (de)
KR (1) KR100306670B1 (de)
AT (1) ATE196036T1 (de)
DE (2) DE776049T1 (de)

Families Citing this family (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6965142B2 (en) * 1995-03-07 2005-11-15 Impinj, Inc. Floating-gate semiconductor structures
US5912842A (en) * 1995-11-14 1999-06-15 Programmable Microelectronics Corp. Nonvolatile PMOS two transistor memory cell and array
US6201732B1 (en) 1997-01-02 2001-03-13 John M. Caywood Low voltage single CMOS electrically erasable read-only memory
US5986931A (en) * 1997-01-02 1999-11-16 Caywood; John M. Low voltage single CMOS electrically erasable read-only memory
US6054732A (en) * 1997-02-11 2000-04-25 Texas Instruments Incorporated Single polysilicon flash EEPROM with low positive programming and erasing voltage and small cell size
US5896315A (en) * 1997-04-11 1999-04-20 Programmable Silicon Solutions Nonvolatile memory
FR2767219B1 (fr) * 1997-08-08 1999-09-17 Commissariat Energie Atomique Dispositif memoire non volatile programmable et effacable electriquement compatible avec un procede de fabrication cmos/soi
US6404006B2 (en) 1998-12-01 2002-06-11 Vantis Corporation EEPROM cell with tunneling across entire separated channels
US6214666B1 (en) 1998-12-18 2001-04-10 Vantis Corporation Method of forming a non-volatile memory device
US6282123B1 (en) 1998-12-21 2001-08-28 Lattice Semiconductor Corporation Method of fabricating, programming, and erasing a dual pocket two sided program/erase non-volatile memory cell
US6232631B1 (en) 1998-12-21 2001-05-15 Vantis Corporation Floating gate memory cell structure with programming mechanism outside the read path
US6294810B1 (en) 1998-12-22 2001-09-25 Vantis Corporation EEPROM cell with tunneling at separate edge and channel regions
US6294809B1 (en) 1998-12-28 2001-09-25 Vantis Corporation Avalanche programmed floating gate memory cell structure with program element in polysilicon
US6215700B1 (en) * 1999-01-07 2001-04-10 Vantis Corporation PMOS avalanche programmed floating gate memory cell structure
US5999449A (en) * 1999-01-27 1999-12-07 Vantis Corporation Two transistor EEPROM cell using P-well for tunneling across a channel
US6294811B1 (en) 1999-02-05 2001-09-25 Vantis Corporation Two transistor EEPROM cell
US6326663B1 (en) 1999-03-26 2001-12-04 Vantis Corporation Avalanche injection EEPROM memory cell with P-type control gate
US6172392B1 (en) * 1999-03-29 2001-01-09 Vantis Corporation Boron doped silicon capacitor plate
US6424000B1 (en) 1999-05-11 2002-07-23 Vantis Corporation Floating gate memory apparatus and method for selected programming thereof
EP1096575A1 (de) 1999-10-07 2001-05-02 STMicroelectronics S.r.l. Nichtflüchtige Speicherzelle mit einer Polysiliziumsschicht und Verfahren zur Herstellung
EP1091408A1 (de) 1999-10-07 2001-04-11 STMicroelectronics S.r.l. Festwertspeicherzelle mit einer Polysiliziumebene
US6222764B1 (en) * 1999-12-13 2001-04-24 Agere Systems Guardian Corp. Erasable memory device and an associated method for erasing a memory cell therein
DE10136582A1 (de) * 2001-07-27 2003-02-27 Micronas Gmbh Verfahren zur Herstellung eines nichtflüchtigen Halbleiterspeichers sowie nichtflüchtiger Halbleiterspeicher
US6664909B1 (en) 2001-08-13 2003-12-16 Impinj, Inc. Method and apparatus for trimming high-resolution digital-to-analog converter
AU2003228833A1 (en) * 2002-05-09 2003-11-11 Impinj, Inc. Pseudo-nonvolatile direct-tunneling floating-gate device
US6950342B2 (en) 2002-07-05 2005-09-27 Impinj, Inc. Differential floating gate nonvolatile memories
US7221596B2 (en) 2002-07-05 2007-05-22 Impinj, Inc. pFET nonvolatile memory
JP2004200553A (ja) 2002-12-20 2004-07-15 Fujitsu Ltd 半導体装置及びその製造方法
US20050145924A1 (en) * 2004-01-07 2005-07-07 I-Sheng Liu Source/drain adjust implant
US7078761B2 (en) * 2004-03-05 2006-07-18 Chingis Technology Corporation Nonvolatile memory solution using single-poly pFlash technology
US7283390B2 (en) 2004-04-21 2007-10-16 Impinj, Inc. Hybrid non-volatile memory
US8111558B2 (en) 2004-05-05 2012-02-07 Synopsys, Inc. pFET nonvolatile memory
JP2005353984A (ja) 2004-06-14 2005-12-22 Seiko Epson Corp 不揮発性記憶装置
JP2006202834A (ja) * 2005-01-18 2006-08-03 Seiko Epson Corp 半導体記憶装置および半導体記憶装置の製造方法
US7257033B2 (en) 2005-03-17 2007-08-14 Impinj, Inc. Inverter non-volatile memory cell and array system
US7679957B2 (en) 2005-03-31 2010-03-16 Virage Logic Corporation Redundant non-volatile memory cell
JP2006344735A (ja) * 2005-06-08 2006-12-21 Seiko Epson Corp 半導体装置
US7348621B2 (en) * 2006-02-10 2008-03-25 Micrel, Inc. Non-volatile memory cells
JP4622902B2 (ja) 2006-03-17 2011-02-02 セイコーエプソン株式会社 不揮発性半導体記憶装置
KR100744139B1 (ko) 2006-06-28 2007-08-01 삼성전자주식회사 단일 게이트 구조를 가지는 eeprom 및 그 동작 방법
US8122307B1 (en) 2006-08-15 2012-02-21 Synopsys, Inc. One time programmable memory test structures and methods
US7719896B1 (en) 2007-04-24 2010-05-18 Virage Logic Corporation Configurable single bit/dual bits memory
JP2009239161A (ja) * 2008-03-28 2009-10-15 Genusion Inc 不揮発性半導体記憶装置及びその使用方法
US7894261B1 (en) 2008-05-22 2011-02-22 Synopsys, Inc. PFET nonvolatile memory
US8355282B2 (en) * 2010-06-17 2013-01-15 Ememory Technology Inc. Logic-based multiple time programming memory cell
US9042174B2 (en) 2010-06-17 2015-05-26 Ememory Technology Inc. Non-volatile memory cell
US8958245B2 (en) 2010-06-17 2015-02-17 Ememory Technology Inc. Logic-based multiple time programming memory cell compatible with generic CMOS processes
JP5238859B2 (ja) * 2011-07-29 2013-07-17 株式会社Genusion 不揮発性半導体記憶装置およびその読み書き制御方法
JP2013102119A (ja) * 2011-11-07 2013-05-23 Ememory Technology Inc 不揮発性メモリーセル
JP2013187534A (ja) * 2012-03-08 2013-09-19 Ememory Technology Inc 消去可能プログラマブル単一ポリ不揮発性メモリ
US9236453B2 (en) * 2013-09-27 2016-01-12 Ememory Technology Inc. Nonvolatile memory structure and fabrication method thereof
USD1039579S1 (en) 2020-11-11 2024-08-20 Omron Corporation Robot system

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4404577A (en) * 1980-06-30 1983-09-13 International Business Machines Corp. Electrically alterable read only memory cell
DE3029539A1 (de) * 1980-08-04 1982-03-11 Deutsche Itt Industries Gmbh, 7800 Freiburg Nichtfluechtige, programmierbare integrierte halbleiterspeicherzelle
JPS63166A (ja) * 1986-06-19 1988-01-05 Toshiba Corp 不揮発性半導体記憶装置
IT1198109B (it) * 1986-11-18 1988-12-21 Sgs Microelettronica Spa Cella di memoria eeprom a singolo livello di polisilicio con zona di ossido di tunnel
JP2686450B2 (ja) * 1988-03-30 1997-12-08 セイコーインスツルメンツ株式会社 半導体不揮発性メモリ
KR920001402B1 (ko) * 1988-11-29 1992-02-13 삼성전자 주식회사 불휘발성 반도체 기억소자
EP0471131B1 (de) * 1990-07-24 1999-02-03 STMicroelectronics S.r.l. Verfahren zur Herstellung einer N-Kanal-EPROM-Zelle mit einer einzigen Polysiliziumschicht

Also Published As

Publication number Publication date
DE776049T1 (de) 1998-03-05
KR970030850A (ko) 1997-06-26
DE69610062D1 (de) 2000-10-05
JPH1070203A (ja) 1998-03-10
JP2951605B2 (ja) 1999-09-20
EP0776049A1 (de) 1997-05-28
KR100306670B1 (ko) 2001-12-17
EP0776049B1 (de) 2000-08-30
DE69610062T2 (de) 2001-05-03

Similar Documents

Publication Publication Date Title
DE69610062D1 (de) Nichtflüchtige PMOS-Speicheranordnung mit einer einzigen Polysiliziumschicht
TW363229B (en) PMOS single-poly non-volatile memory structure
TW285777B (en) PMOS flash EEPROM cell with single poly
US5231299A (en) Structure and fabrication method for EEPROM memory cell with selective channel implants
US6486509B1 (en) Non-volatile memory cell
US6084262A (en) Etox cell programmed by band-to-band tunneling induced substrate hot electron and read by gate induced drain leakage current
US5212541A (en) Contactless, 5v, high speed eprom/flash eprom array utilizing cells programmed using source side injection
US6160286A (en) Method for operation of a flash memory using n+/p-well diode
TW287321B (en) A PMOS flash memory cell with hot electron injection programming and tunnelling erasing
US4814286A (en) EEPROM cell with integral select transistor
TW286406B (en) Non-volatile electrically erasable memory with PMOS transistor NAND gate structure
DE69614223D1 (de) PMOS-Flash-Speicherzelle mit mehrstufiger Schwellspannung
US5844271A (en) Single layer polycrystalline silicon split-gate EEPROM cell having a buried control gate
US6653682B1 (en) Non-volatile electrically alterable semiconductor memory device
US5467307A (en) Memory array utilizing low voltage Fowler-Nordheim Flash EEPROM cell
US20020110020A1 (en) Method for improved programming efficiency in flash memory cells
US7969790B2 (en) Method of erasing an NVM cell that utilizes a gated diode
US6188113B1 (en) High voltage transistor with high gated diode breakdown, low body effect and low leakage
US6177322B1 (en) High voltage transistor with high gated diode breakdown voltage
JPS61166078A (ja) フロ−テイング・ゲ−ト型不揮発性メモリ−素子
US8125020B2 (en) Non-volatile memory devices with charge storage regions
EP0326879B1 (de) Elektrisch löschbare und programmierbare Nur-Lesespeicherzelle
Amin Design, selection and implementation of flash erase EEPROM memory cells
JP3422812B2 (ja) 不揮発性半導体メモリセルの書き換え方式
US8114738B2 (en) System and method for providing low cost high endurance low voltage electrically erasable programmable read only memory

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties