ATE215244T1 - Verfahren zur erhaltung von synchronisierter ausführung bei fehler-betriebssicheren/ fehlertoleranten rechnersystemen - Google Patents

Verfahren zur erhaltung von synchronisierter ausführung bei fehler-betriebssicheren/ fehlertoleranten rechnersystemen

Info

Publication number
ATE215244T1
ATE215244T1 AT98959455T AT98959455T ATE215244T1 AT E215244 T1 ATE215244 T1 AT E215244T1 AT 98959455 T AT98959455 T AT 98959455T AT 98959455 T AT98959455 T AT 98959455T AT E215244 T1 ATE215244 T1 AT E215244T1
Authority
AT
Austria
Prior art keywords
fault
compute
reliable
error
computer systems
Prior art date
Application number
AT98959455T
Other languages
English (en)
Inventor
Thomas D Bissett
Paul A Leveille
Erik Muench
Original Assignee
Marathon Techn Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marathon Techn Corp filed Critical Marathon Techn Corp
Application granted granted Critical
Publication of ATE215244T1 publication Critical patent/ATE215244T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1633—Error detection by comparing the output of redundant processing systems using mutual exchange of the output between the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1658—Data re-synchronization of a redundant component, or initial sync of replacement, additional or spare unit
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1691—Temporal synchronisation or re-synchronisation of redundant processing components using a quantum
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1641—Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/165—Error detection by comparing the output of redundant processing systems with continued operation after detection of the error
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1679—Temporal synchronisation or re-synchronisation of redundant processing components at clock signal level
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1675—Temporal synchronisation or re-synchronisation of redundant processing components
    • G06F11/1687—Temporal synchronisation or re-synchronisation of redundant processing components at event level, e.g. by interrupt or result of polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Multi Processors (AREA)
AT98959455T 1997-11-14 1998-11-13 Verfahren zur erhaltung von synchronisierter ausführung bei fehler-betriebssicheren/ fehlertoleranten rechnersystemen ATE215244T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US6579097P 1997-11-14 1997-11-14
PCT/US1998/024378 WO1999026133A2 (en) 1997-11-14 1998-11-13 Method for maintaining the synchronized execution in fault resilient/fault tolerant computer systems

Publications (1)

Publication Number Publication Date
ATE215244T1 true ATE215244T1 (de) 2002-04-15

Family

ID=22065134

Family Applications (1)

Application Number Title Priority Date Filing Date
AT98959455T ATE215244T1 (de) 1997-11-14 1998-11-13 Verfahren zur erhaltung von synchronisierter ausführung bei fehler-betriebssicheren/ fehlertoleranten rechnersystemen

Country Status (8)

Country Link
US (2) US6279119B1 (de)
EP (1) EP1029267B1 (de)
JP (1) JP2001523855A (de)
AT (1) ATE215244T1 (de)
AU (1) AU753120B2 (de)
CA (1) CA2309926A1 (de)
DE (1) DE69804489T2 (de)
WO (1) WO1999026133A2 (de)

Families Citing this family (111)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU753120B2 (en) 1997-11-14 2002-10-10 Marathon Technologies Corporation Fault resilient/fault tolerant computing
US6625756B1 (en) 1997-12-19 2003-09-23 Intel Corporation Replay mechanism for soft error recovery
US6523130B1 (en) * 1999-03-11 2003-02-18 Microsoft Corporation Storage system having error detection and recovery
US6418540B1 (en) * 1999-08-27 2002-07-09 Lucent Technologies Inc. State transfer with throw-away thread
US6467049B1 (en) * 1999-10-15 2002-10-15 Cisco Technology, Inc. Method and apparatus for configuration in multi processing engine computer systems
US6658595B1 (en) 1999-10-19 2003-12-02 Cisco Technology, Inc. Method and system for asymmetrically maintaining system operability
US6625637B1 (en) * 1999-12-09 2003-09-23 Koninklijke Philips Electronics N.V. Method and apparatus for synthesizing communication support based on communication types of application
US6640313B1 (en) * 1999-12-21 2003-10-28 Intel Corporation Microprocessor with high-reliability operating mode
US6625749B1 (en) * 1999-12-21 2003-09-23 Intel Corporation Firmware mechanism for correcting soft errors
US7769988B1 (en) * 1999-12-23 2010-08-03 Ati Technologies Ulc Method of integrating a personal computing system and apparatus thereof
EP1162540A1 (de) * 2000-06-07 2001-12-12 Siemens Schweiz AG Vorrichtung und Verfahren zur Synchronisation eines Systems von gekoppelten Datenverarbeitungsanlagen
GB2366012B (en) * 2000-08-14 2002-08-14 Sun Microsystems Inc A computer system
EP1239369A1 (de) * 2001-03-07 2002-09-11 Siemens Aktiengesellschaft Fehlertolerante Rechneranordnung und Verfahren zum Betrieb einer derartigen Anordnung
US6728735B1 (en) * 2001-03-12 2004-04-27 Network Appliance, Inc. Restartable dump that produces a consistent filesystem on tapes
JP2002287997A (ja) * 2001-03-23 2002-10-04 Kinji Mori 多重系処理方法
US6859892B2 (en) * 2001-04-25 2005-02-22 Hewlett-Packard Development Company, L.P. Synchronous breakpoint system and method
US6859866B2 (en) * 2001-10-01 2005-02-22 International Business Machines Corporation Synchronizing processing of commands invoked against duplexed coupling facility structures
US7603440B1 (en) * 2001-11-09 2009-10-13 Persystent Technology Corporation System and method for management of end user computing devices
US6848034B2 (en) 2002-04-04 2005-01-25 International Business Machines Corporation Dense server environment that shares an IDE drive
US6792481B2 (en) * 2002-05-30 2004-09-14 Freescale Semiconductor, Inc. DMA controller
JP3606281B2 (ja) * 2002-06-07 2005-01-05 オムロン株式会社 プログラマブルコントローラ及びｃｐｕユニット並びに特殊機能モジュール及び二重化処理方法
US7003691B2 (en) * 2002-06-28 2006-02-21 Hewlett-Packard Development Company, L.P. Method and apparatus for seeding differences in lock-stepped processors
JP2004046455A (ja) * 2002-07-10 2004-02-12 Nec Corp 情報処理装置
JP3982353B2 (ja) * 2002-07-12 2007-09-26 日本電気株式会社 フォルトトレラントコンピュータ装置、その再同期化方法及び再同期化プログラム
JP2004046599A (ja) * 2002-07-12 2004-02-12 Nec Corp フォルトトレラントコンピュータ装置、その再同期化方法及び再同期化プログラム
EP1398699A1 (de) * 2002-09-12 2004-03-17 Siemens Aktiengesellschaft Verfahren zur Ereignissynchronisation, insbesondere für Prozessoren fehlertoleranter Systeme
EP1398700A1 (de) * 2002-09-12 2004-03-17 Siemens Aktiengesellschaft Verfahren und Schaltungsanordnung zur Synchronisation redundanter Verarbeitungseinheiten
EP1398701A1 (de) * 2002-09-12 2004-03-17 Siemens Aktiengesellschaft Verfahren zur Ereignissynchronisation, insbesondere für Prozessoren fehlertoleranter Systeme
WO2004086225A1 (ja) * 2003-03-24 2004-10-07 Fujitsu Limited 仮想計算機システム
JP4492035B2 (ja) * 2003-04-21 2010-06-30 日本電気株式会社 データ処理装置
US7149919B2 (en) * 2003-05-15 2006-12-12 Hewlett-Packard Development Company, L.P. Disaster recovery system with cascaded resynchronization
US20050039074A1 (en) * 2003-07-09 2005-02-17 Tremblay Glenn A. Fault resilient/fault tolerant computing
US20050010837A1 (en) * 2003-07-10 2005-01-13 International Business Machines Corporation Method and apparatus for managing adapters in a data processing system
US20050114735A1 (en) * 2003-11-20 2005-05-26 Smith Zachary S. Systems and methods for verifying core determinacy
US9213609B2 (en) * 2003-12-16 2015-12-15 Hewlett-Packard Development Company, L.P. Persistent memory device for backup process checkpoint states
US7426656B2 (en) * 2004-03-30 2008-09-16 Hewlett-Packard Development Company, L.P. Method and system executing user programs on non-deterministic processors
US20050240806A1 (en) * 2004-03-30 2005-10-27 Hewlett-Packard Development Company, L.P. Diagnostic memory dump method in a redundant processor
US20060020852A1 (en) * 2004-03-30 2006-01-26 Bernick David L Method and system of servicing asynchronous interrupts in multiple processors executing a user program
US8799706B2 (en) 2004-03-30 2014-08-05 Hewlett-Packard Development Company, L.P. Method and system of exchanging information between processors
US7296181B2 (en) * 2004-04-06 2007-11-13 Hewlett-Packard Development Company, L.P. Lockstep error signaling
US7290169B2 (en) * 2004-04-06 2007-10-30 Hewlett-Packard Development Company, L.P. Core-level processor lockstepping
US7237144B2 (en) * 2004-04-06 2007-06-26 Hewlett-Packard Development Company, L.P. Off-chip lockstep checking
WO2006001051A1 (ja) * 2004-06-24 2006-01-05 Fujitsu Limited マルチプロセッサ装置及びその制御方法
DE102004038590A1 (de) * 2004-08-06 2006-03-16 Robert Bosch Gmbh Verfahren zur Verzögerung von Zugriffen auf Daten und/oder Befehle eines Zweirechnersystems sowie entsprechende Verzögerungseinheit
US7818614B2 (en) * 2004-10-25 2010-10-19 Hewlett-Packard Development Company, L.P. System and method for reintroducing a processor module to an operating system after lockstep recovery
US20060107116A1 (en) * 2004-10-25 2006-05-18 Michaelis Scott L System and method for reestablishing lockstep for a processor module for which loss of lockstep is detected
US7624302B2 (en) 2004-10-25 2009-11-24 Hewlett-Packard Development Company, L.P. System and method for switching the role of boot processor to a spare processor responsive to detection of loss of lockstep in a boot processor
US7516359B2 (en) * 2004-10-25 2009-04-07 Hewlett-Packard Development Company, L.P. System and method for using information relating to a detected loss of lockstep for determining a responsive action
US7356733B2 (en) * 2004-10-25 2008-04-08 Hewlett-Packard Development Company, L.P. System and method for system firmware causing an operating system to idle a processor
US7502958B2 (en) * 2004-10-25 2009-03-10 Hewlett-Packard Development Company, L.P. System and method for providing firmware recoverable lockstep protection
US7366948B2 (en) * 2004-10-25 2008-04-29 Hewlett-Packard Development Company, L.P. System and method for maintaining in a multi-processor system a spare processor that is in lockstep for use in recovering from loss of lockstep for another processor
US7308566B2 (en) * 2004-10-25 2007-12-11 Hewlett-Packard Development Company, L.P. System and method for configuring lockstep mode of a processor module
US7627781B2 (en) * 2004-10-25 2009-12-01 Hewlett-Packard Development Company, L.P. System and method for establishing a spare processor for recovering from loss of lockstep in a boot processor
JP4165499B2 (ja) 2004-12-13 2008-10-15 日本電気株式会社 コンピュータシステム及びそれを用いたフォールトトレラントシステム並びにその動作制御方法
JP4411602B2 (ja) * 2004-12-16 2010-02-10 日本電気株式会社 フォールトトレラント・コンピュータシステム
JP4168403B2 (ja) * 2004-12-21 2008-10-22 日本電気株式会社 フォールトトレラントシステム、これで用いる制御装置、アクセス制御方法、及び制御プログラム
JP4182948B2 (ja) * 2004-12-21 2008-11-19 日本電気株式会社 フォールト・トレラント・コンピュータシステムと、そのための割り込み制御方法
US7337367B2 (en) * 2005-01-06 2008-02-26 International Business Machines Corporation Management of memory controller reset
US7467327B2 (en) 2005-01-25 2008-12-16 Hewlett-Packard Development Company, L.P. Method and system of aligning execution point of duplicate copies of a user program by exchanging information about instructions executed
US7328331B2 (en) * 2005-01-25 2008-02-05 Hewlett-Packard Development Company, L.P. Method and system of aligning execution point of duplicate copies of a user program by copying memory stores
US7971095B2 (en) * 2005-02-16 2011-06-28 Honeywell International Inc. Fault recovery for real-time, multi-tasking computer system
US7590885B2 (en) * 2005-04-26 2009-09-15 Hewlett-Packard Development Company, L.P. Method and system of copying memory from a source processor to a target processor by duplicating memory writes
US7933966B2 (en) * 2005-04-26 2011-04-26 Hewlett-Packard Development Company, L.P. Method and system of copying a memory area between processor elements for lock-step execution
US7877552B2 (en) 2005-05-24 2011-01-25 Marathon Technologies Corporation Symmetric multiprocessor fault tolerant computer system
US7802075B2 (en) * 2005-07-05 2010-09-21 Viasat, Inc. Synchronized high-assurance circuits
US8190877B2 (en) * 2005-07-05 2012-05-29 Viasat, Inc. Trusted cryptographic processor
US8527741B2 (en) * 2005-07-05 2013-09-03 Viasat, Inc. System for selectively synchronizing high-assurance software tasks on multiple processors at a software routine level
WO2007018651A1 (en) * 2005-08-05 2007-02-15 Honeywell International, Inc. Method for redunancy management of distributed and recoverable digital control system
WO2007018652A1 (en) * 2005-08-05 2007-02-15 Honeywell International, Inc. Distributed and recoverable digital control system
US7765427B2 (en) * 2005-08-05 2010-07-27 Honeywell International Inc. Monitoring system and methods for a distributed and recoverable digital control system
US20070038849A1 (en) * 2005-08-11 2007-02-15 Rajiv Madampath Computing system and method
US7747897B2 (en) * 2005-11-18 2010-06-29 Intel Corporation Method and apparatus for lockstep processing on a fixed-latency interconnect
US7627584B2 (en) * 2005-11-30 2009-12-01 Oracle International Corporation Database system configured for automatic failover with no data loss
US7668879B2 (en) * 2005-11-30 2010-02-23 Oracle International Corporation Database system configured for automatic failover with no data loss
JP4816911B2 (ja) 2006-02-07 2011-11-16 日本電気株式会社 メモリの同期化方法及びリフレッシュ制御回路
US20080016062A1 (en) * 2006-06-30 2008-01-17 Drescher Keith A Request-response trigger generation in link-connected computing systems
US7793147B2 (en) * 2006-07-18 2010-09-07 Honeywell International Inc. Methods and systems for providing reconfigurable and recoverable computing resources
US7890684B2 (en) * 2006-08-31 2011-02-15 Standard Microsystems Corporation Two-cycle return path clocking
US7986718B2 (en) * 2006-09-15 2011-07-26 Itron, Inc. Discovery phase in a frequency hopping network
US8213706B2 (en) * 2008-04-22 2012-07-03 Honeywell International Inc. Method and system for real-time visual odometry
US8090984B2 (en) * 2008-12-10 2012-01-03 Freescale Semiconductor, Inc. Error detection and communication of an error location in multi-processor data processing system having processors operating in Lockstep
US8880473B1 (en) 2008-12-15 2014-11-04 Open Invention Network, Llc Method and system for providing storage checkpointing to a group of independent computer applications
JP2010198131A (ja) * 2009-02-23 2010-09-09 Renesas Electronics Corp プロセッサシステム、及びプロセッサシステムの動作モード切り替え方法
US7979746B2 (en) * 2009-04-27 2011-07-12 Honeywell International Inc. Dual-dual lockstep processor assemblies and modules
US8156371B2 (en) * 2009-06-16 2012-04-10 Honeywell International Inc. Clock and reset synchronization of high-integrity lockstep self-checking pairs
US8484508B2 (en) * 2010-01-14 2013-07-09 Arm Limited Data processing apparatus and method for providing fault tolerance when executing a sequence of data processing operations
US8812907B1 (en) 2010-07-19 2014-08-19 Marathon Technologies Corporation Fault tolerant computing systems using checkpoints
US8479042B1 (en) * 2010-11-01 2013-07-02 Xilinx, Inc. Transaction-level lockstep
US9208036B2 (en) * 2011-04-19 2015-12-08 Freescale Semiconductor, Inc. Dynamic lockstep cache memory replacement logic
US9158610B2 (en) * 2011-08-04 2015-10-13 Microsoft Technology Licensing, Llc. Fault tolerance for tasks using stages to manage dependencies
JP6098778B2 (ja) * 2012-03-29 2017-03-22 日本電気株式会社 冗長化システム、冗長化方法、冗長化システムの可用性向上方法、及びプログラム
US9342358B2 (en) 2012-09-14 2016-05-17 General Electric Company System and method for synchronizing processor instruction execution
US9256426B2 (en) 2012-09-14 2016-02-09 General Electric Company Controlling total number of instructions executed to a desired number after iterations of monitoring for successively less number of instructions until a predetermined time period elapse
US9021313B2 (en) 2012-11-21 2015-04-28 Microsoft Technology Licensing, Llc Priority-assignment interface to enhance approximate computing
US9251002B2 (en) 2013-01-15 2016-02-02 Stratus Technologies Bermuda Ltd. System and method for writing checkpointing data
US9769058B2 (en) 2013-05-17 2017-09-19 Ciena Corporation Resilient dual-homed data network hand-off
JP5772911B2 (ja) * 2013-09-27 2015-09-02 日本電気株式会社 フォールトトレラントシステム
WO2015102874A2 (en) 2013-12-30 2015-07-09 Stratus Technologies Bermuda Ltd. Method of delaying checkpoints by inspecting network packets
EP3090344B1 (de) 2013-12-30 2018-07-18 Stratus Technologies Bermuda Ltd. Systeme und verfahren für dynamisches checkpointing
US9588844B2 (en) 2013-12-30 2017-03-07 Stratus Technologies Bermuda Ltd. Checkpointing systems and methods using data forwarding
EP3218826A4 (de) 2014-11-13 2018-04-11 Virtual Software Systems, Inc. System für host-übergreifende multithread-sitzungsausrichtung
WO2016151674A1 (ja) * 2015-03-20 2016-09-29 ルネサスエレクトロニクス株式会社 データ処理装置
KR20170094911A (ko) * 2016-02-12 2017-08-22 삼성전자주식회사 반도체 장치의 동작 방법 및 반도체 시스템
JP6554048B2 (ja) * 2016-02-29 2019-07-31 株式会社日立製作所 表示装置
ES2892949T3 (es) 2016-08-04 2022-02-07 Dominion Eng Inc Supresión de la deposición de radionuclidos en los componentes de las plantas de energía nuclear
JP6786448B2 (ja) * 2017-06-28 2020-11-18 ルネサスエレクトロニクス株式会社 半導体装置
KR101977172B1 (ko) * 2017-07-04 2019-05-10 주식회사 한화 다중화 로직 기반 락스텝 실행 장치 및 방법
EP3428748B1 (de) * 2017-07-13 2020-08-26 Siemens Aktiengesellschaft Verfahren und anordnung zum betrieb von zwei redundanten systemen
CN110719586B (zh) * 2018-07-13 2022-06-03 成都鼎桥通信技术有限公司 业务建立方法、装置及服务器
US11327858B2 (en) * 2020-08-11 2022-05-10 Seagate Technology Llc Preserving data integrity during controller failure
US20240118901A1 (en) * 2022-10-07 2024-04-11 Xilinx, Inc. Switching between redundant and non-redundant modes of software execution

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4634110A (en) 1983-07-28 1987-01-06 Harris Corporation Fault detection and redundancy management system
US4531185A (en) 1983-08-31 1985-07-23 International Business Machines Corporation Centralized synchronization of clocks
US4816989A (en) 1987-04-15 1989-03-28 Allied-Signal Inc. Synchronizer for a fault tolerant multiple node processing system
CH675781A5 (de) * 1987-04-16 1990-10-31 Bbc Brown Boveri & Cie
EP0306211A3 (de) 1987-09-04 1990-09-26 Digital Equipment Corporation Synchronisiertes Doppelrechnersystem
US4907228A (en) 1987-09-04 1990-03-06 Digital Equipment Corporation Dual-rail processor with error checking at single rail interfaces
CA2003338A1 (en) 1987-11-09 1990-06-09 Richard W. Cutts, Jr. Synchronization of fault-tolerant computer system having multiple processors
US4937741A (en) 1988-04-28 1990-06-26 The Charles Stark Draper Laboratory, Inc. Synchronization of fault-tolerant parallel processing systems
US4965717A (en) 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
DE69010106T2 (de) 1989-07-25 1994-10-13 Mobil Oil Corp Verfahren und Vorrichtung zum Feststellen von Aenderungen des Flüssigkeitsniveaus in einem Speicherbehälter.
EP0411805B1 (de) 1989-08-01 1996-10-09 Digital Equipment Corporation Massenspeicherübertragung während der Neusynchronisierung
US5295258A (en) 1989-12-22 1994-03-15 Tandem Computers Incorporated Fault-tolerant computer system with online recovery and reintegration of redundant components
US5226152A (en) * 1990-12-07 1993-07-06 Motorola, Inc. Functional lockstep arrangement for redundant processors
WO1993009494A1 (en) * 1991-10-28 1993-05-13 Digital Equipment Corporation Fault-tolerant computer processing using a shadow virtual processor
US5838894A (en) 1992-12-17 1998-11-17 Tandem Computers Incorporated Logical, fail-functional, dual central processor units formed from three processor units
US5751932A (en) * 1992-12-17 1998-05-12 Tandem Computers Incorporated Fail-fast, fail-functional, fault-tolerant multiprocessor system
DE69429061T2 (de) * 1993-10-29 2002-07-18 Advanced Micro Devices, Inc. Superskalarmikroprozessoren
EP0731945B1 (de) 1993-12-01 2000-05-17 Marathon Technologies Corporation Fehler-betriebssichere/fehler tolerante computerbetriebsmethode
US5725523A (en) 1996-03-29 1998-03-10 Mueller; Richard L. Lateral-and posterior-aspect method and apparatus for laser-assisted transmyocardial revascularization and other surgical applications
AU753120B2 (en) 1997-11-14 2002-10-10 Marathon Technologies Corporation Fault resilient/fault tolerant computing

Also Published As

Publication number Publication date
US6473869B2 (en) 2002-10-29
AU753120B2 (en) 2002-10-10
DE69804489D1 (de) 2002-05-02
US20020026604A1 (en) 2002-02-28
EP1029267A2 (de) 2000-08-23
WO1999026133A2 (en) 1999-05-27
AU1524999A (en) 1999-06-07
DE69804489T2 (de) 2002-11-14
US6279119B1 (en) 2001-08-21
WO1999026133A3 (en) 1999-07-15
EP1029267B1 (de) 2002-03-27
JP2001523855A (ja) 2001-11-27
CA2309926A1 (en) 1999-05-27

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