ATE237835T1 - Leistungssteuerung in einem computersystem - Google Patents

Leistungssteuerung in einem computersystem

Info

Publication number
ATE237835T1
ATE237835T1 AT94309251T AT94309251T ATE237835T1 AT E237835 T1 ATE237835 T1 AT E237835T1 AT 94309251 T AT94309251 T AT 94309251T AT 94309251 T AT94309251 T AT 94309251T AT E237835 T1 ATE237835 T1 AT E237835T1
Authority
AT
Austria
Prior art keywords
bus
integrated processor
external
peripheral
derivation
Prior art date
Application number
AT94309251T
Other languages
English (en)
Inventor
Rita M O'brien
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Application granted granted Critical
Publication of ATE237835T1 publication Critical patent/ATE237835T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215—Monitoring of peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3253—Power saving in bus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)
  • Bus Control (AREA)
  • Microcomputers (AREA)
  • Information Transfer Systems (AREA)
  • Control Of Eletrric Generators (AREA)
  • Selective Calling Equipment (AREA)
  • Steering Control In Accordance With Driving Conditions (AREA)
AT94309251T 1994-07-13 1994-12-12 Leistungssteuerung in einem computersystem ATE237835T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/274,222 US5596756A (en) 1994-07-13 1994-07-13 Sub-bus activity detection technique for power management within a computer system

Publications (1)

Publication Number Publication Date
ATE237835T1 true ATE237835T1 (de) 2003-05-15

Family

ID=23047315

Family Applications (1)

Application Number Title Priority Date Filing Date
AT94309251T ATE237835T1 (de) 1994-07-13 1994-12-12 Leistungssteuerung in einem computersystem

Country Status (5)

Country Link
US (1) US5596756A (de)
EP (1) EP0693723B1 (de)
JP (2) JP3609466B2 (de)
AT (1) ATE237835T1 (de)
DE (1) DE69432514T2 (de)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5805923A (en) * 1995-05-26 1998-09-08 Sony Corporation Configurable power management system having a clock stabilization filter that can be enabled or bypassed depending upon whether a crystal or can oscillator is used
US5850544A (en) * 1995-06-06 1998-12-15 International Business Machines Corporation System and method for efficient relational query generation and tuple-to-object translation in an object-relational gateway supporting class inheritance
JP2974950B2 (ja) * 1995-10-26 1999-11-10 インターナショナル・ビジネス・マシーンズ・コーポレイション 情報処理システム
US5822545A (en) * 1995-12-04 1998-10-13 Cypress Semiconductor Corp. Method and apparatus for eliminating electromagnetic interference and noise caused by all unnecessary switching/toggling of bus signals
US5822598A (en) * 1996-07-12 1998-10-13 Ast Research, Inc. Audio activity detection circuit to increase battery life in portable computers
KR100294259B1 (ko) * 1996-12-19 2001-07-12 윤종용 디스플레이모니터장치및그의전원제어방법
US6324592B1 (en) * 1997-02-25 2001-11-27 Keystone Aerospace Apparatus and method for a mobile computer architecture and input/output management system
JPH10254587A (ja) * 1997-03-14 1998-09-25 Toshiba Corp コンピュータシステム
US5923830A (en) * 1997-05-07 1999-07-13 General Dynamics Information Systems, Inc. Non-interrupting power control for fault tolerant computer systems
US6073225A (en) * 1997-06-24 2000-06-06 Intel Corporation Method and apparatus for monitoring bus transactions based on cycle type and memory address range
US6131127A (en) * 1997-09-24 2000-10-10 Intel Corporation I/O transactions on a low pin count bus
US6157970A (en) * 1997-09-24 2000-12-05 Intel Corporation Direct memory access system using time-multiplexing for transferring address, data, and control and a separate control line for serially transmitting encoded DMA channel number
US6119189A (en) * 1997-09-24 2000-09-12 Intel Corporation Bus master transactions on a low pin count bus
US5991841A (en) * 1997-09-24 1999-11-23 Intel Corporation Memory transactions on a low pin count bus
US6230219B1 (en) 1997-11-10 2001-05-08 International Business Machines Corporation High performance multichannel DMA controller for a PCI host bridge with a built-in cache
US6081861A (en) * 1998-06-15 2000-06-27 International Business Machines Corporation PCI migration support of ISA adapters
US6282666B1 (en) * 1999-02-26 2001-08-28 Agere Systems Guardian Corp. Computer peripheral device having the capability to wake up from a cold state with information stored before cold powerdown
US6510525B1 (en) * 1999-04-26 2003-01-21 Mediaq, Inc. Method and apparatus to power up an integrated device from a low power state
US7007187B1 (en) * 2000-06-30 2006-02-28 Intel Corporation Method and apparatus for an integrated circuit having flexible-ratio frequency domain cross-overs
US7058834B2 (en) * 2001-04-26 2006-06-06 Paul Richard Woods Scan-based state save and restore method and system for inactive state power reduction
GB0123421D0 (en) * 2001-09-28 2001-11-21 Memquest Ltd Power management system
TWI227398B (en) * 2003-04-15 2005-02-01 Asustek Comp Inc Automatic adjusting device of computer system performance
US7086583B2 (en) * 2004-01-20 2006-08-08 Standard Microsystems Corporation Systems and methods for power reduction in systems having removable media devices
JP2006107127A (ja) * 2004-10-05 2006-04-20 Nec Electronics Corp 半導体集積回路装置
WO2006131833A2 (en) * 2005-03-18 2006-12-14 Centre National De La Recherche Scientifique New hybrid oligomers. their preparation process and pharmaceutical compositions containing them
US20060218424A1 (en) * 2005-03-23 2006-09-28 Miron Abramovici Integrated circuit with autonomous power management
JP2010529548A (ja) * 2007-06-04 2010-08-26 エヌエックスピー ビー ヴィ 電源管理集積回路
US8185759B1 (en) 2008-11-06 2012-05-22 Smsc Holdings S.A.R.L. Methods and systems for interfacing bus powered devices with host devices providing limited power levels
US7882297B2 (en) 2009-02-20 2011-02-01 Standard Microsystems Corporation Serial bus hub with low power devices
US8271812B2 (en) * 2010-04-07 2012-09-18 Apple Inc. Hardware automatic performance state transitions in system on processor sleep and wake events
US8850250B2 (en) * 2010-06-01 2014-09-30 Intel Corporation Integration of processor and input/output hub
US9311145B2 (en) * 2012-06-29 2016-04-12 Intel Corporation Using platform idle duration information to notify platform devices of upcoming active periods
US9395799B2 (en) 2012-08-09 2016-07-19 Nvidia Corporation Power management techniques for USB interfaces
US9760150B2 (en) 2012-11-27 2017-09-12 Nvidia Corporation Low-power states for a computer system with integrated baseband
GB2509124A (en) * 2012-12-21 2014-06-25 Nomad Spectrum Ltd Wireless access point and cellular network relay with secondary co-processor controlling power supplies and SIM cards
US9467120B1 (en) * 2013-12-19 2016-10-11 Altera Corporation Power management for PCI express

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5816494B2 (ja) * 1980-04-10 1983-03-31 パナフアコム株式会社 マルチプロセツサ処理システム
JPS62169218A (ja) * 1986-01-17 1987-07-25 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション 情報処理システムのアプリケ−シヨン中断再開装置
DE68925772T2 (de) * 1988-09-29 1996-10-10 Nippon Electric Co In einem Mikrocomputersystem benutzter Programm-Daten-Speicher
US5125080A (en) * 1989-11-13 1992-06-23 Chips And Technologies, Incorporated Logic support chip for AT-type computer with improved bus architecture
CA2036688C (en) * 1990-02-28 1995-01-03 Lee W. Tower Multiple cluster signal processor
US5410711A (en) * 1991-02-14 1995-04-25 Dell Usa, L.P. Portable computer with BIOS-independent power management
US5613135A (en) * 1992-09-17 1997-03-18 Kabushiki Kaisha Toshiba Portable computer having dedicated register group and peripheral controller bus between system bus and peripheral controller

Also Published As

Publication number Publication date
JP3609466B2 (ja) 2005-01-12
JPH0844464A (ja) 1996-02-16
EP0693723A1 (de) 1996-01-24
JPH08194563A (ja) 1996-07-30
EP0693723B1 (de) 2003-04-16
DE69432514D1 (de) 2003-05-22
DE69432514T2 (de) 2004-02-26
US5596756A (en) 1997-01-21

Similar Documents

Publication Publication Date Title
DE69432514D1 (de) Leistungssteuerung in einem Computersystem
EP0667581A3 (de) Rechnersystem mit einem Peripheriebus
EP0321156A3 (de) Datenübertragungssteuerungsvorrichtung
DE69224887D1 (de) Single-chip seitendrucker-steuerschaltung
TW428141B (en) USB peripheral microcontroller
TW370650B (en) System and method for interfacing manually controllable input devices to a universal computer bus system
KR970076288A (ko) 핫 플러거블 모듈식 베이를 갖는 휴대용 컴퓨터를 제공하는 방법 및 장치
DE602004028831D1 (de)
SE8306606D0 (sv) Kommunikationsanleggning
DE69431964D1 (de) Mikro-tragbarer rechner
WO1999026158B1 (en) Interface optimized computer system architecture
EP0396228A3 (de) Busunterbrechungsvorrichtung
EP0658852A3 (de) Rechnersystem mit verändertem lokalen Datenbus
ES464099A1 (es) Una disposicion de circuito conectador de acoplamiento de entrada-salida.
WO2001082090A3 (en) Extended cardbus/pc card controller with split-bridge technology
NO922092D0 (no) Pc med lokal bussarbitraering
CN1230760C (zh) 当安装一个升级设备时用于禁止图形设备的方法和装置
ATE188788T1 (de) Eingabe-ausgabe-steuerung, die eingabe/ausgabe- fenster mit adressbereichen aufweist und die fähigkeit zum vorherigen lesen und späteren schreiben besitzt
JP2001290754A (ja) コンピュータシステム
CN218938952U (zh) 一种台式机主板去除南桥芯片结构
BRPI0410018A (pt) método e aparelho para permitir gravação e reprodução de subcanal
DE69932252D1 (de) Geteilter rechner
JPS57166759A (en) Controlling method for common input/output bus
CN203054473U (zh) 一种用于汽车故障诊断的控制主板
SG81279A1 (en) Processor system and method for testing a processor system

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties