ATE241171T1 - System und verfahren zur verbesserung des multibit fehlerschutzes in einer computerspeichereinheit - Google Patents

System und verfahren zur verbesserung des multibit fehlerschutzes in einer computerspeichereinheit

Info

Publication number
ATE241171T1
ATE241171T1 AT00944994T AT00944994T ATE241171T1 AT E241171 T1 ATE241171 T1 AT E241171T1 AT 00944994 T AT00944994 T AT 00944994T AT 00944994 T AT00944994 T AT 00944994T AT E241171 T1 ATE241171 T1 AT E241171T1
Authority
AT
Austria
Prior art keywords
check
improving
storage unit
computer storage
errors
Prior art date
Application number
AT00944994T
Other languages
English (en)
Inventor
Tayung Wong
Ashok Singhal
Clement Fang
John Carrillo
Han Y Ko
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Application granted granted Critical
Publication of ATE241171T1 publication Critical patent/ATE241171T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/102—Error in check bits

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Detection And Correction Of Errors (AREA)
  • Dram (AREA)
  • Hardware Redundancy (AREA)
AT00944994T 1999-07-02 2000-06-29 System und verfahren zur verbesserung des multibit fehlerschutzes in einer computerspeichereinheit ATE241171T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/347,117 US6574746B1 (en) 1999-07-02 1999-07-02 System and method for improving multi-bit error protection in computer memory systems
PCT/US2000/017911 WO2001002959A1 (en) 1999-07-02 2000-06-29 A system and method for improving multi-bit error protection in computer memory systems

Publications (1)

Publication Number Publication Date
ATE241171T1 true ATE241171T1 (de) 2003-06-15

Family

ID=23362399

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00944994T ATE241171T1 (de) 1999-07-02 2000-06-29 System und verfahren zur verbesserung des multibit fehlerschutzes in einer computerspeichereinheit

Country Status (8)

Country Link
US (1) US6574746B1 (de)
EP (1) EP1194849B1 (de)
JP (1) JP2003504722A (de)
KR (1) KR100609343B1 (de)
AT (1) ATE241171T1 (de)
AU (1) AU5899800A (de)
DE (1) DE60002872T2 (de)
WO (1) WO2001002959A1 (de)

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US6785835B2 (en) * 2000-01-25 2004-08-31 Hewlett-Packard Development Company, L.P. Raid memory
IL136379A0 (en) * 2000-05-25 2001-06-14 Gene Bio Applic Ltd Processing chamber
JP2003077294A (ja) 2001-08-31 2003-03-14 Mitsubishi Electric Corp メモリ回路
US7634709B2 (en) * 2001-10-05 2009-12-15 Unisys Corporation Familial correction with non-familial double bit error detection
JP2005203064A (ja) * 2004-01-19 2005-07-28 Toshiba Corp 半導体記憶装置
US7519629B2 (en) * 2004-09-30 2009-04-14 International Business Machines Corporation System and method for tolerating multiple storage device failures in a storage system with constrained parity in-degree
US7275201B1 (en) * 2005-04-13 2007-09-25 Emc Corporation Memory system
US7478307B1 (en) * 2005-05-19 2009-01-13 Sun Microsystems, Inc. Method for improving un-correctable errors in a computer system
DE102006016499B4 (de) * 2006-04-07 2014-11-13 Qimonda Ag Speichermodulsteuerung, Speichersteuerung und entsprechende Speicheranordnung sowie Verfahren zur Fehlerkorrektur
US20080163013A1 (en) * 2006-12-29 2008-07-03 Robert James Landers Memory testing system and method
KR100823170B1 (ko) 2007-01-31 2008-04-21 삼성전자주식회사 배드 블록을 싱글 레벨 셀 모드로 사용하는 메모리 시스템및 메모리 카드
US8468422B2 (en) * 2007-12-21 2013-06-18 Oracle America, Inc. Prediction and prevention of uncorrectable memory errors
DE102008020128A1 (de) * 2008-04-21 2009-10-22 Rittal Gmbh & Co. Kg Klimatisierungsgerät und Bausatz für ein Klimatisierungsgerät
US9626243B2 (en) * 2009-12-11 2017-04-18 Advanced Micro Devices, Inc. Data error correction device and methods thereof
US9213595B2 (en) 2013-10-15 2015-12-15 International Business Machines Corporation Handling errors in ternary content addressable memories
KR102178137B1 (ko) 2014-08-26 2020-11-12 삼성전자주식회사 반도체 메모리 장치, 이의 에러 정정 방법 및 이를 포함하는 메모리 시스템

Family Cites Families (16)

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Publication number Priority date Publication date Assignee Title
US4334309A (en) * 1980-06-30 1982-06-08 International Business Machines Corporation Error correcting code system
JPS58139399A (ja) * 1982-02-15 1983-08-18 Hitachi Ltd 半導体記憶装置
US4845664A (en) 1986-09-15 1989-07-04 International Business Machines Corp. On-chip bit reordering structure
IT1202527B (it) 1987-02-12 1989-02-09 Honeywell Inf Systems Sistema di memoria e relativo apparato di rivelazione-correzione di errore
US5134616A (en) * 1990-02-13 1992-07-28 International Business Machines Corporation Dynamic ram with on-chip ecc and optimized bit and word redundancy
US5164944A (en) 1990-06-08 1992-11-17 Unisys Corporation Method and apparatus for effecting multiple error correction in a computer memory
US5291498A (en) 1991-01-29 1994-03-01 Convex Computer Corporation Error detecting method and apparatus for computer memory having multi-bit output memory circuits
US5270964A (en) 1992-05-19 1993-12-14 Sun Microsystems, Inc. Single in-line memory module
US5491702A (en) 1992-07-22 1996-02-13 Silicon Graphics, Inc. Apparatus for detecting any single bit error, detecting any two bit error, and detecting any three or four bit error in a group of four bits for a 25- or 64-bit data word
JP2816512B2 (ja) 1992-07-27 1998-10-27 三菱電機株式会社 半導体記憶装置
US5384788A (en) 1992-10-26 1995-01-24 Dell Usa, L.P. Apparatus and method for optimal error correcting code to parity conversion
US5465262A (en) 1994-01-28 1995-11-07 International Business Machines Corporation Method and structure for providing error correction code and automatic parity sensing
US5642366A (en) 1994-07-05 1997-06-24 Adaptec, Inc. Global parity symbol for interleaved reed-solomon coded data
US5761221A (en) * 1995-12-11 1998-06-02 International Business Machines Corporation Memory implemented error detection and correction code using memory modules
US5784391A (en) 1996-10-08 1998-07-21 International Business Machines Corporation Distributed memory system with ECC and method of operation
US5894487A (en) * 1997-07-15 1999-04-13 International Business Machines Corporation Error detection of directory arrays in dynamic circuits

Also Published As

Publication number Publication date
US6574746B1 (en) 2003-06-03
JP2003504722A (ja) 2003-02-04
DE60002872D1 (de) 2003-06-26
KR100609343B1 (ko) 2006-08-09
WO2001002959A1 (en) 2001-01-11
EP1194849B1 (de) 2003-05-21
DE60002872T2 (de) 2004-03-11
AU5899800A (en) 2001-01-22
KR20020020734A (ko) 2002-03-15
EP1194849A1 (de) 2002-04-10

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