ATE251819T1 - Treiberschaltung mit einstellbarem ausgangsstrom - Google Patents

Treiberschaltung mit einstellbarem ausgangsstrom

Info

Publication number
ATE251819T1
ATE251819T1 AT01117740T AT01117740T ATE251819T1 AT E251819 T1 ATE251819 T1 AT E251819T1 AT 01117740 T AT01117740 T AT 01117740T AT 01117740 T AT01117740 T AT 01117740T AT E251819 T1 ATE251819 T1 AT E251819T1
Authority
AT
Austria
Prior art keywords
driver circuit
partial
delta
signal
input
Prior art date
Application number
AT01117740T
Other languages
English (en)
Inventor
Fred S Rennig
Peter Bakker
Dieter Merk
Original Assignee
Texas Instruments Deutschland
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Deutschland filed Critical Texas Instruments Deutschland
Application granted granted Critical
Publication of ATE251819T1 publication Critical patent/ATE251819T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585—Coupling arrangements; Interface arrangements using field effect transistors only programmable

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Amplifiers (AREA)
AT01117740T 2000-07-28 2001-07-30 Treiberschaltung mit einstellbarem ausgangsstrom ATE251819T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10036863A DE10036863C2 (de) 2000-07-28 2000-07-28 Treiberschaltung zur Abgabe eines einstellbaren Ausgangssignalstroms

Publications (1)

Publication Number Publication Date
ATE251819T1 true ATE251819T1 (de) 2003-10-15

Family

ID=7650569

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01117740T ATE251819T1 (de) 2000-07-28 2001-07-30 Treiberschaltung mit einstellbarem ausgangsstrom

Country Status (3)

Country Link
EP (1) EP1176723B1 (de)
AT (1) ATE251819T1 (de)
DE (2) DE10036863C2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1607887A3 (de) * 2004-06-18 2012-01-25 Imec Energiebewusste konfigurierbare Treiberschaltunge für an einer Belastung angeschlossenen Leitung
DE102023118261A1 (de) * 2023-07-11 2025-01-16 Infineon Technologies Ag Treiberschaltung

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4719369A (en) * 1985-08-14 1988-01-12 Hitachi, Ltd. Output circuit having transistor monitor for matching output impedance to load impedance
US4797586A (en) * 1987-11-25 1989-01-10 Tektronix, Inc. Controllable delay circuit
US5191234A (en) * 1990-12-10 1993-03-02 Sony Corporation Pulse signal generator and cascode differential amplifier
FR2671244B1 (fr) * 1990-12-27 1993-03-05 Bull Sa Dispositif de retard reglable.
DE4200680A1 (de) * 1992-01-14 1993-07-15 Bosch Gmbh Robert Treiberschaltung
US5424669A (en) * 1993-04-29 1995-06-13 Texas Instruments Incorporated Digitally controlled output slope control/current limit in power integrated circuits
US5534801A (en) * 1994-01-24 1996-07-09 Advanced Micro Devices, Inc. Apparatus and method for automatic sense and establishment of 5V and 3.3V operation
US5602494A (en) * 1995-03-09 1997-02-11 Honeywell Inc. Bi-directional programmable I/O cell
US5703496A (en) * 1995-09-26 1997-12-30 Intel Corporation Method and apparatus for limiting the slew rate of output drivers by selectively programming the threshold voltage of flash cells connected thereto
DE19545904C2 (de) * 1995-12-08 1998-01-15 Siemens Ag Integrierte Schaltung mit programmierbarem Pad-Treiber

Also Published As

Publication number Publication date
DE10036863C2 (de) 2002-09-19
EP1176723B1 (de) 2003-10-08
DE10036863A1 (de) 2002-02-14
DE60100929T2 (de) 2004-07-29
EP1176723A1 (de) 2002-01-30
DE60100929D1 (de) 2003-11-13

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Legal Events

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