ATE271254T1 - Halbleiteranordnung - Google Patents

Halbleiteranordnung

Info

Publication number
ATE271254T1
ATE271254T1 AT01936216T AT01936216T ATE271254T1 AT E271254 T1 ATE271254 T1 AT E271254T1 AT 01936216 T AT01936216 T AT 01936216T AT 01936216 T AT01936216 T AT 01936216T AT E271254 T1 ATE271254 T1 AT E271254T1
Authority
AT
Austria
Prior art keywords
transistor
electrode
sense transistor
sense
oxide layer
Prior art date
Application number
AT01936216T
Other languages
English (en)
Inventor
Guoqiao Tao
Johannes Dijkstra
Robertus D J Verhaar
Thomas J Davies
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE271254T1 publication Critical patent/ATE271254T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Bipolar Transistors (AREA)
  • Noodles (AREA)
AT01936216T 2000-04-14 2001-04-10 Halbleiteranordnung ATE271254T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP00201354 2000-04-14
PCT/EP2001/004078 WO2001080247A1 (en) 2000-04-14 2001-04-10 Semiconductor device

Publications (1)

Publication Number Publication Date
ATE271254T1 true ATE271254T1 (de) 2004-07-15

Family

ID=8171352

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01936216T ATE271254T1 (de) 2000-04-14 2001-04-10 Halbleiteranordnung

Country Status (8)

Country Link
US (1) US6515912B1 (de)
EP (1) EP1281179B1 (de)
JP (1) JP2003531484A (de)
KR (1) KR100734637B1 (de)
AT (1) ATE271254T1 (de)
DE (1) DE60104303T2 (de)
TW (1) TW533598B (de)
WO (1) WO2001080247A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4530464B2 (ja) * 2000-03-09 2010-08-25 ルネサスエレクトロニクス株式会社 半導体集積回路
FR2871281B1 (fr) * 2004-04-01 2008-06-13 Atmel Corp Procede et dispositif d'alimentation de puissance duale pour une memoire non-volatile embarquee
WO2005096796A2 (en) * 2004-04-01 2005-10-20 Atmel Corporation Method and apparatus for a dual power supply to embedded non-volatile memory
JP4215018B2 (ja) * 2005-03-29 2009-01-28 セイコーエプソン株式会社 不揮発性半導体記憶装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US294810A (en) * 1884-03-11 Edward j
IT1230363B (it) * 1989-08-01 1991-10-18 Sgs Thomson Microelectronics Cella di memoria eeprom, con protezione migliorata da errori dovuti a rottura della cella.
US5742542A (en) * 1995-07-03 1998-04-21 Advanced Micro Devices, Inc. Non-volatile memory cells using only positive charge to store data
US5640344A (en) * 1995-07-25 1997-06-17 Btr, Inc. Programmable non-volatile bidirectional switch for programmable logic
KR100192584B1 (ko) * 1996-06-05 1999-06-15 윤종용 불휘발성 반도체 메모리 장치의 소거 방법
US5838040A (en) * 1997-03-31 1998-11-17 Gatefield Corporation Nonvolatile reprogrammable interconnect cell with FN tunneling in sense
US5761116A (en) 1996-10-07 1998-06-02 Advanced Micro Devices, Inc. Vpp only scalable EEPROM memory cell having transistors with thin tunnel gate oxide
JPH1139659A (ja) * 1997-07-23 1999-02-12 Nec Corp 光ディスク装置
US6009033A (en) * 1998-11-24 1999-12-28 Advanced Micro Devices, Inc. Method of programming and erasing an EEPROM device under an elevated temperature and apparatus thereof
US6294810B1 (en) * 1998-12-22 2001-09-25 Vantis Corporation EEPROM cell with tunneling at separate edge and channel regions

Also Published As

Publication number Publication date
JP2003531484A (ja) 2003-10-21
US6515912B1 (en) 2003-02-04
EP1281179A1 (de) 2003-02-05
DE60104303D1 (de) 2004-08-19
DE60104303T2 (de) 2005-07-21
KR20020071718A (ko) 2002-09-13
EP1281179B1 (de) 2004-07-14
TW533598B (en) 2003-05-21
WO2001080247A1 (en) 2001-10-25
KR100734637B1 (ko) 2007-07-02

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Legal Events

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