ATE282210T1 - Prüfvorrichtung für eine integrierte schaltung - Google Patents

Prüfvorrichtung für eine integrierte schaltung

Info

Publication number
ATE282210T1
ATE282210T1 AT94927686T AT94927686T ATE282210T1 AT E282210 T1 ATE282210 T1 AT E282210T1 AT 94927686 T AT94927686 T AT 94927686T AT 94927686 T AT94927686 T AT 94927686T AT E282210 T1 ATE282210 T1 AT E282210T1
Authority
AT
Austria
Prior art keywords
integrated circuit
testing
pct
testing portion
inputs
Prior art date
Application number
AT94927686T
Other languages
English (en)
Inventor
Olli Piirainen
Original Assignee
Nokia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nokia Corp filed Critical Nokia Corp
Application granted granted Critical
Publication of ATE282210T1 publication Critical patent/ATE282210T1/de

Links

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317Testing of digital circuits
    • G01R31/3181Functional testing
    • G01R31/3185Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318555Control logic

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Particle Accelerators (AREA)
  • Video Image Reproduction Devices For Color Tv Systems (AREA)
  • Alarm Systems (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
AT94927686T 1993-10-01 1994-09-30 Prüfvorrichtung für eine integrierte schaltung ATE282210T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI934327A FI100136B (fi) 1993-10-01 1993-10-01 Menetelmä integroidun piirin testaamiseksi sekä integroitu piiri
PCT/FI1994/000439 WO1995010048A1 (en) 1993-10-01 1994-09-30 A method and device for testing of an integrated circuit

Publications (1)

Publication Number Publication Date
ATE282210T1 true ATE282210T1 (de) 2004-11-15

Family

ID=8538699

Family Applications (1)

Application Number Title Priority Date Filing Date
AT94927686T ATE282210T1 (de) 1993-10-01 1994-09-30 Prüfvorrichtung für eine integrierte schaltung

Country Status (10)

Country Link
US (1) US5786703A (de)
EP (1) EP0721591B1 (de)
JP (1) JPH09503302A (de)
CN (1) CN1052308C (de)
AT (1) ATE282210T1 (de)
AU (1) AU681698B2 (de)
DE (1) DE69434129D1 (de)
FI (1) FI100136B (de)
NO (1) NO961303L (de)
WO (1) WO1995010048A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6522985B1 (en) * 1989-07-31 2003-02-18 Texas Instruments Incorporated Emulation devices, systems and methods utilizing state machines
US6229296B1 (en) 1996-02-27 2001-05-08 Micron Technology, Inc. Circuit and method for measuring and forcing an internal voltage of an integrated circuit
US5977763A (en) * 1996-02-27 1999-11-02 Micron Technology, Inc. Circuit and method for measuring and forcing an internal voltage of an integrated circuit
JPH11108998A (ja) * 1997-10-02 1999-04-23 Mitsubishi Electric Corp 集積回路のテスト装置
US5991910A (en) * 1997-10-29 1999-11-23 Microchip Technology Incorporated Microcontroller having special mode enable detection circuitry and a method of operation therefore
US6946863B1 (en) 1998-02-27 2005-09-20 Micron Technology, Inc. Circuit and method for measuring and forcing an internal voltage of an integrated circuit
KR20050084395A (ko) * 2002-12-20 2005-08-26 코닌클리즈케 필립스 일렉트로닉스 엔.브이. 테스트 액세스 포트 제어기 커플링 방법 및 집적회로
US7274203B2 (en) * 2005-10-25 2007-09-25 Freescale Semiconductor, Inc. Design-for-test circuit for low pin count devices
CN101135718B (zh) * 2007-09-10 2010-06-02 中兴通讯股份有限公司 一种驱动器电路
US8839063B2 (en) * 2013-01-24 2014-09-16 Texas Instruments Incorporated Circuits and methods for dynamic allocation of scan test resources
US9500700B1 (en) * 2013-11-15 2016-11-22 Xilinx, Inc. Circuits for and methods of testing the operation of an input/output port
CN108957283B (zh) * 2017-05-19 2021-08-03 龙芯中科技术股份有限公司 辐照实验板、监控终端、asic芯片辐照实验系统
US11567121B2 (en) * 2020-03-31 2023-01-31 Texas Instruments Incorporated Integrated circuit with embedded testing circuitry

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4479088A (en) * 1981-01-16 1984-10-23 Burroughs Corporation Wafer including test lead connected to ground for testing networks thereon
DE3526485A1 (de) * 1985-07-24 1987-02-05 Heinz Krug Schaltungsanordnung zum pruefen integrierter schaltungseinheiten
US4817093A (en) * 1987-06-18 1989-03-28 International Business Machines Corporation Method of partitioning, testing and diagnosing a VLSI multichip package and associated structure
US5053700A (en) * 1989-02-14 1991-10-01 Amber Engineering, Inc. Method for wafer scale testing of redundant integrated circuit dies
JP2561164B2 (ja) * 1990-02-26 1996-12-04 三菱電機株式会社 半導体集積回路
EP0514700B1 (de) * 1991-05-23 1998-07-29 MOTOROLA GmbH Ausführung der IEEE 1149.1-Schnittstellenarchitektur
JP2741119B2 (ja) * 1991-09-17 1998-04-15 三菱電機株式会社 バイパススキャンパスおよびそれを用いた集積回路装置
US5241266A (en) * 1992-04-10 1993-08-31 Micron Technology, Inc. Built-in test circuit connection for wafer level burnin and testing of individual dies

Also Published As

Publication number Publication date
AU7700894A (en) 1995-05-01
JPH09503302A (ja) 1997-03-31
FI934327A0 (fi) 1993-10-01
DE69434129D1 (de) 2004-12-16
CN1052308C (zh) 2000-05-10
EP0721591A1 (de) 1996-07-17
US5786703A (en) 1998-07-28
CN1132554A (zh) 1996-10-02
WO1995010048A1 (en) 1995-04-13
FI100136B (fi) 1997-09-30
NO961303D0 (no) 1996-03-29
FI934327A7 (fi) 1995-04-02
EP0721591B1 (de) 2004-11-10
NO961303L (no) 1996-05-29
AU681698B2 (en) 1997-09-04

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Legal Events

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