ATE285634T1 - Technologie fuer integrierte schaltungen - Google Patents

Technologie fuer integrierte schaltungen

Info

Publication number
ATE285634T1
ATE285634T1 AT00909601T AT00909601T ATE285634T1 AT E285634 T1 ATE285634 T1 AT E285634T1 AT 00909601 T AT00909601 T AT 00909601T AT 00909601 T AT00909601 T AT 00909601T AT E285634 T1 ATE285634 T1 AT E285634T1
Authority
AT
Austria
Prior art keywords
technology
integrated circuits
customized
interconnections
programmable
Prior art date
Application number
AT00909601T
Other languages
English (en)
Inventor
Zvi Or-Bach
Ze Ev Wurman
Richard Zeman
Laurance Cooke
Original Assignee
Easic Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/265,998 external-priority patent/US6194912B1/en
Priority claimed from US09/310,962 external-priority patent/US6236229B1/en
Priority claimed from US09/371,031 external-priority patent/US6331733B1/en
Priority claimed from US09/428,460 external-priority patent/US6245634B1/en
Application filed by Easic Corp filed Critical Easic Corp
Application granted granted Critical
Publication of ATE285634T1 publication Critical patent/ATE285634T1/de

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748Structural details of configuration resources
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724Structural details of logic blocks
    • H03K19/17728Reconfigurable logic blocks, e.g. lookup tables
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736Structural details of routing resources
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736Structural details of routing resources
    • H03K19/17744Structural details of routing resources for input/output signals
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748Structural details of configuration resources
    • H03K19/17764Structural details of configuration resources for reliability
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778Structural details for adapting physical parameters
    • H03K19/17796Structural details for adapting physical parameters for physical disposition of blocks

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Logic Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
AT00909601T 1999-03-11 2000-03-10 Technologie fuer integrierte schaltungen ATE285634T1 (de)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US09/265,998 US6194912B1 (en) 1999-03-11 1999-03-11 Integrated circuit device
US09/310,962 US6236229B1 (en) 1999-05-13 1999-05-13 Integrated circuits which employ look up tables to provide highly efficient logic cells and logic functionalities
US09/371,031 US6331733B1 (en) 1999-08-10 1999-08-10 Semiconductor device
US09/428,460 US6245634B1 (en) 1999-10-28 1999-10-28 Method for design and manufacture of semiconductors
US45517799A 1999-12-06 1999-12-06
PCT/IL2000/000149 WO2000054411A1 (en) 1999-03-11 2000-03-10 Integrated circuit technology

Publications (1)

Publication Number Publication Date
ATE285634T1 true ATE285634T1 (de) 2005-01-15

Family

ID=27540487

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00909601T ATE285634T1 (de) 1999-03-11 2000-03-10 Technologie fuer integrierte schaltungen

Country Status (5)

Country Link
EP (2) EP1161797B1 (de)
AT (1) ATE285634T1 (de)
AU (1) AU3188000A (de)
DE (1) DE60016902D1 (de)
WO (1) WO2000054411A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1444616A4 (de) * 2001-10-16 2005-08-24 Leopard Logic Inc Kernzelle eines am einsatzort programmierbaren gate-arrays mit effizienter logikpackung
US7243329B2 (en) * 2004-07-02 2007-07-10 Altera Corporation Application-specific integrated circuit equivalents of programmable logic and associated methods
US7847586B2 (en) 2007-08-20 2010-12-07 Northern Lights Semiconductor Corp. Integrate circuit chip with magnetic devices
CN117135231B (zh) * 2023-10-26 2023-12-29 上海特高信息技术有限公司 一种基于fpga低延时金融大数据流的解压方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5212652A (en) * 1989-08-15 1993-05-18 Advanced Micro Devices, Inc. Programmable gate array with improved interconnect structure
US5191241A (en) * 1990-08-01 1993-03-02 Actel Corporation Programmable interconnect architecture
US5132571A (en) * 1990-08-01 1992-07-21 Actel Corporation Programmable interconnect architecture having interconnects disposed above function modules
US5512765A (en) * 1994-02-03 1996-04-30 National Semiconductor Corporation Extendable circuit architecture
US5761099A (en) * 1994-11-04 1998-06-02 Altera Corporation Programmable logic array integrated circuits with enhanced carry routing
US5652529A (en) * 1995-06-02 1997-07-29 International Business Machines Corporation Programmable array clock/reset resource
US5781031A (en) * 1995-11-21 1998-07-14 International Business Machines Corporation Programmable logic array
JP3486725B2 (ja) * 1995-11-28 2004-01-13 株式会社ルネサステクノロジ 可変論理集積回路
US5825202A (en) * 1996-09-26 1998-10-20 Xilinx, Inc. Integrated circuit with field programmable and application specific logic areas
JP3420694B2 (ja) * 1996-12-27 2003-06-30 株式会社東芝 スタンダードセル方式の集積回路
US6066960A (en) * 1998-05-21 2000-05-23 Altera Corporation Programmable logic device having combinational logic at inputs to logic elements within logic array blocks

Also Published As

Publication number Publication date
EP1533904A1 (de) 2005-05-25
EP1161797A4 (de) 2002-06-05
EP1161797A1 (de) 2001-12-12
WO2000054411A1 (en) 2000-09-14
EP1161797B1 (de) 2004-12-22
DE60016902D1 (de) 2005-01-27
AU3188000A (en) 2000-09-28

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties