ATE286284T1 - Verfahren zu durchführung einer ausrichtungsmessung von zwei mustern in unterschiedlichen schichten eines halbleiterwafers - Google Patents

Verfahren zu durchführung einer ausrichtungsmessung von zwei mustern in unterschiedlichen schichten eines halbleiterwafers

Info

Publication number
ATE286284T1
ATE286284T1 AT01111670T AT01111670T ATE286284T1 AT E286284 T1 ATE286284 T1 AT E286284T1 AT 01111670 T AT01111670 T AT 01111670T AT 01111670 T AT01111670 T AT 01111670T AT E286284 T1 ATE286284 T1 AT E286284T1
Authority
AT
Austria
Prior art keywords
alignment
exposure
field
patterns
measurement
Prior art date
Application number
AT01111670T
Other languages
English (en)
Inventor
Rolf Heine
Sebastian Schmidt
Thorsten Schedel
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Application granted granted Critical
Publication of ATE286284T1 publication Critical patent/ATE286284T1/de

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7003—Alignment type or strategy, e.g. leveling, global alignment
    • G03F9/7046—Strategy, e.g. mark, sensor or wavelength selection
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • G03F9/70—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically for microlithography
    • G03F9/7073—Alignment marks and their environment
    • G03F9/7076—Mark details, e.g. phase grating mark, temporary mark
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/0002—Inspection of images, e.g. flaw detection
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/0002—Inspection of images, e.g. flaw detection
    • G06T7/0004—Industrial image inspection
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00—Image analysis
    • G06T7/30—Determination of transform parameters for the alignment of images, i.e. image registration
    • G06T7/33—Determination of transform parameters for the alignment of images, i.e. image registration using feature-based methods
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T2207/00—Indexing scheme for image analysis or image enhancement
    • G06T2207/30—Subject of image; Context of image processing
    • G06T2207/30108—Industrial image inspection
    • G06T2207/30148—Semiconductor; IC; Wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
AT01111670T 2001-05-14 2001-05-14 Verfahren zu durchführung einer ausrichtungsmessung von zwei mustern in unterschiedlichen schichten eines halbleiterwafers ATE286284T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP01111670A EP1258834B1 (de) 2001-05-14 2001-05-14 Verfahren zu Durchführung einer Ausrichtungsmessung von zwei Mustern in unterschiedlichen Schichten eines Halbleiterwafers

Publications (1)

Publication Number Publication Date
ATE286284T1 true ATE286284T1 (de) 2005-01-15

Family

ID=8177420

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01111670T ATE286284T1 (de) 2001-05-14 2001-05-14 Verfahren zu durchführung einer ausrichtungsmessung von zwei mustern in unterschiedlichen schichten eines halbleiterwafers

Country Status (9)

Country Link
US (1) US6908775B2 (de)
EP (1) EP1258834B1 (de)
JP (1) JP2004531063A (de)
KR (1) KR100540629B1 (de)
AT (1) ATE286284T1 (de)
DE (1) DE60108082T2 (de)
IL (1) IL158875A0 (de)
TW (1) TW564510B (de)
WO (1) WO2002093485A1 (de)

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US6864493B2 (en) * 2001-05-30 2005-03-08 Hitachi, Ltd. Charged particle beam alignment method and charged particle beam apparatus
WO2005022600A2 (en) * 2003-08-29 2005-03-10 Inficon Lt, Inc. Method and systems for processing overlay data
JP4289961B2 (ja) * 2003-09-26 2009-07-01 キヤノン株式会社 位置決め装置
DE10345466A1 (de) * 2003-09-30 2005-04-28 Infineon Technologies Ag Verfahren zur Erfassung von Plazierungsfehlern von Schaltungsmustern bei der Übertragung mittels einer Maske in Schichten eines Substrats eines Halbleiterwafers
JP4295748B2 (ja) * 2004-06-21 2009-07-15 アプライド マテリアルズ イスラエル リミテッド 走査ビームアレイを使用する複数の重要領域を含む対象物を走査する方法
US7586609B2 (en) * 2005-04-21 2009-09-08 Macronix International Co., Ltd. Method for analyzing overlay errors
KR100598988B1 (ko) * 2005-05-18 2006-07-12 주식회사 하이닉스반도체 오버레이 버니어 및 이를 이용한 반도체소자의 제조방법
JP2006337631A (ja) * 2005-06-01 2006-12-14 Mitsubishi Electric Corp 検査方法及びこれを用いた液晶表示装置の製造方法
JP2007103658A (ja) * 2005-10-04 2007-04-19 Canon Inc 露光方法および装置ならびにデバイス製造方法
CN100578370C (zh) * 2006-04-18 2010-01-06 中华映管股份有限公司 产生对准记号的方法
KR100790826B1 (ko) * 2006-06-30 2008-01-02 삼성전자주식회사 오버레이 계측방법 및 그가 사용되는 반도체 제조설비의관리시스템
KR101305948B1 (ko) * 2007-12-10 2013-09-12 삼성전자주식회사 기판 정렬 방법 및 이를 수행하기 위한 장치
KR101718359B1 (ko) * 2010-11-29 2017-04-04 삼성전자주식회사 기판 정렬 방법 및 이를 수행하기 위한 장치
US8730475B2 (en) * 2007-12-10 2014-05-20 Samsung Electronics Co., Ltd. Method of aligning a substrate
US9134627B2 (en) * 2011-12-16 2015-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Multiple-patterning overlay decoupling method
US9176396B2 (en) 2013-02-27 2015-11-03 Taiwan Semiconductor Manufacturing Co., Ltd. Overlay sampling methodology
US9164398B2 (en) * 2013-02-27 2015-10-20 Taiwan Semiconductor Manufacturing Co., Ltd. Overlay metrology method
JP6381197B2 (ja) * 2013-10-31 2018-08-29 キヤノン株式会社 計測装置、計測方法、リソグラフィ装置、及び物品製造方法
US9633915B1 (en) * 2016-03-01 2017-04-25 Globalfoundries Inc. Method of using dummy patterns for overlay target design and overlay control
US9754895B1 (en) 2016-03-07 2017-09-05 Micron Technology, Inc. Methods of forming semiconductor devices including determining misregistration between semiconductor levels and related apparatuses
EP3404488A1 (de) * 2017-05-19 2018-11-21 ASML Netherlands B.V. Verfahren zur messung eines ziels, metrologievorrichtung, lithographiezelle und ziel
US10964566B2 (en) * 2018-06-29 2021-03-30 Taiwan Semiconductor Manufacturing Go., Ltd. Machine learning on overlay virtual metrology
CN111354670B (zh) * 2018-12-20 2023-05-26 夏泰鑫半导体(青岛)有限公司 对准方法、对准系统及计算机可读存储介质
WO2020186456A1 (zh) * 2019-03-19 2020-09-24 京东方科技集团股份有限公司 转印方法和转印装置
CN111240162B (zh) * 2020-03-10 2022-07-15 上海华力微电子有限公司 改善光刻机对准的方法
CN113823581B (zh) * 2020-06-19 2023-09-22 长鑫存储技术有限公司 半导体工艺生产线派货方法、存储介质以及半导体设备
CN111900116A (zh) * 2020-06-22 2020-11-06 中国科学院微电子研究所 晶圆的对准方法及对准系统
US11635680B2 (en) 2020-08-14 2023-04-25 Changxin Memory Technologies, Inc. Overlay pattern
JP7545278B2 (ja) * 2020-09-25 2024-09-04 キヤノン株式会社 サンプルショット領域のセットを決定する方法、計測値を得る方法、情報処理装置、リソグラフィ装置、プログラム、および物品製造方法
CN115440706B (zh) * 2022-09-16 2025-10-28 上海华力微电子有限公司 目标基准结构的选择及基于其制备半导体结构的方法

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US6023338A (en) * 1996-07-12 2000-02-08 Bareket; Noah Overlay alignment measurement of wafers
KR19980030438A (ko) * 1996-10-29 1998-07-25 김영환 반도체 버어니어 구조 및 그것을 이용한 오버레이 정확도 측정방법
JP3757551B2 (ja) * 1997-06-25 2006-03-22 ソニー株式会社 マスクパターン作成方法およびこの方法により形成されたマスク
US6077756A (en) * 1998-04-24 2000-06-20 Vanguard International Semiconductor Overlay target pattern and algorithm for layer-to-layer overlay metrology for semiconductor processing
US6043134A (en) * 1998-08-28 2000-03-28 Micron Technology, Inc. Semiconductor wafer alignment processes
US6068954A (en) * 1998-09-01 2000-05-30 Micron Technology, Inc. Semiconductor wafer alignment methods
US6357131B1 (en) * 1999-12-20 2002-03-19 Taiwan Semiconductor Manufacturing Company Overlay reliability monitor
US6486954B1 (en) * 2000-09-01 2002-11-26 Kla-Tencor Technologies Corporation Overlay alignment measurement mark

Also Published As

Publication number Publication date
IL158875A0 (en) 2004-05-12
KR100540629B1 (ko) 2006-01-11
EP1258834B1 (de) 2004-12-29
KR20040029993A (ko) 2004-04-08
DE60108082D1 (de) 2005-02-03
US20040101984A1 (en) 2004-05-27
TW564510B (en) 2003-12-01
US6908775B2 (en) 2005-06-21
WO2002093485A1 (en) 2002-11-21
EP1258834A1 (de) 2002-11-20
DE60108082T2 (de) 2005-10-13
JP2004531063A (ja) 2004-10-07

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