ATE289460T1 - Vorrichtung zur synchronisation eines digitalen empfängers - Google Patents

Vorrichtung zur synchronisation eines digitalen empfängers

Info

Publication number
ATE289460T1
ATE289460T1 AT96946329T AT96946329T ATE289460T1 AT E289460 T1 ATE289460 T1 AT E289460T1 AT 96946329 T AT96946329 T AT 96946329T AT 96946329 T AT96946329 T AT 96946329T AT E289460 T1 ATE289460 T1 AT E289460T1
Authority
AT
Austria
Prior art keywords
input
output
coupled
multiplexer
lock
Prior art date
Application number
AT96946329T
Other languages
English (en)
Inventor
Viktor Nikolaevich Parkhomenko
Mikhail Jurievich Rodionov
Mikhail Natanovich Lurie
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of ATE289460T1 publication Critical patent/ATE289460T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/12—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a scanning signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S331/00—Oscillators
    • Y10S331/02—Phase locked loop having lock indicating or detecting means

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Circuits Of Receivers In General (AREA)
  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)
  • Communication Control (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
AT96946329T 1996-12-24 1996-12-24 Vorrichtung zur synchronisation eines digitalen empfängers ATE289460T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/RU1996/000360 WO1998028851A1 (en) 1996-12-24 1996-12-24 Device for synchronising a digital receiver

Publications (1)

Publication Number Publication Date
ATE289460T1 true ATE289460T1 (de) 2005-03-15

Family

ID=20130065

Family Applications (1)

Application Number Title Priority Date Filing Date
AT96946329T ATE289460T1 (de) 1996-12-24 1996-12-24 Vorrichtung zur synchronisation eines digitalen empfängers

Country Status (9)

Country Link
US (1) US6008699A (de)
EP (1) EP0893886B1 (de)
JP (1) JP2000505986A (de)
KR (1) KR100389845B1 (de)
AT (1) ATE289460T1 (de)
AU (1) AU2183197A (de)
DE (1) DE69634365T2 (de)
RU (1) RU2138907C1 (de)
WO (1) WO1998028851A1 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2242093C2 (ru) * 2002-12-16 2004-12-10 Федеральное государственное унитарное предприятие "Ростовский-на-Дону научно-исследовательский институт радиосвязи" Приемник синхросигнала
US7298571B1 (en) * 2006-04-28 2007-11-20 Hitachi Global Storage Technologies Netherlands, B.V. Method and a system for maintaining an acceptable level of relative humidity inside of a disk drive
US8416906B2 (en) * 2010-12-17 2013-04-09 Stmicroelectronics Asia Pacific Pte Ltd Clock resynchronization circuit and method
RU2446560C1 (ru) * 2011-01-11 2012-03-27 Федеральное государственное автономное образовательное учреждение высшего профессионального образования Сибирский федеральный университет (СФУ) Устройство ускоренной синхронизации приемника шумоподобных сигналов с минимальной частотной манипуляцией
RU2446592C1 (ru) * 2011-03-28 2012-03-27 Александр Иосифович Иванов Устройство автоматической подстройки скорости поступающих данных асинхронного информационного потока

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3535651A (en) * 1968-09-04 1970-10-20 Collins Radio Co Phase locked frequency source with automatic search circuit
FR2368178A1 (fr) * 1976-10-15 1978-05-12 Thomson Csf Circuit de commande automatique de frequence
US4034310A (en) * 1977-01-05 1977-07-05 Coe Thomas F Phase-locked loop oscillator
US4115745A (en) * 1977-10-04 1978-09-19 Gte Sylvania Incorporated Phase lock speed-up circuit
US4388598A (en) * 1980-11-03 1983-06-14 The United States Of America As Represented By The Secretary Of The Navy Loss-of-phase-lock indicator circuit
US4375693A (en) * 1981-04-23 1983-03-01 Ford Aerospace & Communications Corporation Adaptive sweep bit synchronizer
SU1256200A1 (ru) * 1982-02-04 1986-09-07 Предприятие П/Я Г-4158 Поискова система фазовой автоподстройки частоты
US4464771A (en) * 1982-04-02 1984-08-07 Motorola, Inc. Phase-locked loop circuit arrangement
JPS58221548A (ja) * 1982-06-18 1983-12-23 Fujitsu Ltd 位相同期回路
FR2605162B1 (fr) * 1986-10-08 1988-12-02 Cit Alcatel Procede et dispositif d'aide a l'acquisition d'une boucle a verrouillage de phase
US4980652A (en) * 1988-09-02 1990-12-25 Nippon Telegraph And Telephone Corporation Frequency synthesizer having compensation for nonlinearities
JP2777929B2 (ja) * 1990-07-04 1998-07-23 富士通株式会社 非同期信号抽出回路
US5148123A (en) * 1991-11-04 1992-09-15 Alcatel Network Systems, Inc. Negative feedback control loop acquisition aid
ES2108631B1 (es) * 1995-03-31 1998-07-01 Alcatel Standard Electrica Recuperador de reloj de datos.
US5754607A (en) * 1995-05-10 1998-05-19 Alcatel Network Systems, Inc. Method and apparatus for achieving fast phase settling in a phase locked loop

Also Published As

Publication number Publication date
EP0893886A1 (de) 1999-01-27
DE69634365D1 (de) 2005-03-24
EP0893886A4 (de) 2003-10-01
KR100389845B1 (ko) 2003-08-19
KR19990087197A (ko) 1999-12-15
JP2000505986A (ja) 2000-05-16
WO1998028851A1 (en) 1998-07-02
US6008699A (en) 1999-12-28
RU2138907C1 (ru) 1999-09-27
EP0893886B1 (de) 2005-02-16
AU2183197A (en) 1998-07-17
DE69634365T2 (de) 2005-12-29

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Legal Events

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