ATE302969T1 - Unterhaltung einer entfernten warteschlange unter benutzung von zwei zählern in der verschiebesteuerung mit hubs und ports - Google Patents

Unterhaltung einer entfernten warteschlange unter benutzung von zwei zählern in der verschiebesteuerung mit hubs und ports

Info

Publication number
ATE302969T1
ATE302969T1 AT00307033T AT00307033T ATE302969T1 AT E302969 T1 ATE302969 T1 AT E302969T1 AT 00307033 T AT00307033 T AT 00307033T AT 00307033 T AT00307033 T AT 00307033T AT E302969 T1 ATE302969 T1 AT E302969T1
Authority
AT
Austria
Prior art keywords
fifo
data
count
remote
master
Prior art date
Application number
AT00307033T
Other languages
English (en)
Inventor
Iain Robertson
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of ATE302969T1 publication Critical patent/ATE302969T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • G06F5/10—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor having a sequence of storage locations each being individually accessible for both enqueue and dequeue operations, e.g. using random access memory
    • G06F5/12—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations
    • G06F5/14—Means for monitoring the fill level; Means for resolving contention, i.e. conflicts between simultaneous enqueue and dequeue operations for overflow or underflow handling, e.g. full or empty flags

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
  • Information Transfer Systems (AREA)
  • Image Input (AREA)
  • Selective Calling Equipment (AREA)
AT00307033T 2000-08-17 2000-08-17 Unterhaltung einer entfernten warteschlange unter benutzung von zwei zählern in der verschiebesteuerung mit hubs und ports ATE302969T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP00307033A EP1182543B1 (de) 2000-08-17 2000-08-17 Unterhaltung einer entfernten Warteschlange unter Benutzung von zwei Zählern in der Verschiebesteuerung mit Hubs und Ports

Publications (1)

Publication Number Publication Date
ATE302969T1 true ATE302969T1 (de) 2005-09-15

Family

ID=8173194

Family Applications (1)

Application Number Title Priority Date Filing Date
AT00307033T ATE302969T1 (de) 2000-08-17 2000-08-17 Unterhaltung einer entfernten warteschlange unter benutzung von zwei zählern in der verschiebesteuerung mit hubs und ports

Country Status (4)

Country Link
US (1) US6892253B2 (de)
EP (1) EP1182543B1 (de)
AT (1) ATE302969T1 (de)
DE (1) DE60022186T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1421506A2 (de) * 2001-06-29 2004-05-26 Koninklijke Philips Electronics N.V. Datenverarbeitungsgerät und verfahren zur synchronisierung einer ersten und zweiten verarbeitungsvorrichtung in einem datenverarbeitungsgerät
CN1585924B (zh) * 2001-11-13 2010-05-26 Nxp股份有限公司 使用信号量进行fifo通信的方法和设备及计算机系统
CN100437466C (zh) * 2002-06-07 2008-11-26 Nxp股份有限公司 向/从fifo存储器读取/写入数据单元的设备和方法
US6970962B2 (en) * 2003-05-19 2005-11-29 International Business Machines Corporation Transfer request pipeline throttling
US7454538B2 (en) * 2005-05-11 2008-11-18 Qualcomm Incorporated Latency insensitive FIFO signaling protocol
US7673076B2 (en) * 2005-05-13 2010-03-02 Texas Instruments Incorporated Concurrent read response acknowledge enhanced direct memory access unit
US20090216959A1 (en) * 2008-02-27 2009-08-27 Brian David Allison Multi Port Memory Controller Queuing
US20090216960A1 (en) * 2008-02-27 2009-08-27 Brian David Allison Multi Port Memory Controller Queuing
US20110029706A1 (en) * 2008-04-09 2011-02-03 Nxp B.V. Electronic device and method for controlling an electronic device

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4258418A (en) * 1978-12-28 1981-03-24 International Business Machines Corporation Variable capacity data buffer system
DE3374256D1 (en) * 1983-07-28 1987-12-03 Ibm Shift register arrangement and data transmission system comprising such an arrangement
US4833651A (en) * 1986-07-24 1989-05-23 National Semiconductor Corporation High-speed, asynchronous, No-Fall-Through, first-in-first out memory with high data integrity
DE68916945T2 (de) * 1989-04-28 1995-03-16 Ibm Synchronisierschaltung für Datenüberträge zwischen zwei mit unterschiedlicher Geschwindigkeit arbeitenden Geräten.
GB9024084D0 (en) * 1990-11-06 1990-12-19 Int Computers Ltd First-in-first-out buffer
US5450546A (en) * 1992-01-31 1995-09-12 Adaptec, Inc. Intelligent hardware for automatically controlling buffer memory storage space in a disk drive
US5644787A (en) * 1993-08-03 1997-07-01 Seiko Epson Corporation Apparatus for controlling data transfer between external interfaces through buffer memory using table data having transfer start address transfer count and unit selection parameter
US6049842A (en) * 1997-05-01 2000-04-11 International Business Machines Corporation Efficient data transfer mechanism for input/output devices
KR100251950B1 (ko) * 1997-06-26 2000-04-15 윤종용 데이타 저장장치의 버퍼 룸 로직과 그 제어방법
US6055285A (en) * 1997-11-17 2000-04-25 Qlogic Corporation Synchronization circuit for transferring pointer between two asynchronous circuits
US5884101A (en) * 1998-04-17 1999-03-16 I-Cube, Inc. Apparatus for detecting data buffer faults
JP2000031997A (ja) * 1998-07-15 2000-01-28 Fujitsu Ltd 帯域管理装置及びその方法
US6397273B2 (en) * 1998-12-18 2002-05-28 Emc Corporation System having an enhanced parity mechanism in a data assembler/disassembler for use in a pipeline of a host-storage system interface to global memory
US6401149B1 (en) * 1999-05-05 2002-06-04 Qlogic Corporation Methods for context switching within a disk controller
US6349372B1 (en) * 1999-05-19 2002-02-19 International Business Machines Corporation Virtual uncompressed cache for compressed main memory

Also Published As

Publication number Publication date
DE60022186T2 (de) 2006-06-08
DE60022186D1 (de) 2005-09-29
US6892253B2 (en) 2005-05-10
US20020120796A1 (en) 2002-08-29
EP1182543B1 (de) 2005-08-24
EP1182543A1 (de) 2002-02-27

Similar Documents

Publication Publication Date Title
ATE302969T1 (de) Unterhaltung einer entfernten warteschlange unter benutzung von zwei zählern in der verschiebesteuerung mit hubs und ports
EP0241113B1 (de) Verkehrsscheduler für Übertragungskanäle mit Mehrfachzugriff
US7301906B2 (en) Methods and structures for improved buffer management and dynamic adaption of flow control status in high-speed communication networks
Bruneel Performance of discrete-time queueing systems
US8718073B2 (en) Method and apparatus for signaling virtual channel support in communication networks
US5978868A (en) System for generating buffer status flags by comparing read and write pointers and determining direction of progression of read pointer with respect to write pointer
US20080162860A1 (en) Dynamic allocation of message buffers
US6950395B1 (en) Method and apparatus for a token bucket metering or policing system with a delayed filling scheme
EP1347601A3 (de) Mehrstrecken-Netzwehrk für Sendung der Pakete deren Grösse durch Sprungszahl festgestellt wird
US4707693A (en) Through-traffic priority protocol in a communications system
US7272149B2 (en) Bandwidth allocation systems and methods
US20050138238A1 (en) Flow control interface
US6092128A (en) Ethernet repeater that couples an input data stream to multiple output data streams of differing rates and provides access to a shared bus by a number of inputs and outputs
WO2004012404A3 (en) Methods and apparatus for credit-based flow control
GB2349312A (en) Ageing of data packets using queue pointers
US5991867A (en) Transmit scheduler for an asynchronous transfer mode network and method of operation
US7106693B1 (en) Method and apparatus for pacing the flow of information sent from a device
CN101213534B (zh) 用于对延时不敏感的fifo信令协议的方法和设备
US20050058130A1 (en) Method and apparatus for assigning data traffic classes to virtual channels in communications networks
KR20030027074A (ko) 데이터 송신을 위해 데이터 프레임 우선순위 관리기능을갖는 네트워크 송신기
WO2023284337A1 (zh) 光业务单元的映射方法及装置、存储介质、电子装置
RU98100356A (ru) Система доступа к локальной сети режима асинхронной передачи
US7701964B2 (en) Distributed device identifier numbering and total device counting algorithm with smart time division multiplexed serial port
US20020041650A1 (en) Elastic serial buffer to compensate for different transmit and receive clock rates for any serial protocol
EP0969356A3 (de) Pufferverwaltungssystem und -Verfahren, Frei-Zeiger-FIFOs benutzend, die Zeiger zu leeren Puffern enthalten

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties