ATE317567T1 - Digitales bussystem - Google Patents
Digitales bussystemInfo
- Publication number
- ATE317567T1 ATE317567T1 AT01983044T AT01983044T ATE317567T1 AT E317567 T1 ATE317567 T1 AT E317567T1 AT 01983044 T AT01983044 T AT 01983044T AT 01983044 T AT01983044 T AT 01983044T AT E317567 T1 ATE317567 T1 AT E317567T1
- Authority
- AT
- Austria
- Prior art keywords
- data
- transmitter units
- bus system
- clk2
- clock signal
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3253—Power saving in bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
- G06F13/362—Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
- G06F13/423—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with synchronous protocol
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4265—Bus transfer protocol, e.g. handshake; Synchronisation on a point to point bus
- G06F13/4273—Bus transfer protocol, e.g. handshake; Synchronisation on a point to point bus using a clocked protocol
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
- Small-Scale Networks (AREA)
- Information Transfer Systems (AREA)
- Communication Control (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| SE0004832A SE516758C2 (sv) | 2000-12-22 | 2000-12-22 | Digitalt bussystem |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE317567T1 true ATE317567T1 (de) | 2006-02-15 |
Family
ID=20282411
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT01983044T ATE317567T1 (de) | 2000-12-22 | 2001-11-13 | Digitales bussystem |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20020083241A1 (de) |
| EP (1) | EP1344139B1 (de) |
| AT (1) | ATE317567T1 (de) |
| DE (1) | DE60117163D1 (de) |
| SE (1) | SE516758C2 (de) |
| WO (1) | WO2002052421A1 (de) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3852703B2 (ja) * | 2001-08-29 | 2006-12-06 | アナログ・デバイシズ・インコーポレーテッド | 無線システムにおけるタイミングおよび事象処理の方法および装置 |
| US7606960B2 (en) * | 2004-03-26 | 2009-10-20 | Intel Corporation | Apparatus for adjusting a clock frequency of a variable speed bus |
| US7281148B2 (en) * | 2004-03-26 | 2007-10-09 | Intel Corporation | Power managed busses and arbitration |
| US7197591B2 (en) * | 2004-06-30 | 2007-03-27 | Intel Corporation | Dynamic lane, voltage and frequency adjustment for serial interconnect |
| WO2006082458A1 (en) * | 2005-01-31 | 2006-08-10 | Freescale Semiconductor, Inc. | Bus arbitration controller with reduced energy consumption |
| KR101622195B1 (ko) * | 2009-11-05 | 2016-05-18 | 삼성전자주식회사 | 동적 버스 클럭을 제어하기 위한 장치 및 방법 |
| US8762760B2 (en) * | 2010-09-14 | 2014-06-24 | Xilinx, Inc. | Method and apparatus for adaptive power control in a multi-lane communication channel |
| US9929972B2 (en) * | 2011-12-16 | 2018-03-27 | Qualcomm Incorporated | System and method of sending data via a plurality of data lines on a bus |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4210780A (en) * | 1978-03-27 | 1980-07-01 | The Mitre Corporation | Multiple access digital communications system |
| FR2490434B1 (fr) * | 1980-09-12 | 1988-03-18 | Quinquis Jean Paul | Dispositif de resolution des conflits d'acces et d'allocation d'une liaison de type bus interconnectant un ensemble de processeurs non hierarchises |
| CA1278871C (en) * | 1986-02-24 | 1991-01-08 | Frederick O. R. Miesterfeld | Method of data arbitration and collision detection on a data bus |
| US5642360A (en) * | 1995-08-28 | 1997-06-24 | Trainin; Solomon | System and method for improving network performance through inter frame spacing adaptation |
| US5862353A (en) * | 1997-03-25 | 1999-01-19 | International Business Machines Corporation | Systems and methods for dynamically controlling a bus |
| US6526518B1 (en) * | 1997-05-22 | 2003-02-25 | Creative Technology, Ltd. | Programmable bus |
| JPH11184554A (ja) * | 1997-12-24 | 1999-07-09 | Mitsubishi Electric Corp | クロック制御タイプ情報処理装置 |
| DE19911830A1 (de) * | 1999-03-17 | 2000-09-21 | Bosch Gmbh Robert | Verfahren zum Verwalten des Zugriffs auf einen Bus und Bussystem |
| US6728890B1 (en) * | 2000-09-26 | 2004-04-27 | Sun Microsystems, Inc. | Method and apparatus for controlling a bus clock frequency in response to a signal from a requesting component |
-
2000
- 2000-12-22 SE SE0004832A patent/SE516758C2/sv not_active IP Right Cessation
-
2001
- 2001-11-13 DE DE60117163T patent/DE60117163D1/de not_active Expired - Lifetime
- 2001-11-13 EP EP01983044A patent/EP1344139B1/de not_active Expired - Lifetime
- 2001-11-13 WO PCT/SE2001/002514 patent/WO2002052421A1/en not_active Ceased
- 2001-11-13 AT AT01983044T patent/ATE317567T1/de not_active IP Right Cessation
- 2001-12-21 US US10/024,565 patent/US20020083241A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| SE0004832D0 (sv) | 2000-12-22 |
| EP1344139A1 (de) | 2003-09-17 |
| SE0004832L (sv) | 2002-02-26 |
| US20020083241A1 (en) | 2002-06-27 |
| DE60117163D1 (de) | 2006-04-20 |
| WO2002052421A1 (en) | 2002-07-04 |
| SE516758C2 (sv) | 2002-02-26 |
| EP1344139B1 (de) | 2006-02-08 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |