ATE322805T1 - Verfahren zur kontrollierten tintenstrahlverteilung von polymeren zum isolieren und/oder schützen von gedruckten schaltungen - Google Patents

Verfahren zur kontrollierten tintenstrahlverteilung von polymeren zum isolieren und/oder schützen von gedruckten schaltungen

Info

Publication number
ATE322805T1
ATE322805T1 AT03775811T AT03775811T ATE322805T1 AT E322805 T1 ATE322805 T1 AT E322805T1 AT 03775811 T AT03775811 T AT 03775811T AT 03775811 T AT03775811 T AT 03775811T AT E322805 T1 ATE322805 T1 AT E322805T1
Authority
AT
Austria
Prior art keywords
printed circuits
polymers
insulating
ink jet
controlled ink
Prior art date
Application number
AT03775811T
Other languages
English (en)
Inventor
Cesare Fumo
Jozef Vodopivec
Original Assignee
New System Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by New System Srl filed Critical New System Srl
Application granted granted Critical
Publication of ATE322805T1 publication Critical patent/ATE322805T1/de

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/013—Inkjet printing, e.g. for printing insulating material or resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0597—Resist applied over the edges or sides of conductors, e.g. for protection during etching or plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Ink Jet (AREA)
  • Treatment Of Fiber Materials (AREA)
  • Ink Jet Recording Methods And Recording Media Thereof (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
AT03775811T 2002-11-11 2003-10-31 Verfahren zur kontrollierten tintenstrahlverteilung von polymeren zum isolieren und/oder schützen von gedruckten schaltungen ATE322805T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT000238A ITUD20020238A1 (it) 2002-11-11 2002-11-11 Metodo per la stesura controllata a getto d'inchiostro di polimeri per isolamento e/o protezione di circuiti stampati

Publications (1)

Publication Number Publication Date
ATE322805T1 true ATE322805T1 (de) 2006-04-15

Family

ID=32310210

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03775811T ATE322805T1 (de) 2002-11-11 2003-10-31 Verfahren zur kontrollierten tintenstrahlverteilung von polymeren zum isolieren und/oder schützen von gedruckten schaltungen

Country Status (10)

Country Link
US (1) US8236373B2 (de)
EP (1) EP1563720B1 (de)
KR (1) KR101051854B1 (de)
CN (1) CN100482040C (de)
AT (1) ATE322805T1 (de)
DE (1) DE60304491T2 (de)
DK (1) DK1563720T3 (de)
ES (1) ES2261987T3 (de)
IT (1) ITUD20020238A1 (de)
WO (1) WO2004045261A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102006002695A1 (de) * 2006-01-11 2007-08-09 Siemens Ag Piezostack mit neuartiger Passivierung
US9237655B1 (en) * 2013-03-15 2016-01-12 Lockheed Martin Corporation Material deposition on circuit card assemblies
JP2017147388A (ja) * 2016-02-19 2017-08-24 株式会社デンソー 電子装置の製造方法
US10905017B2 (en) * 2016-03-26 2021-01-26 Nano Dimension Technologies Ltd. Fabrication of PCB and FPC with shielded tracks and/or components using 3D inkjet printing
EP3833531B1 (de) * 2018-09-14 2023-06-28 Align Technology, Inc. Hybrides 3d-drucken mit lichthärtbaren materialien
CN113906834B (zh) 2019-05-01 2024-09-13 Io技术集团公司 用以使用3d印刷电连接芯片与顶部连接器的方法
US11528802B2 (en) * 2019-12-23 2022-12-13 Tactotek Oy Integrated functional multilayer structure and method of manufacture therefor
US11446750B2 (en) 2020-02-03 2022-09-20 Io Tech Group Ltd. Systems for printing solder paste and other viscous materials at high resolution
US11622451B2 (en) 2020-02-26 2023-04-04 Io Tech Group Ltd. Systems and methods for solder paste printing on components
US11497124B2 (en) * 2020-06-09 2022-11-08 Io Tech Group Ltd. Methods for printing conformal materials on component edges at high resolution
US11691332B2 (en) 2020-08-05 2023-07-04 Io Tech Group Ltd. Systems and methods for 3D printing with vacuum assisted laser printing machine

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3508984A (en) * 1967-06-29 1970-04-28 Electro Connective Systems Inc Method of producing printed circuits
US5683924A (en) * 1994-10-31 1997-11-04 Sgs-Thomson Microelectronics, Inc. Method of forming raised source/drain regions in a integrated circuit
GB2369087B (en) 1997-10-14 2002-10-02 Patterning Technologies Ltd Method of forming a circuit element on a surface
JP4003273B2 (ja) * 1998-01-19 2007-11-07 セイコーエプソン株式会社 パターン形成方法および基板製造装置
WO1999048339A1 (en) * 1998-03-17 1999-09-23 Seiko Epson Corporation Substrate for patterning thin film and surface treatment thereof
KR100803770B1 (ko) * 2000-03-07 2008-02-15 에이에스엠 인터내셔널 엔.브이. 구배（ｇｒａｄｅｄ）박막
US6320137B1 (en) * 2000-04-11 2001-11-20 3M Innovative Properties Company Flexible circuit with coverplate layer and overlapping protective layer
US6710381B1 (en) * 2002-10-08 2004-03-23 Macronix International Co., Ltd. Memory device structure with composite buried and raised bit line

Also Published As

Publication number Publication date
CN100482040C (zh) 2009-04-22
US20050263875A1 (en) 2005-12-01
EP1563720A1 (de) 2005-08-17
ITUD20020238A1 (it) 2004-05-12
CN1711810A (zh) 2005-12-21
KR20050053792A (ko) 2005-06-08
US8236373B2 (en) 2012-08-07
DE60304491T2 (de) 2006-12-07
EP1563720B1 (de) 2006-04-05
DE60304491D1 (de) 2006-05-18
KR101051854B1 (ko) 2011-07-25
WO2004045261A1 (en) 2004-05-27
DK1563720T3 (da) 2006-08-07
ES2261987T3 (es) 2006-11-16

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