ATE330282T1 - Architektur für eingebaute gigabitvermittlung - Google Patents

Architektur für eingebaute gigabitvermittlung

Info

Publication number
ATE330282T1
ATE330282T1 AT01927326T AT01927326T ATE330282T1 AT E330282 T1 ATE330282 T1 AT E330282T1 AT 01927326 T AT01927326 T AT 01927326T AT 01927326 T AT01927326 T AT 01927326T AT E330282 T1 ATE330282 T1 AT E330282T1
Authority
AT
Austria
Prior art keywords
data port
data
interface
port interface
management unit
Prior art date
Application number
AT01927326T
Other languages
English (en)
Inventor
Govind Malalur
Shiri Kadambi
Shekhar Ambe
Mohan Kalkunte
Original Assignee
Broadcom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Broadcom Corp filed Critical Broadcom Corp
Application granted granted Critical
Publication of ATE330282T1 publication Critical patent/ATE330282T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Optical Communication System (AREA)
  • Multi Processors (AREA)
  • Small-Scale Networks (AREA)
AT01927326T 2000-05-03 2001-04-25 Architektur für eingebaute gigabitvermittlung ATE330282T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US20168500P 2000-05-03 2000-05-03

Publications (1)

Publication Number Publication Date
ATE330282T1 true ATE330282T1 (de) 2006-07-15

Family

ID=22746865

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01927326T ATE330282T1 (de) 2000-05-03 2001-04-25 Architektur für eingebaute gigabitvermittlung

Country Status (5)

Country Link
EP (1) EP1279102B1 (de)
AT (1) ATE330282T1 (de)
AU (1) AU2001253789A1 (de)
DE (1) DE60120684T2 (de)
WO (1) WO2001084327A2 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN121051052B (zh) * 2025-10-31 2026-01-27 苏州元脑智能科技有限公司 一种总线互联系统、信号处理方法、服务器

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6246680B1 (en) * 1997-06-30 2001-06-12 Sun Microsystems, Inc. Highly integrated multi-layer switch element architecture

Also Published As

Publication number Publication date
WO2001084327A3 (en) 2002-04-25
DE60120684D1 (de) 2006-07-27
EP1279102A2 (de) 2003-01-29
AU2001253789A1 (en) 2001-11-12
WO2001084327A2 (en) 2001-11-08
EP1279102B1 (de) 2006-06-14
DE60120684T2 (de) 2007-06-14

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties