ATE330367T1 - Offsetspannungskompensationsverfahren für parallele zeitverschachtelte analog- digitalwandler sowie schaltung dafür - Google Patents

Offsetspannungskompensationsverfahren für parallele zeitverschachtelte analog- digitalwandler sowie schaltung dafür

Info

Publication number
ATE330367T1
ATE330367T1 AT02425563T AT02425563T ATE330367T1 AT E330367 T1 ATE330367 T1 AT E330367T1 AT 02425563 T AT02425563 T AT 02425563T AT 02425563 T AT02425563 T AT 02425563T AT E330367 T1 ATE330367 T1 AT E330367T1
Authority
AT
Austria
Prior art keywords
adc
digital
path
component part
calibration
Prior art date
Application number
AT02425563T
Other languages
English (en)
Inventor
Umberto Gatti
Piero Malcovati
Vincenzo Ferragina
Andrea Fornasari
Original Assignee
Siemens Mobile Comm Spa
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Mobile Comm Spa filed Critical Siemens Mobile Comm Spa
Application granted granted Critical
Publication of ATE330367T1 publication Critical patent/ATE330367T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/38—Calibration
    • H03M3/382—Calibration at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error
    • H03M3/384—Offset correction
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00—Conversion of analogue values to or from differential modulation
    • H03M3/30—Delta-sigma modulation
    • H03M3/458—Analogue/digital converters using delta-sigma modulation as an intermediate step
    • H03M3/466—Multiplexed conversion systems
    • H03M3/468—Interleaved, i.e. using multiple converters or converter parts for one channel, e.g. using Hadamard codes, pi-delta-sigma converters
    • H03M3/47—Interleaved, i.e. using multiple converters or converter parts for one channel, e.g. using Hadamard codes, pi-delta-sigma converters using time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
AT02425563T 2002-09-17 2002-09-17 Offsetspannungskompensationsverfahren für parallele zeitverschachtelte analog- digitalwandler sowie schaltung dafür ATE330367T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP02425563A EP1401105B1 (de) 2002-09-17 2002-09-17 Offsetspannungskompensationsverfahren für parallele zeitverschachtelte Analog-Digitalwandler sowie Schaltung dafür

Publications (1)

Publication Number Publication Date
ATE330367T1 true ATE330367T1 (de) 2006-07-15

Family

ID=31897011

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02425563T ATE330367T1 (de) 2002-09-17 2002-09-17 Offsetspannungskompensationsverfahren für parallele zeitverschachtelte analog- digitalwandler sowie schaltung dafür

Country Status (3)

Country Link
EP (1) EP1401105B1 (de)
AT (1) ATE330367T1 (de)
DE (1) DE60212389T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2896109B1 (fr) * 2006-01-06 2008-06-20 Thales Sa Dispositif de conversion analogique numerique a entrelacement temporel et a egalisation auto adaptative.
DE602006004155D1 (de) * 2006-02-17 2009-01-22 Sicon Semiconductor Ab Zeitverschachtelter Analog-Digital-Wandler
EP2041873A4 (de) * 2006-06-30 2010-07-28 Signal Proc Devices Sweden Ab Zeitverschachteltes analog-digital-umsetzersystem
JP5095007B2 (ja) 2009-02-19 2012-12-12 株式会社日立製作所 アナログデジタル変換器および半導体集積回路装置
FR2948835B1 (fr) * 2009-07-30 2017-02-10 Groupe Des Ecoles Des Telecommunications - Ecole Nat Superieure Des Telecommunications Correction des defauts analogiques dans des convertisseurs analogiques/numeriques paralleles, notamment pour des applications multistandards, radio logicielle et/ou radio-cognitive.
US8519875B2 (en) * 2011-04-12 2013-08-27 Maxim Integrated Products, Inc. System and method for background calibration of time interleaved analog to digital converters
CN102891681A (zh) * 2012-09-24 2013-01-23 北京华力创通科技股份有限公司 一种多片高速adc芯片的同步方法及装置
MX376695B (es) 2015-05-29 2025-03-07 Ericsson Telefon Ab L M Sistema de convertidor analogico a digital.
CN108923784A (zh) * 2018-06-12 2018-11-30 电子科技大学 一种tiadc采集系统的幅频响应误差估计及校正方法
US10841033B2 (en) 2019-03-01 2020-11-17 Huawei Technologies Co., Ltd. Under-sampling based receiver architecture for wireless communications systems
WO2020205325A1 (en) * 2019-03-29 2020-10-08 Apple Inc. Calibrating a time-interleaved analog-to-digital converter
CN111106834B (zh) 2019-12-26 2021-02-12 普源精电科技股份有限公司 一种adc采样数据识别方法及系统、集成电路及解码装置
TWI813240B (zh) * 2022-03-31 2023-08-21 創意電子股份有限公司 類比至數位轉換裝置與偏移校正方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239299A (en) * 1991-08-06 1993-08-24 Trw Inc. Digital equalization of time interleaved analog to digital converters
US6414612B1 (en) * 2000-09-14 2002-07-02 Scientific-Atlanta, Inc. Enhanced bandwidth digitizer using multiple analog-to digital converters and self calibration

Also Published As

Publication number Publication date
EP1401105A1 (de) 2004-03-24
DE60212389T2 (de) 2007-06-14
EP1401105B1 (de) 2006-06-14
DE60212389D1 (de) 2006-07-27

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