ATE339721T1 - Verfahren und vorrichtung für einen rekonfigurierbaren prozessor - Google Patents

Verfahren und vorrichtung für einen rekonfigurierbaren prozessor

Info

Publication number
ATE339721T1
ATE339721T1 AT01270830T AT01270830T ATE339721T1 AT E339721 T1 ATE339721 T1 AT E339721T1 AT 01270830 T AT01270830 T AT 01270830T AT 01270830 T AT01270830 T AT 01270830T AT E339721 T1 ATE339721 T1 AT E339721T1
Authority
AT
Austria
Prior art keywords
processor
changing
invention generally
generally relates
physical component
Prior art date
Application number
AT01270830T
Other languages
English (en)
Inventor
Chakravarthy Kosaraji
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE339721T1 publication Critical patent/ATE339721T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/25—Flow control; Congestion control with rate being modified by the source upon detecting a change of network conditions
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4063—Device-to-bus coupling
    • G06F13/4068—Electrical coupling
    • G06F13/4072—Drivers or receivers

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Software Systems (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Multi Processors (AREA)
  • Exchange Systems With Centralized Control (AREA)
  • Hardware Redundancy (AREA)
  • Logic Circuits (AREA)
AT01270830T 2000-12-13 2001-11-13 Verfahren und vorrichtung für einen rekonfigurierbaren prozessor ATE339721T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/738,913 US6907490B2 (en) 2000-12-13 2000-12-13 Method and an apparatus for a re-configurable processor

Publications (1)

Publication Number Publication Date
ATE339721T1 true ATE339721T1 (de) 2006-10-15

Family

ID=24970005

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01270830T ATE339721T1 (de) 2000-12-13 2001-11-13 Verfahren und vorrichtung für einen rekonfigurierbaren prozessor

Country Status (10)

Country Link
US (2) US6907490B2 (de)
EP (1) EP1377898B1 (de)
KR (1) KR100569750B1 (de)
CN (1) CN1279464C (de)
AT (1) ATE339721T1 (de)
AU (1) AU2002217800A1 (de)
DE (1) DE60123134T2 (de)
RU (1) RU2283507C2 (de)
TW (1) TW552558B (de)
WO (1) WO2002048862A2 (de)

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US6826645B2 (en) 2000-12-13 2004-11-30 Intel Corporation Apparatus and a method to provide higher bandwidth or processing power on a bus
US6907490B2 (en) 2000-12-13 2005-06-14 Intel Corporation Method and an apparatus for a re-configurable processor
US8185602B2 (en) 2002-11-05 2012-05-22 Newisys, Inc. Transaction processing using multiple protocol engines in systems having multiple multi-processor clusters
US7158536B2 (en) * 2004-01-28 2007-01-02 Rambus Inc. Adaptive-allocation of I/O bandwidth using a configurable interconnect topology
US20050268019A1 (en) * 2004-06-01 2005-12-01 Che-Hui Chang Chien [interface and system for transmitting real-time data ]
US20070038794A1 (en) * 2005-08-10 2007-02-15 Purcell Brian T Method and system for allocating a bus
US7903643B1 (en) * 2005-12-29 2011-03-08 At&T Intellectual Property Ii, L.P. Method and apparatus for determining bandwidth for services over an Internet Protocol network
US20080114918A1 (en) * 2006-11-09 2008-05-15 Advanced Micro Devices, Inc. Configurable computer system
JP5236661B2 (ja) 2006-12-26 2013-07-17 ダリ システムズ カンパニー リミテッド 多チャンネル広帯域通信システムにおけるベースバンドプリディストーション線形化の方法及びシステム
US7958383B2 (en) * 2007-08-15 2011-06-07 Via Technologies, Inc. Computer system with adjustable data transmission rate
US8223650B2 (en) * 2008-04-02 2012-07-17 Intel Corporation Express virtual channels in a packet switched on-chip interconnection network
KR101482210B1 (ko) * 2009-01-08 2015-01-15 삼성전자 주식회사 전력 소모 감소를 위한 재구성 가능한 프로세서 및 그 동작방법
KR101835254B1 (ko) 2010-08-17 2018-03-06 달리 시스템즈 씨오. 엘티디. 분산 안테나 시스템을 위한 뉴트럴 호스트 아키텍처
CN103597807B (zh) 2010-09-14 2015-09-30 大理系统有限公司 远程可重新配置的分布式天线系统和方法
KR101863605B1 (ko) 2011-09-19 2018-07-06 삼성전자주식회사 스트림 데이터를 고속으로 처리하는 프로세서
US20120095607A1 (en) * 2011-12-22 2012-04-19 Wells Ryan D Method, Apparatus, and System for Energy Efficiency and Energy Conservation Through Dynamic Management of Memory and Input/Output Subsystems
US10536553B1 (en) * 2015-09-04 2020-01-14 Cadence Design Systems, Inc. Method and system to transfer data between components of an emulation system
CN108735278B (zh) * 2018-05-28 2021-09-14 成都华唯科技股份有限公司 一种适用于康复设备的指令的传输方法及应用
US11283876B2 (en) * 2020-03-20 2022-03-22 Verizon Patent And Licensing Inc. Systems and methods for end-to-end request-response flow routing for geographically distributed client devices
TWI879044B (zh) * 2023-08-25 2025-04-01 宏正自動科技股份有限公司 訊號轉接裝置及訊號路徑自適應切換方法

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US6654909B1 (en) * 2000-06-30 2003-11-25 Intel Corporation Apparatus and method for protecting critical resources against soft errors in high performance microprocessors
US6907490B2 (en) 2000-12-13 2005-06-14 Intel Corporation Method and an apparatus for a re-configurable processor
US6675266B2 (en) * 2000-12-29 2004-01-06 Intel Corporation Circuit and method for protecting 1-hot and 2-hot vector tags in high performance microprocessors

Also Published As

Publication number Publication date
KR20030061845A (ko) 2003-07-22
US20050021897A1 (en) 2005-01-27
CN1489727A (zh) 2004-04-14
US6907490B2 (en) 2005-06-14
US7133957B2 (en) 2006-11-07
AU2002217800A1 (en) 2002-06-24
HK1062213A1 (en) 2004-10-21
WO2002048862A3 (en) 2003-10-30
KR100569750B1 (ko) 2006-04-11
RU2283507C2 (ru) 2006-09-10
TW552558B (en) 2003-09-11
US20020071431A1 (en) 2002-06-13
CN1279464C (zh) 2006-10-11
RU2003121543A (ru) 2005-02-27
DE60123134T2 (de) 2007-08-30
DE60123134D1 (de) 2006-10-26
WO2002048862A2 (en) 2002-06-20
EP1377898B1 (de) 2006-09-13
EP1377898A2 (de) 2004-01-07

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