ATE346335T1 - Binärer grösse-vergleicher - Google Patents
Binärer grösse-vergleicherInfo
- Publication number
- ATE346335T1 ATE346335T1 AT02021241T AT02021241T ATE346335T1 AT E346335 T1 ATE346335 T1 AT E346335T1 AT 02021241 T AT02021241 T AT 02021241T AT 02021241 T AT02021241 T AT 02021241T AT E346335 T1 ATE346335 T1 AT E346335T1
- Authority
- AT
- Austria
- Prior art keywords
- circuit
- operand
- coupled
- indication
- size comparison
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F7/02—Comparing digital values
- G06F7/026—Magnitude comparison, i.e. determining the relative order of operands based on their numerical value, e.g. window comparator
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
- G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- Software Systems (AREA)
- General Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Computational Mathematics (AREA)
- Mathematical Analysis (AREA)
- Mathematical Optimization (AREA)
- Pure & Applied Mathematics (AREA)
- Executing Machine-Instructions (AREA)
- Hardware Redundancy (AREA)
- Facsimile Image Signal Circuits (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/956,399 US6907443B2 (en) | 2001-09-19 | 2001-09-19 | Magnitude comparator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE346335T1 true ATE346335T1 (de) | 2006-12-15 |
Family
ID=25498195
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT02021241T ATE346335T1 (de) | 2001-09-19 | 2002-09-18 | Binärer grösse-vergleicher |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US6907443B2 (de) |
| EP (1) | EP1296222B1 (de) |
| AT (1) | ATE346335T1 (de) |
| DE (1) | DE60216210T2 (de) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6907443B2 (en) * | 2001-09-19 | 2005-06-14 | Broadcom Corporation | Magnitude comparator |
| US7284028B2 (en) * | 2002-11-01 | 2007-10-16 | International Business Machines Corporation | Comparator eliminating need for one's complement logic for signed numbers |
| US8326903B2 (en) * | 2008-01-04 | 2012-12-04 | International Business Machines Corporation | System and method for improved vector analysis |
| WO2011101707A1 (en) | 2010-02-16 | 2011-08-25 | Freescale Semiconductor, Inc. | Data processing method, data processor and apparatus including a data processor |
| US9176739B2 (en) * | 2011-08-05 | 2015-11-03 | Cisco Technology, Inc. | System and method for checking run-time consistency for sequentially and non-sequentially fetched instructions |
| US20130159680A1 (en) * | 2011-12-19 | 2013-06-20 | Wei-Yu Chen | Systems, methods, and computer program products for parallelizing large number arithmetic |
| US9715383B2 (en) | 2012-03-15 | 2017-07-25 | International Business Machines Corporation | Vector find element equal instruction |
| US9459864B2 (en) | 2012-03-15 | 2016-10-04 | International Business Machines Corporation | Vector string range compare |
| US9459868B2 (en) | 2012-03-15 | 2016-10-04 | International Business Machines Corporation | Instruction to load data up to a dynamically determined memory boundary |
| US9268566B2 (en) | 2012-03-15 | 2016-02-23 | International Business Machines Corporation | Character data match determination by loading registers at most up to memory block boundary and comparing |
| US9454367B2 (en) | 2012-03-15 | 2016-09-27 | International Business Machines Corporation | Finding the length of a set of character data having a termination character |
| US9454366B2 (en) | 2012-03-15 | 2016-09-27 | International Business Machines Corporation | Copying character data having a termination character from one memory location to another |
| US9710266B2 (en) | 2012-03-15 | 2017-07-18 | International Business Machines Corporation | Instruction to compute the distance to a specified memory boundary |
| US9588762B2 (en) * | 2012-03-15 | 2017-03-07 | International Business Machines Corporation | Vector find element not equal instruction |
| US9459867B2 (en) | 2012-03-15 | 2016-10-04 | International Business Machines Corporation | Instruction to load data up to a specified memory boundary indicated by the instruction |
| US9280347B2 (en) | 2012-03-15 | 2016-03-08 | International Business Machines Corporation | Transforming non-contiguous instruction specifiers to contiguous instruction specifiers |
| WO2014080245A1 (en) | 2012-11-22 | 2014-05-30 | Freescale Semiconductor, Inc. | Data processing device, method of execution error detection and integrated circuit |
| US9823983B2 (en) | 2014-09-25 | 2017-11-21 | Nxp Usa, Inc. | Electronic fault detection unit |
| US12443409B2 (en) * | 2021-09-16 | 2025-10-14 | Intel Corporation | Conditional modular subtraction instruction |
| US12572355B2 (en) | 2021-10-29 | 2026-03-10 | Intel Corporation | Modular addition instruction |
| CN117289991B (zh) * | 2022-06-14 | 2025-09-12 | 北京有竹居网络技术有限公司 | 处理器以及用于数据处理的方法、设备和存储介质 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5281946A (en) * | 1992-08-17 | 1994-01-25 | Motorola, Inc. | High-speed magnitude comparator circuit |
| US5539332A (en) | 1994-10-31 | 1996-07-23 | International Business Machines Corporation | Adder circuits and magnitude comparator |
| US5592142A (en) * | 1995-09-15 | 1997-01-07 | International Business Machines Corporation | High speed greater than or equal to compare circuit |
| US5781465A (en) * | 1995-12-22 | 1998-07-14 | Lucent Technologies Inc. | Method and apparatus for fast carry generation detection and comparison |
| JPH1091397A (ja) * | 1996-09-12 | 1998-04-10 | Toshiba Corp | 演算回路 |
| US5689228A (en) | 1996-10-15 | 1997-11-18 | Hewlett-Packard Company | Parallel magnitude comparison using manchester carry chains |
| US5905428A (en) * | 1997-07-15 | 1999-05-18 | International Business Machines Corporation | N-bit comparator using count leading 1 circuits |
| US6216147B1 (en) | 1997-12-11 | 2001-04-10 | Intrinsity, Inc. | Method and apparatus for an N-nary magnitude comparator |
| US6907443B2 (en) * | 2001-09-19 | 2005-06-14 | Broadcom Corporation | Magnitude comparator |
-
2001
- 2001-09-19 US US09/956,399 patent/US6907443B2/en not_active Expired - Lifetime
-
2002
- 2002-09-18 AT AT02021241T patent/ATE346335T1/de not_active IP Right Cessation
- 2002-09-18 EP EP02021241A patent/EP1296222B1/de not_active Expired - Lifetime
- 2002-09-18 DE DE60216210T patent/DE60216210T2/de not_active Expired - Lifetime
-
2005
- 2005-06-07 US US11/146,591 patent/US20050228846A1/en not_active Abandoned
Also Published As
| Publication number | Publication date |
|---|---|
| US20050228846A1 (en) | 2005-10-13 |
| DE60216210D1 (de) | 2007-01-04 |
| DE60216210T2 (de) | 2007-10-11 |
| EP1296222A2 (de) | 2003-03-26 |
| EP1296222B1 (de) | 2006-11-22 |
| US6907443B2 (en) | 2005-06-14 |
| EP1296222A3 (de) | 2005-09-07 |
| US20030061539A1 (en) | 2003-03-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ATE346335T1 (de) | Binärer grösse-vergleicher | |
| US6202163B1 (en) | Data processing circuit with gating of clocking signals to various elements of the circuit | |
| BRPI0408335A (pt) | método para iniciar a transferência de dados sem fio, dispositivo eletrÈnico, e, programa de computador | |
| DK1230489T3 (da) | System bestående af en skrue og et værktöj hertil | |
| IN2015DN00807A (de) | ||
| DE69907787D1 (de) | Prozessor mit Haltepunktschaltung | |
| DE602004009637D1 (de) | Selektive Vorauthentifizierung zu den vorzeitigen primären drahtlosen Zugangspunkten | |
| WO2003034216A3 (en) | Automatic instruction set architecture generation | |
| WO2006012070A3 (en) | Conditional instruction for a single instruction, multiple data execution engine | |
| WO2003075189A3 (en) | An interconnect-aware methodology for integrated circuit design | |
| DE60239832D1 (de) | Benutzerprioritätsmodus | |
| DE60127524D1 (de) | Cachespeicher für arithmetische Rechneroperationen mit partieller Resultatsausgabe bei partieller Operandenübereinstimmung | |
| TW200604930A (en) | Circuit for counting sum of absolute difference | |
| DE50004366D1 (de) | Integrierter schaltkreis und schaltungsanordnung zur stromversorgung eines integrierten schaltkreises | |
| DE502005009191D1 (de) | Verpackung oder träger für eine lampe | |
| TW200614067A (en) | Two's complement circuit | |
| ATE343249T1 (de) | Ausgangstreiber mit stromdetektor | |
| KR970705071A (ko) | 부호달린 나눗셈을 이행하는 방법(Method for Performing Signed Division) | |
| US9213524B2 (en) | Method and device for generating floating-point values | |
| DK1361660T3 (da) | Elektronisk strömkreds med mindst en indgang til udvælgelse af en tilstand af den elektroniske strömkreds | |
| AU2003293976A8 (en) | Transition detection at input of integrated circuit device | |
| TW200622486A (en) | Radiation sensitive resin composition | |
| SG160390A1 (en) | Predictor | |
| EP1588374A4 (de) | Floating-gate-analogspannungsrückkopplungsschaltung | |
| US20020184412A1 (en) | System and method for locating and aligning to framing bits |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |