ATE350765T1 - Verfahren zur herstellung einer halbleitervorrichtunng und eine halbleitervorrichtung - Google Patents

Verfahren zur herstellung einer halbleitervorrichtunng und eine halbleitervorrichtung

Info

Publication number
ATE350765T1
ATE350765T1 AT02077552T AT02077552T ATE350765T1 AT E350765 T1 ATE350765 T1 AT E350765T1 AT 02077552 T AT02077552 T AT 02077552T AT 02077552 T AT02077552 T AT 02077552T AT E350765 T1 ATE350765 T1 AT E350765T1
Authority
AT
Austria
Prior art keywords
semiconductor device
producing
semiconductor
package leads
semiconductor material
Prior art date
Application number
AT02077552T
Other languages
English (en)
Inventor
Ronald Dekker
Henricus Godefridus Rafae Maas
Martinus Pieter Joh Versleijen
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE350765T1 publication Critical patent/ATE350765T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/60—Strap connectors, e.g. thick copper clips for grounding of power devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/743—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7432—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7438—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support with parts of the auxiliary support remaining in the finished device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/021—Manufacture or treatment of air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/20—Air gaps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
  • Manufacture Of Macromolecular Shaped Articles (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
AT02077552T 1994-07-26 1995-07-05 Verfahren zur herstellung einer halbleitervorrichtunng und eine halbleitervorrichtung ATE350765T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP94202182 1994-07-26

Publications (1)

Publication Number Publication Date
ATE350765T1 true ATE350765T1 (de) 2007-01-15

Family

ID=8217069

Family Applications (2)

Application Number Title Priority Date Filing Date
AT95921959T ATE225985T1 (de) 1994-07-26 1995-07-05 Herstellungsmethode eines oberflächen- montierbaren bauteils und dieser selbst
AT02077552T ATE350765T1 (de) 1994-07-26 1995-07-05 Verfahren zur herstellung einer halbleitervorrichtunng und eine halbleitervorrichtung

Family Applications Before (1)

Application Number Title Priority Date Filing Date
AT95921959T ATE225985T1 (de) 1994-07-26 1995-07-05 Herstellungsmethode eines oberflächen- montierbaren bauteils und dieser selbst

Country Status (7)

Country Link
US (1) US5753537A (de)
EP (2) EP0721661B1 (de)
KR (1) KR100380701B1 (de)
AT (2) ATE225985T1 (de)
DE (2) DE69528515T2 (de)
TW (1) TW345728B (de)
WO (1) WO1996003772A2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100372136B1 (ko) * 1995-05-10 2003-03-15 코닌클리케 필립스 일렉트로닉스 엔.브이. 반도체디바이스및그제조에적합한캐리어로드
EP0860876A3 (de) * 1997-02-21 1999-09-22 DaimlerChrysler AG Anordnung und Verfahren zur Herstellung von CSP-Gehäusen für elektrische Bauteile
KR100390897B1 (ko) * 1997-12-29 2003-08-19 주식회사 하이닉스반도체 칩 크기 패키지의 제조방법
DE19818036B4 (de) * 1998-04-22 2005-05-19 Siemens Ag Verfahren zur Herstellung eines elektrotechnischen Bauteils mit einer kunststoffpassivierten Oberfläche, derartiges Bauteil und Anwendung dieses Bauteils
KR100294449B1 (ko) * 1998-07-15 2001-07-12 윤종용 본딩패드하부에형성되는커패시터를구비한반도체집적회로장치
US6429036B1 (en) * 1999-01-14 2002-08-06 Micron Technology, Inc. Backside illumination of CMOS image sensor
JP2003501839A (ja) 1999-06-03 2003-01-14 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 半導体装置用接続配置およびその製造方法
JP2003504876A (ja) * 1999-07-10 2003-02-04 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ 半導体デバイス及びその製造方法
US6538328B1 (en) 1999-11-10 2003-03-25 Em Microelectronic Metal film protection of the surface of a structure formed on a semiconductor substrate during etching of the substrate by a KOH etchant
JP2001185519A (ja) * 1999-12-24 2001-07-06 Hitachi Ltd 半導体装置及びその製造方法
WO2001075974A1 (en) * 2000-03-30 2001-10-11 Koninklijke Philips Electronics N.V. Semiconductor device and method of manufacturing same
US6642127B2 (en) * 2001-10-19 2003-11-04 Applied Materials, Inc. Method for dicing a semiconductor wafer
FR2871291B1 (fr) * 2004-06-02 2006-12-08 Tracit Technologies Procede de transfert de plaques
CN100555589C (zh) * 2005-06-29 2009-10-28 皇家飞利浦电子股份有限公司 制造半导体组件的方法
WO2009117815A1 (en) * 2008-03-25 2009-10-01 Glen Sheldon Gerald Collard Apparatus for sanitizing oral appliances
TW201025522A (en) * 2008-12-18 2010-07-01 Memchip Technology Co Ltd MEMS packaging structure and manufacturing method thereof
KR102652261B1 (ko) * 2016-12-07 2024-03-27 엘지디스플레이 주식회사 유기발광소자를 이용한 조명장치

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1058296A (en) * 1963-06-28 1967-02-08 Rca Corp Composite insulator-semiconductor wafer and method of making same
US3475664A (en) * 1965-06-30 1969-10-28 Texas Instruments Inc Ambient atmosphere isolated semiconductor devices
US3493820A (en) * 1966-12-01 1970-02-03 Raytheon Co Airgap isolated semiconductor device
NL153947B (nl) * 1967-02-25 1977-07-15 Philips Nv Werkwijze voor het vervaardigen van halfgeleiderinrichtingen, waarbij een selectief elektrolytisch etsproces wordt toegepast en halfgeleiderinrichting verkregen met toepassing van de werkwijze.
US3521128A (en) * 1967-08-02 1970-07-21 Rca Corp Microminiature electrical component having integral indexing means
US3616348A (en) * 1968-06-10 1971-10-26 Rca Corp Process for isolating semiconductor elements
DE1927876C3 (de) * 1969-05-31 1979-09-27 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Halbleiteranordnung
US3623219A (en) * 1969-10-22 1971-11-30 Rca Corp Method for isolating semiconductor devices from a wafer of semiconducting material
US3823469A (en) * 1971-04-28 1974-07-16 Rca Corp High heat dissipation solder-reflow flip chip transistor
US4070230A (en) * 1974-07-04 1978-01-24 Siemens Aktiengesellschaft Semiconductor component with dielectric carrier and its manufacture
JPS5252582A (en) * 1975-10-25 1977-04-27 Toshiba Corp Device and production for semiconductor
GB1542084A (en) * 1976-08-31 1979-03-14 Standard Telephones Cables Ltd Thin silicon semiconductor devices
US4612408A (en) * 1984-10-22 1986-09-16 Sera Solar Corporation Electrically isolated semiconductor integrated photodiode circuits and method
US4601779A (en) * 1985-06-24 1986-07-22 International Business Machines Corporation Method of producing a thin silicon-on-insulator layer
US4892842A (en) * 1987-10-29 1990-01-09 Tektronix, Inc. Method of treating an integrated circuit
US4918505A (en) * 1988-07-19 1990-04-17 Tektronix, Inc. Method of treating an integrated circuit to provide a temperature sensor that is integral therewith
US5117279A (en) * 1990-03-23 1992-05-26 Motorola, Inc. Semiconductor device having a low temperature uv-cured epoxy seal
CA2038117A1 (en) * 1990-03-29 1991-09-30 Mahfuza B. Ali Controllable radiation curable photoiniferter prepared adhesives for attachment of microelectronic devices and a method of attaching microelectronic devices therewith
US5162251A (en) * 1991-03-18 1992-11-10 Hughes Danbury Optical Systems, Inc. Method for making thinned charge-coupled devices
US5144747A (en) * 1991-03-27 1992-09-08 Integrated System Assemblies Corporation Apparatus and method for positioning an integrated circuit chip within a multichip module
JPH05129320A (ja) * 1991-10-30 1993-05-25 Rohm Co Ltd 半導体装置及びその製造方法
US5403729A (en) * 1992-05-27 1995-04-04 Micro Technology Partners Fabricating a semiconductor with an insulative coating

Also Published As

Publication number Publication date
US5753537A (en) 1998-05-19
ATE225985T1 (de) 2002-10-15
WO1996003772A3 (en) 1996-04-18
KR960705353A (ko) 1996-10-09
DE69535361T2 (de) 2007-10-04
EP1251557B1 (de) 2007-01-03
EP0721661B1 (de) 2002-10-09
KR100380701B1 (ko) 2003-07-22
EP1251557A3 (de) 2003-04-09
WO1996003772A2 (en) 1996-02-08
DE69535361D1 (de) 2007-02-15
TW345728B (en) 1998-11-21
DE69528515T2 (de) 2003-04-24
EP1251557A2 (de) 2002-10-23
EP0721661A1 (de) 1996-07-17
DE69528515D1 (de) 2002-11-14

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