ATE357018T1 - Recheneinheit und datenladeverfahren zur schnellen initialisierung der recheneinheit - Google Patents

Recheneinheit und datenladeverfahren zur schnellen initialisierung der recheneinheit

Info

Publication number
ATE357018T1
ATE357018T1 AT03022445T AT03022445T ATE357018T1 AT E357018 T1 ATE357018 T1 AT E357018T1 AT 03022445 T AT03022445 T AT 03022445T AT 03022445 T AT03022445 T AT 03022445T AT E357018 T1 ATE357018 T1 AT E357018T1
Authority
AT
Austria
Prior art keywords
computer unit
data
loading method
data loading
quick initialization
Prior art date
Application number
AT03022445T
Other languages
English (en)
Inventor
Shinsuke Kato
Kiyoshi Owada
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of ATE357018T1 publication Critical patent/ATE357018T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4403—Processor initialisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Stored Programmes (AREA)
  • Complex Calculations (AREA)
AT03022445T 2002-10-09 2003-10-07 Recheneinheit und datenladeverfahren zur schnellen initialisierung der recheneinheit ATE357018T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002296229 2002-10-09

Publications (1)

Publication Number Publication Date
ATE357018T1 true ATE357018T1 (de) 2007-04-15

Family

ID=32025538

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03022445T ATE357018T1 (de) 2002-10-09 2003-10-07 Recheneinheit und datenladeverfahren zur schnellen initialisierung der recheneinheit

Country Status (4)

Country Link
US (1) US7107407B2 (de)
EP (1) EP1408406B1 (de)
AT (1) ATE357018T1 (de)
DE (1) DE60312453T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7386676B2 (en) * 2005-01-21 2008-06-10 International Buiness Machines Coporation Data coherence system
US8181046B2 (en) * 2008-10-29 2012-05-15 Sandisk Il Ltd. Transparent self-hibernation of non-volatile memory system
KR20130033230A (ko) 2011-09-26 2013-04-03 삼성전자주식회사 하이브리드 메모리 장치, 이를 포함하는 시스템, 및 하이브리드 메모리장치의 데이터 기입 및 독출 방법
US9684520B2 (en) * 2011-10-20 2017-06-20 Smart Modular Technologies, Inc. Computing system with non-disruptive fast memory restore mechanism and method of operation thereof
JP5984500B2 (ja) 2011-11-30 2016-09-06 三菱電機株式会社 情報処理装置、放送受信装置及びソフトウェア起動方法
US10055236B2 (en) * 2015-07-02 2018-08-21 Sandisk Technologies Llc Runtime data storage and/or retrieval
US11966613B2 (en) * 2021-11-24 2024-04-23 Western Digital Technologies, Inc. Selective device power state recovery method

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05242057A (ja) 1992-02-27 1993-09-21 Sanyo Electric Co Ltd マルチプロセッサシステムの起動方式
US5809531A (en) * 1992-09-21 1998-09-15 Intel Corporation Computer system for executing programs using an internal cache without accessing external RAM
US6506604B2 (en) * 1993-06-11 2003-01-14 Cell Genesys, Inc. Method for production of high titer virus and high efficiency retroviral mediated transduction of mammalian cells
JP3563768B2 (ja) 1994-05-31 2004-09-08 株式会社ルネサステクノロジ Ｒｏｍプログラム変更装置
US6421776B1 (en) * 1994-10-14 2002-07-16 International Business Machines Corporation Data processor having BIOS packing compression/decompression architecture
US5832263A (en) * 1996-03-15 1998-11-03 Digidox, Inc. System and method for in-place modification of information recorded in read-only storage using modifiable non-volatile storage associated with an agent
JP2659007B2 (ja) * 1996-06-17 1997-09-30 株式会社日立製作所 情報処理方法及び装置
JP3173407B2 (ja) * 1997-02-05 2001-06-04 日本電気株式会社 フラッシュｅｅｐｒｏｍ内蔵マイクロコンピュータ
US6330667B1 (en) * 1998-06-05 2001-12-11 Micron Technology, Inc. System for read only memory shadowing circuit for copying a quantity of rom data to the ram prior to initialization of the computer system
US6868472B1 (en) * 1999-10-01 2005-03-15 Fujitsu Limited Method of Controlling and addressing a cache memory which acts as a random address memory to increase an access speed to a main memory
US6604195B1 (en) * 2000-06-28 2003-08-05 Cisco Technology, Inc. Method and apparatus to use non-volatile read/write memory for bootstrap code and processes
US6704840B2 (en) * 2001-06-19 2004-03-09 Intel Corporation Computer system and method of computer initialization with caching of option BIOS
US7373491B2 (en) * 2002-02-27 2008-05-13 Rockwell Automation Technologies, Inc. Processor with versatile external memory interface
US7904897B2 (en) * 2002-08-08 2011-03-08 Rudelic John C Executing applications from a semiconductor nonvolatile memory

Also Published As

Publication number Publication date
DE60312453D1 (de) 2007-04-26
US20040073761A1 (en) 2004-04-15
EP1408406B1 (de) 2007-03-14
US7107407B2 (en) 2006-09-12
EP1408406A3 (de) 2006-05-10
EP1408406A2 (de) 2004-04-14
DE60312453T2 (de) 2008-01-10

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Legal Events

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RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties