ATE369588T1 - Usb host controller mit dma fähigkeit - Google Patents

Usb host controller mit dma fähigkeit

Info

Publication number
ATE369588T1
ATE369588T1 AT04732372T AT04732372T ATE369588T1 AT E369588 T1 ATE369588 T1 AT E369588T1 AT 04732372 T AT04732372 T AT 04732372T AT 04732372 T AT04732372 T AT 04732372T AT E369588 T1 ATE369588 T1 AT E369588T1
Authority
AT
Austria
Prior art keywords
host controller
controller
usb host
system memory
dma
Prior art date
Application number
AT04732372T
Other languages
English (en)
Inventor
Chee Lee
Constantin Socol
Jerome Tjia
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE369588T1 publication Critical patent/ATE369588T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/282—Cycle stealing DMA
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Information Transfer Systems (AREA)
  • Computer And Data Communications (AREA)
AT04732372T 2003-05-15 2004-05-12 Usb host controller mit dma fähigkeit ATE369588T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SG0300129 2003-05-15

Publications (1)

Publication Number Publication Date
ATE369588T1 true ATE369588T1 (de) 2007-08-15

Family

ID=33448782

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04732372T ATE369588T1 (de) 2003-05-15 2004-05-12 Usb host controller mit dma fähigkeit

Country Status (6)

Country Link
EP (1) EP1627312B1 (de)
JP (1) JP5146796B2 (de)
CN (1) CN100414523C (de)
AT (1) ATE369588T1 (de)
DE (1) DE602004008064T2 (de)
WO (1) WO2004102407A2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE524144T1 (de) 2005-12-22 2011-09-15 Us Gov Sec Army Modulare fussprothese
JP5456434B2 (ja) 2009-10-22 2014-03-26 ルネサスエレクトロニクス株式会社 パイプ調停回路、パイプ調停方法
CN112100107A (zh) * 2019-06-17 2020-12-18 广州慧睿思通信息科技有限公司 一种usb数据传输方法、装置及系统

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4987529A (en) * 1988-08-11 1991-01-22 Ast Research, Inc. Shared memory bus system for arbitrating access control among contending memory refresh circuits, peripheral controllers, and bus masters
JPH02123447A (ja) * 1988-10-12 1990-05-10 Advanced Micro Devicds Inc 入力／出力制御器およびそのデータ転送方法
JP2765267B2 (ja) * 1990-05-22 1998-06-11 日本電気株式会社 ダイレクトメモリアクセス転送制御装置
TW276312B (de) * 1992-10-20 1996-05-21 Cirrlis Logic Inc
JPH0773059A (ja) * 1993-03-02 1995-03-17 Tandem Comput Inc フォールトトレラント型コンピュータシステム
US6185641B1 (en) * 1997-05-01 2001-02-06 Standard Microsystems Corp. Dynamically allocating space in RAM shared between multiple USB endpoints and USB host
US6266715B1 (en) * 1998-06-01 2001-07-24 Advanced Micro Devices, Inc. Universal serial bus controller with a direct memory access mode
JP2002342260A (ja) * 2001-05-22 2002-11-29 Nec Microsystems Ltd Ｕｓｂ送信制御回路およびその制御方法

Also Published As

Publication number Publication date
EP1627312B1 (de) 2007-08-08
WO2004102407A2 (en) 2004-11-25
EP1627312A2 (de) 2006-02-22
CN100414523C (zh) 2008-08-27
DE602004008064T2 (de) 2008-04-24
WO2004102407A3 (en) 2005-01-06
DE602004008064D1 (de) 2007-09-20
CN1882929A (zh) 2006-12-20
JP2007502476A (ja) 2007-02-08
JP5146796B2 (ja) 2013-02-20

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Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties