ATE369589T1 - Speichermodularchitektur-reigentopologie, detektionen und meldungen, präsenz eines äusseren speichermoduls zu innerem modul - Google Patents
Speichermodularchitektur-reigentopologie, detektionen und meldungen, präsenz eines äusseren speichermoduls zu innerem modulInfo
- Publication number
- ATE369589T1 ATE369589T1 AT04752906T AT04752906T ATE369589T1 AT E369589 T1 ATE369589 T1 AT E369589T1 AT 04752906 T AT04752906 T AT 04752906T AT 04752906 T AT04752906 T AT 04752906T AT E369589 T1 ATE369589 T1 AT E369589T1
- Authority
- AT
- Austria
- Prior art keywords
- memory module
- module
- reign
- detections
- topology
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Memory System (AREA)
- Multi Processors (AREA)
- Debugging And Monitoring (AREA)
- Dram (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Information Transfer Systems (AREA)
- Electronic Switches (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/454,399 US7194581B2 (en) | 2003-06-03 | 2003-06-03 | Memory channel with hot add/remove |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE369589T1 true ATE369589T1 (de) | 2007-08-15 |
Family
ID=33489727
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT04752906T ATE369589T1 (de) | 2003-06-03 | 2004-05-20 | Speichermodularchitektur-reigentopologie, detektionen und meldungen, präsenz eines äusseren speichermoduls zu innerem modul |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US7194581B2 (de) |
| EP (1) | EP1629392B1 (de) |
| JP (1) | JP4210300B2 (de) |
| KR (1) | KR100806445B1 (de) |
| CN (1) | CN100483380C (de) |
| AT (1) | ATE369589T1 (de) |
| DE (1) | DE602004008067T2 (de) |
| TW (1) | TW200502732A (de) |
| WO (1) | WO2004109525A2 (de) |
Families Citing this family (45)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7363422B2 (en) | 2000-01-05 | 2008-04-22 | Rambus Inc. | Configurable width buffered module |
| US7017002B2 (en) * | 2000-01-05 | 2006-03-21 | Rambus, Inc. | System featuring a master device, a buffer device and a plurality of integrated circuit memory devices |
| US7404032B2 (en) * | 2000-01-05 | 2008-07-22 | Rambus Inc. | Configurable width buffered module having switch elements |
| US7356639B2 (en) * | 2000-01-05 | 2008-04-08 | Rambus Inc. | Configurable width buffered module having a bypass circuit |
| US6502161B1 (en) * | 2000-01-05 | 2002-12-31 | Rambus Inc. | Memory system including a point-to-point linked memory subsystem |
| US7266634B2 (en) | 2000-01-05 | 2007-09-04 | Rambus Inc. | Configurable width buffered module having flyby elements |
| US7362697B2 (en) | 2003-01-09 | 2008-04-22 | International Business Machines Corporation | Self-healing chip-to-chip interface |
| US7200787B2 (en) * | 2003-06-03 | 2007-04-03 | Intel Corporation | Memory channel utilizing permuting status patterns |
| US8171331B2 (en) | 2003-06-04 | 2012-05-01 | Intel Corporation | Memory channel having deskew separate from redrive |
| US7386768B2 (en) * | 2003-06-05 | 2008-06-10 | Intel Corporation | Memory channel with bit lane fail-over |
| US7392445B2 (en) * | 2003-09-11 | 2008-06-24 | International Business Machines Corporation | Autonomic bus reconfiguration for fault conditions |
| US20050138267A1 (en) * | 2003-12-23 | 2005-06-23 | Bains Kuljit S. | Integral memory buffer and serial presence detect capability for fully-buffered memory modules |
| US7417883B2 (en) * | 2004-12-30 | 2008-08-26 | Intel Corporation | I/O data interconnect reuse as repeater |
| US7366931B2 (en) | 2004-12-30 | 2008-04-29 | Intel Corporation | Memory modules that receive clock information and are placed in a low power state |
| JP4274140B2 (ja) * | 2005-03-24 | 2009-06-03 | 日本電気株式会社 | ホットスワップ機能付きメモリシステム及びその障害メモリモジュールの交換方法 |
| JP4474648B2 (ja) * | 2005-03-25 | 2010-06-09 | 日本電気株式会社 | メモリシステム及びそのホットスワップ方法 |
| CN103116565A (zh) * | 2005-04-21 | 2013-05-22 | 提琴存储器公司 | 可配置的开关原件、互连网络及布局网络间相互连接方法 |
| US9582449B2 (en) | 2005-04-21 | 2017-02-28 | Violin Memory, Inc. | Interconnection system |
| US9384818B2 (en) | 2005-04-21 | 2016-07-05 | Violin Memory | Memory power management |
| US7539812B2 (en) * | 2005-06-30 | 2009-05-26 | Intel Corporation | System and method to increase DRAM parallelism |
| US7562271B2 (en) | 2005-09-26 | 2009-07-14 | Rambus Inc. | Memory system topologies including a buffer device and an integrated circuit memory device |
| US11328764B2 (en) | 2005-09-26 | 2022-05-10 | Rambus Inc. | Memory system topologies including a memory die stack |
| US7464225B2 (en) | 2005-09-26 | 2008-12-09 | Rambus Inc. | Memory module including a plurality of integrated circuit memory devices and a plurality of buffer devices in a matrix topology |
| KR101260632B1 (ko) * | 2005-09-30 | 2013-05-03 | 모사이드 테크놀로지스 인코퍼레이티드 | 출력 제어 메모리 |
| US11948629B2 (en) | 2005-09-30 | 2024-04-02 | Mosaid Technologies Incorporated | Non-volatile memory device with concurrent bank operations |
| US7652922B2 (en) | 2005-09-30 | 2010-01-26 | Mosaid Technologies Incorporated | Multiple independent serial link memory |
| US7353316B2 (en) * | 2006-03-24 | 2008-04-01 | Micron Technology, Inc. | System and method for re-routing signals between memory system components |
| US7660940B2 (en) * | 2006-07-26 | 2010-02-09 | International Business Machines Corporation | Carrier having daisy chain of self timed memory chips |
| US7617350B2 (en) * | 2006-07-26 | 2009-11-10 | International Business Machines Corporation | Carrier having daisy chained memory chips |
| US7627711B2 (en) * | 2006-07-26 | 2009-12-01 | International Business Machines Corporation | Memory controller for daisy chained memory chips |
| US7673093B2 (en) * | 2006-07-26 | 2010-03-02 | International Business Machines Corporation | Computer system having daisy chained memory chips |
| DE102006045113B3 (de) * | 2006-09-25 | 2008-04-03 | Qimonda Ag | Speichermodul-System, Speichermodul, Buffer-Bauelement, Speichermodul-Platine, und Verfahren zum Betreiben eines Speichermoduls |
| US20080155149A1 (en) * | 2006-12-20 | 2008-06-26 | De Araujo Daniel N | Multi-path redundant architecture for fault tolerant fully buffered dimms |
| US7688652B2 (en) * | 2007-07-18 | 2010-03-30 | Mosaid Technologies Incorporated | Storage of data in memory via packet strobing |
| US20090063786A1 (en) * | 2007-08-29 | 2009-03-05 | Hakjune Oh | Daisy-chain memory configuration and usage |
| US7913128B2 (en) * | 2007-11-23 | 2011-03-22 | Mosaid Technologies Incorporated | Data channel test apparatus and method thereof |
| US7743375B2 (en) * | 2008-06-27 | 2010-06-22 | International Business Machines Corporation | Information handling system including dynamically merged physical partitions |
| US8111615B2 (en) | 2008-07-07 | 2012-02-07 | Intel Corporation | Dynamic update of route table |
| US8205138B2 (en) * | 2008-08-07 | 2012-06-19 | International Business Machines Corporation | Memory controller for reducing time to initialize main memory |
| CN102055602B (zh) * | 2009-10-28 | 2013-07-10 | 中国移动通信集团湖南有限公司 | 一种执行结果获取方法和装置及系统 |
| KR101728067B1 (ko) * | 2010-09-03 | 2017-04-18 | 삼성전자 주식회사 | 반도체 메모리 장치 |
| US8825967B2 (en) | 2011-12-08 | 2014-09-02 | Conversant Intellectual Property Management Inc. | Independent write and read control in serially-connected devices |
| US9582223B2 (en) | 2014-04-14 | 2017-02-28 | International Business Machines Corporation | Efficient reclamation of pre-allocated direct memory access (DMA) memory |
| US9818457B1 (en) | 2016-09-30 | 2017-11-14 | Intel Corporation | Extended platform with additional memory module slots per CPU socket |
| US10216657B2 (en) | 2016-09-30 | 2019-02-26 | Intel Corporation | Extended platform with additional memory module slots per CPU socket and configured for increased performance |
Family Cites Families (43)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4567578A (en) * | 1982-09-08 | 1986-01-28 | Harris Corporation | Cache memory flush scheme |
| US6112287A (en) * | 1993-03-01 | 2000-08-29 | Busless Computers Sarl | Shared memory multiprocessor system using a set of serial links as processors-memory switch |
| IL96808A (en) * | 1990-04-18 | 1996-03-31 | Rambus Inc | Introductory / Origin Circuit Agreed Using High-Performance Brokerage |
| US5241643A (en) | 1990-06-19 | 1993-08-31 | Dell Usa, L.P. | Memory system and associated method for disabling address buffers connected to unused simm slots |
| JPH0715665B2 (ja) | 1991-06-10 | 1995-02-22 | インターナショナル・ビジネス・マシーンズ・コーポレイション | パーソナルコンピユータ |
| EP1046994A3 (de) * | 1994-03-22 | 2000-12-06 | Hyperchip Inc. | Direkte Zellenersetzung für fehlertolerante Architektur mit gänzlich integrierten Systemen und mit Mitteln zur direkten Kommunikation mit Systembediener |
| US6408402B1 (en) * | 1994-03-22 | 2002-06-18 | Hyperchip Inc. | Efficient direct replacement cell fault tolerant architecture |
| US5475320A (en) * | 1994-08-11 | 1995-12-12 | Texas Instruments Incorporated | Data processing with a self-timed approach to spurious transitions |
| US6154826A (en) * | 1994-11-16 | 2000-11-28 | University Of Virginia Patent Foundation | Method and device for maximizing memory system bandwidth by accessing data in a dynamically determined order |
| US5867422A (en) * | 1995-08-08 | 1999-02-02 | University Of South Florida | Computer memory chip with field programmable memory cell arrays (fpmcas), and method of configuring |
| US6006318A (en) * | 1995-08-16 | 1999-12-21 | Microunity Systems Engineering, Inc. | General purpose, dynamic partitioning, programmable media processor |
| US5742840A (en) * | 1995-08-16 | 1998-04-21 | Microunity Systems Engineering, Inc. | General purpose, multiple precision parallel operation, programmable media processor |
| US5860080A (en) * | 1996-03-19 | 1999-01-12 | Apple Computer, Inc. | Multicasting system for selecting a group of memory devices for operation |
| US5860134A (en) * | 1996-03-28 | 1999-01-12 | International Business Machines Corporation | Memory system with memory presence and type detection using multiplexed memory line function |
| US6047343A (en) * | 1996-06-05 | 2000-04-04 | Compaq Computer Corporation | Method and apparatus for detecting insertion and removal of a memory module using standard connectors |
| US6125419A (en) * | 1996-06-13 | 2000-09-26 | Hitachi, Ltd. | Bus system, printed circuit board, signal transmission line, series circuit and memory module |
| US6092229A (en) * | 1996-10-09 | 2000-07-18 | Lsi Logic Corporation | Single chip systems using general purpose processors |
| US5922077A (en) * | 1996-11-14 | 1999-07-13 | Data General Corporation | Fail-over switching system |
| JP3455040B2 (ja) * | 1996-12-16 | 2003-10-06 | 株式会社日立製作所 | ソースクロック同期式メモリシステムおよびメモリユニット |
| JP3127853B2 (ja) * | 1997-04-30 | 2001-01-29 | 日本電気株式会社 | メモリ集積回路並びにこれを用いた主記憶システム及びグラフィクスメモリシステム |
| US5898863A (en) * | 1997-06-03 | 1999-04-27 | Emc Corporation | Method and apparatus for determining I/O size distribution of an input/output system and its use for load simulation |
| US6097520A (en) * | 1997-06-30 | 2000-08-01 | Microsoft Corporation | Remote control receiver and method of operation |
| EP1036362B1 (de) | 1997-12-05 | 2006-11-15 | Intel Corporation | Speichersystem mit speichermodul mit einem speichermodul-steuerbaustein |
| US6968419B1 (en) | 1998-02-13 | 2005-11-22 | Intel Corporation | Memory module having a memory module controller controlling memory transactions for a plurality of memory devices |
| US6970968B1 (en) | 1998-02-13 | 2005-11-29 | Intel Corporation | Memory module controller for providing an interface between a system memory controller and a plurality of memory devices on a memory module |
| US6327205B1 (en) * | 1998-03-16 | 2001-12-04 | Jazio, Inc. | Signal latching of high bandwidth DRAM arrays when skew between different components is higher than signal rate |
| TR200002649T2 (tr) * | 1998-03-16 | 2000-11-21 | Jazio Inc. | VLSI CMOS arayüz devreleri için yüksek hızlı sinyal üretimi. |
| US6160423A (en) * | 1998-03-16 | 2000-12-12 | Jazio, Inc. | High speed source synchronous signaling for interfacing VLSI CMOS circuits to transmission lines |
| US6209074B1 (en) * | 1998-04-28 | 2001-03-27 | International Business Machines Corporation | Address re-mapping for memory module using presence detect data |
| US6504780B2 (en) * | 1998-10-01 | 2003-01-07 | Monolithic System Technology, Inc. | Method and apparatus for completely hiding refresh operations in a dram device using clock division |
| EP1077412A3 (de) | 1999-08-16 | 2004-12-15 | Hewlett-Packard Company, A Delaware Corporation | Bussystem mit verbessertem Steuerungsverfahren |
| US6374317B1 (en) * | 1999-10-07 | 2002-04-16 | Intel Corporation | Method and apparatus for initializing a computer interface |
| US6643752B1 (en) * | 1999-12-09 | 2003-11-04 | Rambus Inc. | Transceiver with latency alignment circuitry |
| US6502161B1 (en) * | 2000-01-05 | 2002-12-31 | Rambus Inc. | Memory system including a point-to-point linked memory subsystem |
| US6487102B1 (en) * | 2000-09-18 | 2002-11-26 | Intel Corporation | Memory module having buffer for isolating stacked memory devices |
| US6449213B1 (en) * | 2000-09-18 | 2002-09-10 | Intel Corporation | Memory interface having source-synchronous command/address signaling |
| US6317352B1 (en) * | 2000-09-18 | 2001-11-13 | Intel Corporation | Apparatus for implementing a buffered daisy chain connection between a memory controller and memory modules |
| US6369605B1 (en) * | 2000-09-18 | 2002-04-09 | Intel Corporation | Self-terminated driver to prevent signal reflections of transmissions between electronic devices |
| US6625687B1 (en) * | 2000-09-18 | 2003-09-23 | Intel Corporation | Memory module employing a junction circuit for point-to-point connection isolation, voltage translation, data synchronization, and multiplexing/demultiplexing |
| US6493250B2 (en) * | 2000-12-28 | 2002-12-10 | Intel Corporation | Multi-tier point-to-point buffered memory interface |
| US20020144173A1 (en) | 2001-03-30 | 2002-10-03 | Micron Technology, Inc. | Serial presence detect driven memory clock control |
| TW542378U (en) * | 2002-02-08 | 2003-07-11 | C One Technology Corp | Multi-functional electronic card capable of detecting a card insertion |
| DE112004000821B4 (de) * | 2003-05-13 | 2016-12-01 | Advanced Micro Devices, Inc. | System mit einem Hauptrechner, der mit mehreren Speichermodulen über eine serielle Speicherverbindung verbunden ist |
-
2003
- 2003-06-03 US US10/454,399 patent/US7194581B2/en not_active Expired - Fee Related
-
2004
- 2004-05-20 AT AT04752906T patent/ATE369589T1/de not_active IP Right Cessation
- 2004-05-20 KR KR1020057023178A patent/KR100806445B1/ko not_active Expired - Fee Related
- 2004-05-20 DE DE602004008067T patent/DE602004008067T2/de not_active Expired - Lifetime
- 2004-05-20 JP JP2006514912A patent/JP4210300B2/ja not_active Expired - Fee Related
- 2004-05-20 WO PCT/US2004/015978 patent/WO2004109525A2/en not_active Ceased
- 2004-05-20 CN CNB2004800155219A patent/CN100483380C/zh not_active Expired - Fee Related
- 2004-05-20 EP EP04752906A patent/EP1629392B1/de not_active Expired - Lifetime
- 2004-05-27 TW TW093115100A patent/TW200502732A/zh unknown
Also Published As
| Publication number | Publication date |
|---|---|
| US7194581B2 (en) | 2007-03-20 |
| CN100483380C (zh) | 2009-04-29 |
| EP1629392B1 (de) | 2007-08-08 |
| KR20060023983A (ko) | 2006-03-15 |
| WO2004109525A2 (en) | 2004-12-16 |
| DE602004008067D1 (de) | 2007-09-20 |
| EP1629392A2 (de) | 2006-03-01 |
| DE602004008067T2 (de) | 2007-11-22 |
| KR100806445B1 (ko) | 2008-02-21 |
| CN1799040A (zh) | 2006-07-05 |
| JP2006526846A (ja) | 2006-11-24 |
| TW200502732A (en) | 2005-01-16 |
| WO2004109525A3 (en) | 2005-01-27 |
| JP4210300B2 (ja) | 2009-01-14 |
| US20040250024A1 (en) | 2004-12-09 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |