ATE376191T1 - Prüfung eines testobjekts mit abtastung vom taktsignal und vom datensignal - Google Patents

Prüfung eines testobjekts mit abtastung vom taktsignal und vom datensignal

Info

Publication number
ATE376191T1
ATE376191T1 AT05103301T AT05103301T ATE376191T1 AT E376191 T1 ATE376191 T1 AT E376191T1 AT 05103301 T AT05103301 T AT 05103301T AT 05103301 T AT05103301 T AT 05103301T AT E376191 T1 ATE376191 T1 AT E376191T1
Authority
AT
Austria
Prior art keywords
clock signal
signal
data signal
data
clock
Prior art date
Application number
AT05103301T
Other languages
English (en)
Inventor
Bernd Laquai
Joerg-Walter Mohr
Original Assignee
Agilent Technologies Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agilent Technologies Inc filed Critical Agilent Technologies Inc
Application granted granted Critical
Publication of ATE376191T1 publication Critical patent/ATE376191T1/de

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
    • G01R31/31937—Timing aspects, e.g. measuring propagation delay
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/31725—Timing aspects, e.g. clock distribution, skew, propagation delay
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31908—Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns
    • G01R31/3191—Calibration

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
AT05103301T 2005-04-22 2005-04-22 Prüfung eines testobjekts mit abtastung vom taktsignal und vom datensignal ATE376191T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP05103301A EP1715355B1 (de) 2005-04-22 2005-04-22 Prüfung eines Testobjekts mit Abtastung vom Taktsignal und vom Datensignal

Publications (1)

Publication Number Publication Date
ATE376191T1 true ATE376191T1 (de) 2007-11-15

Family

ID=34939467

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05103301T ATE376191T1 (de) 2005-04-22 2005-04-22 Prüfung eines testobjekts mit abtastung vom taktsignal und vom datensignal

Country Status (5)

Country Link
US (1) US7260493B2 (de)
EP (1) EP1715355B1 (de)
JP (1) JP4594896B2 (de)
AT (1) ATE376191T1 (de)
DE (1) DE602005002931T2 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7379837B1 (en) * 2006-07-21 2008-05-27 Qlogic, Corporation Method and system for testing integrated circuits
US8176351B2 (en) * 2006-08-21 2012-05-08 National Instruments Corporation Sampling mechanism for data acquisition counters
US7707000B2 (en) * 2007-04-19 2010-04-27 Agilent Technologies, Inc. Test instrument and system responsive to execution time data
US7797121B2 (en) * 2007-06-07 2010-09-14 Advantest Corporation Test apparatus, and device for calibration
US7834615B2 (en) * 2007-07-02 2010-11-16 Texas Instruments Incorporated Bist DDR memory interface circuit and method for self-testing the same using phase relationship between a data signal and a data strobe signal
US8094766B2 (en) * 2008-07-02 2012-01-10 Teradyne, Inc. Tracker circuit and method for automated test equipment systems
US8191033B1 (en) * 2008-11-20 2012-05-29 Marvell International Ltd. In situ clock jitter measurement
US8645589B2 (en) 2009-08-03 2014-02-04 National Instruments Corporation Methods for data acquisition systems in real time applications
US8647369B2 (en) 2010-05-19 2014-02-11 Josef E. Gorek Minimal profile anterior bracket for spinal fixation
EP3379764B1 (de) 2017-03-22 2019-07-17 Kabushiki Kaisha Toshiba Halbleiterbauelement
CN111124978B (zh) 2019-10-30 2021-07-06 苏州浪潮智能科技有限公司 一种并行总线相位校正的方法及装置
US12320841B2 (en) * 2020-11-19 2025-06-03 Advantest Test Solutions, Inc. Wafer scale active thermal interposer for device testing
CN114814524A (zh) * 2022-03-18 2022-07-29 杭州加速科技有限公司 一种检测卡、检测系统及检测方法
GB2627525B (en) * 2023-02-27 2025-05-07 Imagination Tech Ltd Data integrity checking

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3731210A (en) * 1972-05-04 1973-05-01 Itt Corp Nutley Reduction of timing resolution in digital phase lock loops
US4876655A (en) * 1985-12-02 1989-10-24 Tektronix, Inc. Method and apparatus for evaluating jitter
JPH01164118A (ja) * 1987-12-21 1989-06-28 Nec Corp 時間差測定回路
US5835506A (en) * 1997-04-29 1998-11-10 Credence Systems Corporation Single pass doublet mode integrated circuit tester
JP2000098007A (ja) * 1998-09-18 2000-04-07 Advantest Corp 半導体試験装置
JP2000314767A (ja) * 1999-04-30 2000-11-14 Asahi Kasei Microsystems Kk クロックジッタの測定方法
JP4495308B2 (ja) * 2000-06-14 2010-07-07 株式会社アドバンテスト 半導体デバイス試験方法・半導体デバイス試験装置
JP4782271B2 (ja) * 2000-07-06 2011-09-28 株式会社アドバンテスト 半導体デバイス試験方法・半導体デバイス試験装置
JP2002042498A (ja) * 2000-07-24 2002-02-08 Mitsubishi Electric Corp 半導体記憶装置、補助装置および試験装置
JP2002196053A (ja) * 2000-12-25 2002-07-10 Ando Electric Co Ltd Ｉｃ測定装置
JP2003059298A (ja) * 2001-08-09 2003-02-28 Mitsubishi Electric Corp 半導体記憶装置
US7107166B2 (en) * 2002-01-10 2006-09-12 Advantest Corp. Device for testing LSI to be measured, jitter analyzer, and phase difference detector
JP4516755B2 (ja) * 2002-03-08 2010-08-04 株式会社アドバンテスト 半導体試験装置及びそのタイミング測定方法
JP4002811B2 (ja) * 2002-10-04 2007-11-07 株式会社アドバンテスト マルチストローブ生成装置、試験装置、及び調整方法

Also Published As

Publication number Publication date
EP1715355B1 (de) 2007-10-17
DE602005002931T2 (de) 2008-06-12
DE602005002931D1 (de) 2007-11-29
US7260493B2 (en) 2007-08-21
JP4594896B2 (ja) 2010-12-08
US20060247881A1 (en) 2006-11-02
JP2006300954A (ja) 2006-11-02
EP1715355A1 (de) 2006-10-25

Similar Documents

Publication Publication Date Title
DE602005002931D1 (de) Prüfung eines Testobjekts mit Abtastung vom Taktsignal und vom Datensignal
WO2009088816A8 (en) Systems and methods for well data analysis
MY155846A (en) A method for testing in a reconfigurable tester
TW200510744A (en) Comparator circuit, calibration apparatus, testing apparatus, and calibration method
JP2002350515A5 (de)
EP1582882A3 (de) Verfahren zur Messung des Tastverhältnisses
WO2017178621A3 (en) Methods and devices for measuring the levels of analytes in body fluids
WO2008114700A1 (ja) 測定装置、測定方法、試験装置、電子デバイス、および、プログラム
US12320853B2 (en) Systems and methods for automatic time domain reflectometer measurement on a uni-directional drive channel
DE602006019069D1 (de) Testvorrichtung für Speicher
WO2008008952A3 (en) High-speed signal testing system having oscilloscope functionality
WO2009072204A1 (ja) 電子化計量装置の寿命推定方法および装置
JP2017167121A (ja) 測定システムの全信号帯域幅において動作することが可能なデジタルエッジトリガ検出回路を有する測定システム
CN101273559A (zh) 用于对数字信号进行时间标记的选通技术
FR3095700B1 (fr) Procédé de détection de défauts non francs dans un câble par analyse en composantes principales
WO2007019077A3 (en) Obtaining test data for a device
TWI391679B (zh) 決定抖動的頻率成分
JP5244099B2 (ja) 試験デバイスの較正
JP2008545332A (ja) 通信デバイスの試験におけるジッタの補償及び生成
JP5577035B2 (ja) ローカルに順序付けられたストロービング
JP5254794B2 (ja) デジタル信号のタイミングを試験するためのストローブ技法
TW200636272A (en) Test equipment, test method, manufacturing method of electronic device, test simulator, and test simulation method
Diaz-Fortuny et al. A model parameter extraction methodology including time-dependent variability for circuit reliability simulation
WO2008114602A1 (ja) 試験装置および電子デバイス
TW200739105A (en) Method and machine-readable media for inferring relationships between test results

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties