ATE381162T1 - Ein redundantes synchrones taktverteilungssystem - Google Patents

Ein redundantes synchrones taktverteilungssystem

Info

Publication number
ATE381162T1
ATE381162T1 AT04293126T AT04293126T ATE381162T1 AT E381162 T1 ATE381162 T1 AT E381162T1 AT 04293126 T AT04293126 T AT 04293126T AT 04293126 T AT04293126 T AT 04293126T AT E381162 T1 ATE381162 T1 AT E381162T1
Authority
AT
Austria
Prior art keywords
clock
module
distribution system
clock distribution
circuit part
Prior art date
Application number
AT04293126T
Other languages
English (en)
Inventor
Den Berg Eric Van
Original Assignee
Alcatel Lucent
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Alcatel Lucent filed Critical Alcatel Lucent
Application granted granted Critical
Publication of ATE381162T1 publication Critical patent/ATE381162T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0688—Change of the master or reference, e.g. take-over or failure of the master
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
AT04293126T 2004-12-23 2004-12-23 Ein redundantes synchrones taktverteilungssystem ATE381162T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04293126A EP1675290B1 (de) 2004-12-23 2004-12-23 Ein redundantes synchrones Taktverteilungssystem

Publications (1)

Publication Number Publication Date
ATE381162T1 true ATE381162T1 (de) 2007-12-15

Family

ID=34931659

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04293126T ATE381162T1 (de) 2004-12-23 2004-12-23 Ein redundantes synchrones taktverteilungssystem

Country Status (5)

Country Link
US (1) US7457388B2 (de)
EP (1) EP1675290B1 (de)
CN (1) CN1794619A (de)
AT (1) ATE381162T1 (de)
DE (1) DE602004010696T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100123488A1 (en) * 2008-11-14 2010-05-20 Analog Devices, Inc. Digital pll with known noise source and known loop bandwidth
US7893736B2 (en) * 2008-11-14 2011-02-22 Analog Devices, Inc. Multiple input PLL with hitless switchover between non-integer related input frequencies
US7924072B2 (en) * 2008-11-14 2011-04-12 Analog Devices, Inc. Exact frequency translation using dual cascaded sigma-delta modulator controlled phase lock loops
US7924966B2 (en) * 2008-11-21 2011-04-12 Analog Devices, Inc. Symmetry corrected high frequency digital divider
US8275001B1 (en) 2009-12-30 2012-09-25 Adtran, Inc. Systems and methods for synchronizing backup receivers to network clocks
CN102487318A (zh) * 2010-12-06 2012-06-06 中国移动通信集团公司 地面传递时间同步信息的方法、设备及系统
CN102064901B (zh) * 2010-12-29 2013-10-02 烽火通信科技股份有限公司 Olp倒换带来的线路不对称延迟的补偿方法
US9537591B2 (en) * 2011-03-30 2017-01-03 Tejas Networks Ltd Method for zero traffic hit synchronization switchover in telecommunication network
CN103401630B (zh) * 2013-07-30 2016-08-10 西南大学 一种工业控制网络中的冗余校时系统及方法
CN105099806A (zh) * 2014-05-21 2015-11-25 中兴通讯股份有限公司 一种时钟切换方法及装置
CN105245304B (zh) * 2015-10-26 2018-10-23 山东网聪信息科技有限公司 一种双主板结构智能变电站仿真调测系统的时间同步方法
US10396922B2 (en) 2017-02-07 2019-08-27 Texas Instruments Incorporated Apparatus and mechanism to support multiple time domains in a single soc for time sensitive network
CN109005679B (zh) * 2017-04-07 2020-08-04 深圳市泰德创新科技有限公司 一种用于会议讨论系统冗余设计的音频同步系统

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2000022763A1 (en) * 1998-10-13 2000-04-20 Nokia Networks Oy Node control unit of an access node in a synchronous telecommunication system and method for controlling a switchover of clock supply in a telecommunication system
US6204732B1 (en) * 1999-02-09 2001-03-20 Eci Telecom Ltd Apparatus for clock signal distribution, with transparent switching capability between two clock distribution units
US6757350B1 (en) * 1999-06-12 2004-06-29 Cisco Technology, Inc. Redundant clock generation and distribution
US6675307B1 (en) * 2000-03-28 2004-01-06 Juniper Networks, Inc. Clock controller for controlling the switching to redundant clock signal without producing glitches by delaying the redundant clock signal to match a phase of primary clock signal
US6600345B1 (en) * 2001-11-15 2003-07-29 Analog Devices, Inc. Glitch free clock select switch
JP2007266923A (ja) * 2006-03-28 2007-10-11 Fujitsu Ltd クロック供給装置

Also Published As

Publication number Publication date
US20060139081A1 (en) 2006-06-29
US7457388B2 (en) 2008-11-25
DE602004010696T2 (de) 2008-12-04
CN1794619A (zh) 2006-06-28
EP1675290A1 (de) 2006-06-28
DE602004010696D1 (de) 2008-01-24
EP1675290B1 (de) 2007-12-12

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