ATE383659T1 - Vorrichtung mit elastischen elektrischen anschlüssen, und verfahren zu deren herstellung - Google Patents

Vorrichtung mit elastischen elektrischen anschlüssen, und verfahren zu deren herstellung

Info

Publication number
ATE383659T1
ATE383659T1 AT02768487T AT02768487T ATE383659T1 AT E383659 T1 ATE383659 T1 AT E383659T1 AT 02768487 T AT02768487 T AT 02768487T AT 02768487 T AT02768487 T AT 02768487T AT E383659 T1 ATE383659 T1 AT E383659T1
Authority
AT
Austria
Prior art keywords
electrical conductor
compliant
capping layer
electrically conductive
bump
Prior art date
Application number
AT02768487T
Other languages
English (en)
Inventor
Michael Lutz
Original Assignee
Dow Corning
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dow Corning filed Critical Dow Corning
Application granted granted Critical
Publication of ATE383659T1 publication Critical patent/ATE383659T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/255—Materials of outermost layers of multilayered bumps, e.g. material of a coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars

Landscapes

  • Wire Bonding (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Manufacturing Of Electrical Connectors (AREA)
  • Connections By Means Of Piercing Elements, Nuts, Or Screws (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
AT02768487T 2001-09-12 2002-08-12 Vorrichtung mit elastischen elektrischen anschlüssen, und verfahren zu deren herstellung ATE383659T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US09/952,738 US6767819B2 (en) 2001-09-12 2001-09-12 Apparatus with compliant electrical terminals, and methods for forming same

Publications (1)

Publication Number Publication Date
ATE383659T1 true ATE383659T1 (de) 2008-01-15

Family

ID=25493187

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02768487T ATE383659T1 (de) 2001-09-12 2002-08-12 Vorrichtung mit elastischen elektrischen anschlüssen, und verfahren zu deren herstellung

Country Status (10)

Country Link
US (1) US6767819B2 (de)
EP (1) EP1428257B1 (de)
JP (1) JP2005503014A (de)
KR (1) KR100886778B1 (de)
AT (1) ATE383659T1 (de)
AU (1) AU2002331046A1 (de)
CA (1) CA2459908A1 (de)
DE (1) DE60224544T2 (de)
TW (1) TW567604B (de)
WO (1) WO2003023819A2 (de)

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US7495179B2 (en) * 2003-10-06 2009-02-24 Tessera, Inc. Components with posts and pads
US8641913B2 (en) * 2003-10-06 2014-02-04 Tessera, Inc. Fine pitch microcontacts and method for forming thereof
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WO2005093816A1 (en) * 2004-03-05 2005-10-06 Infineon Technologies Ag Semiconductor device for radio frequency applications and method for making the same
US7259581B2 (en) * 2005-02-14 2007-08-21 Micron Technology, Inc. Method for testing semiconductor components
US7413110B2 (en) * 2005-02-16 2008-08-19 Motorola, Inc. Method for reducing stress between substrates of differing materials
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US7534715B2 (en) * 2005-12-29 2009-05-19 Intel Corporation Methods including fluxless chip attach processes
JP4672576B2 (ja) * 2006-03-09 2011-04-20 富士通株式会社 電子デバイス及びその製造方法
US7375021B2 (en) * 2006-04-04 2008-05-20 International Business Machines Corporation Method and structure for eliminating aluminum terminal pad material in semiconductor devices
US20070284758A1 (en) * 2006-05-22 2007-12-13 General Electric Company Electronics package and associated method
US20070297151A1 (en) * 2006-06-27 2007-12-27 Mosley Larry E Compliant conductive interconnects
US20080042269A1 (en) * 2006-08-16 2008-02-21 Taiwan Semiconductor Manufacturing Co., Ltd. Bump structures and packaged structures thereof
US7749886B2 (en) 2006-12-20 2010-07-06 Tessera, Inc. Microelectronic assemblies having compliancy and methods therefor
WO2008142839A1 (ja) * 2007-05-11 2008-11-27 Panasonic Corporation 半導体チップと半導体装置
TWI343112B (en) * 2007-08-08 2011-06-01 Unimicron Technology Corp Package substrate having electrical connection structure and method for fabricating the same
CN101874296B (zh) 2007-09-28 2015-08-26 泰塞拉公司 利用成对凸柱进行倒装芯片互连
US20100044860A1 (en) * 2008-08-21 2010-02-25 Tessera Interconnect Materials, Inc. Microelectronic substrate or element having conductive pads and metal posts joined thereto using bond layer
US8766439B2 (en) * 2009-12-10 2014-07-01 International Business Machines Corporation Integrated circuit chip with pyramid or cone-shaped conductive pads for flexible C4 connections and a method of forming the integrated circuit chip
US8330272B2 (en) 2010-07-08 2012-12-11 Tessera, Inc. Microelectronic packages with dual or multiple-etched flip-chip connectors
US8580607B2 (en) 2010-07-27 2013-11-12 Tessera, Inc. Microelectronic packages with nanoparticle joining
US8853558B2 (en) 2010-12-10 2014-10-07 Tessera, Inc. Interconnect structure
JP5530955B2 (ja) * 2011-02-21 2014-06-25 日本特殊陶業株式会社 多層配線基板
US8499445B1 (en) * 2011-07-18 2013-08-06 Endicott Interconnect Technologies, Inc. Method of forming an electrically conductive printed line
KR101840447B1 (ko) * 2011-08-09 2018-03-20 에스케이하이닉스 주식회사 반도체 패키지 및 이를 갖는 적층 반도체 패키지
DE102011083423A1 (de) * 2011-09-26 2013-03-28 Siemens Aktiengesellschaft Kontaktfederanordnung und Verfahren zur Herstellung derselben
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US9633971B2 (en) 2015-07-10 2017-04-25 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
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Also Published As

Publication number Publication date
WO2003023819A2 (en) 2003-03-20
TW567604B (en) 2003-12-21
KR100886778B1 (ko) 2009-03-04
AU2002331046A1 (en) 2003-03-24
EP1428257B1 (de) 2008-01-09
US6767819B2 (en) 2004-07-27
KR20050018623A (ko) 2005-02-23
CA2459908A1 (en) 2003-03-20
DE60224544T2 (de) 2009-01-22
JP2005503014A (ja) 2005-01-27
WO2003023819A3 (en) 2004-01-22
DE60224544D1 (de) 2008-02-21
US20030049884A1 (en) 2003-03-13
EP1428257A2 (de) 2004-06-16

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