ATE396483T1 - Nichtflüchtige speichervorrichtung und verfahren zur speicherung von statusinformationen unter verwendung mehrfacher strings - Google Patents

Nichtflüchtige speichervorrichtung und verfahren zur speicherung von statusinformationen unter verwendung mehrfacher strings

Info

Publication number
ATE396483T1
ATE396483T1 AT06111631T AT06111631T ATE396483T1 AT E396483 T1 ATE396483 T1 AT E396483T1 AT 06111631 T AT06111631 T AT 06111631T AT 06111631 T AT06111631 T AT 06111631T AT E396483 T1 ATE396483 T1 AT E396483T1
Authority
AT
Austria
Prior art keywords
status information
strings
storage device
multiple strings
volatile storage
Prior art date
Application number
AT06111631T
Other languages
English (en)
Inventor
Ji-Hyun In
Kwang-Yoon Lee
Song-Ho Yoon
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of ATE396483T1 publication Critical patent/ATE396483T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/22—Safety or protection circuits preventing unauthorised or accidental access to memory cells

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Security & Cryptography (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Communication Control (AREA)
AT06111631T 2005-03-25 2006-03-23 Nichtflüchtige speichervorrichtung und verfahren zur speicherung von statusinformationen unter verwendung mehrfacher strings ATE396483T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050024970A KR100704628B1 (ko) 2005-03-25 2005-03-25 다수의 스트링을 사용하여 상태 정보를 저장하는 방법 및비휘발성 저장 장치

Publications (1)

Publication Number Publication Date
ATE396483T1 true ATE396483T1 (de) 2008-06-15

Family

ID=36579802

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06111631T ATE396483T1 (de) 2005-03-25 2006-03-23 Nichtflüchtige speichervorrichtung und verfahren zur speicherung von statusinformationen unter verwendung mehrfacher strings

Country Status (7)

Country Link
US (1) US7457911B2 (de)
EP (1) EP1708203B1 (de)
JP (1) JP4455524B2 (de)
KR (1) KR100704628B1 (de)
CN (1) CN100550201C (de)
AT (1) ATE396483T1 (de)
DE (1) DE602006001237D1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006302342A (ja) * 2005-04-15 2006-11-02 Toshiba Corp 不揮発性半導体メモリ装置とメモリシステム
US7551486B2 (en) * 2006-05-15 2009-06-23 Apple Inc. Iterative memory cell charging based on reference cell value
US7511646B2 (en) * 2006-05-15 2009-03-31 Apple Inc. Use of 8-bit or higher A/D for NAND cell value
US7701797B2 (en) * 2006-05-15 2010-04-20 Apple Inc. Two levels of voltage regulation supplied for logic and data programming voltage of a memory device
US7613043B2 (en) * 2006-05-15 2009-11-03 Apple Inc. Shifting reference values to account for voltage sag
US8000134B2 (en) * 2006-05-15 2011-08-16 Apple Inc. Off-die charge pump that supplies multiple flash devices
US7568135B2 (en) 2006-05-15 2009-07-28 Apple Inc. Use of alternative value in cell detection
US7852690B2 (en) * 2006-05-15 2010-12-14 Apple Inc. Multi-chip package for a flash memory
US7639542B2 (en) * 2006-05-15 2009-12-29 Apple Inc. Maintenance operations for multi-level data storage cells
US7639531B2 (en) * 2006-05-15 2009-12-29 Apple Inc. Dynamic cell bit resolution
US7911834B2 (en) * 2006-05-15 2011-03-22 Apple Inc. Analog interface for a flash memory die
JP4660520B2 (ja) * 2007-09-03 2011-03-30 株式会社東芝 不揮発性半導体記憶装置およびその駆動方法
US8261174B2 (en) 2009-01-13 2012-09-04 International Business Machines Corporation Protecting and migrating memory lines
KR101616099B1 (ko) * 2009-12-03 2016-04-27 삼성전자주식회사 플래시 메모리 장치 및 그것의 프로그램 방법
CN105989898B (zh) * 2014-10-08 2018-11-27 光宝科技股份有限公司 存储器阵列中故障地址的数据结构及故障地址的编码方法
KR102438988B1 (ko) * 2016-04-07 2022-09-02 삼성전자주식회사 랜덤화 연산을 수행하는 불휘발성 메모리 장치
CN115765401A (zh) * 2022-09-30 2023-03-07 华为数字能源技术有限公司 一种变换器及其控制方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3155847B2 (ja) 1993-01-13 2001-04-16 株式会社東芝 不揮発性半導体記憶装置およびこれを用いた記憶システム
JPH07122080A (ja) * 1993-08-31 1995-05-12 Sony Corp 半導体不揮発性記憶装置
US5603001A (en) 1994-05-09 1997-02-11 Kabushiki Kaisha Toshiba Semiconductor disk system having a plurality of flash memories
JP2848300B2 (ja) 1995-12-27 1999-01-20 日本電気株式会社 不揮発性半導体記憶装置
KR100206709B1 (ko) * 1996-09-21 1999-07-01 윤종용 멀티비트 불휘발성 반도체 메모리의 셀 어레이의 구조 및 그의 구동방법
US6975425B1 (en) * 1998-02-26 2005-12-13 Canon Kabushiki Kaisha Information processing apparatus and information processing method
JP3822081B2 (ja) 2001-09-28 2006-09-13 東京エレクトロンデバイス株式会社 データ書込装置、データ書込制御方法及びプログラム
KR100454119B1 (ko) 2001-10-24 2004-10-26 삼성전자주식회사 캐쉬 기능을 갖는 불 휘발성 반도체 메모리 장치 및 그것의 프로그램, 읽기, 그리고 페이지 카피백 방법들
US6740940B2 (en) 2001-11-27 2004-05-25 Samsung Electronics Co., Ltd. Semiconductor memory devices having dummy active regions
JP2003196142A (ja) 2001-12-25 2003-07-11 Sony Corp ライトワンス型メモリ装置及びファイル管理方法
US6549457B1 (en) 2002-02-15 2003-04-15 Intel Corporation Using multiple status bits per cell for handling power failures during write operations
JP3935139B2 (ja) 2002-11-29 2007-06-20 株式会社東芝 半導体記憶装置
KR100518777B1 (ko) * 2003-09-05 2005-10-06 한국원자력연구소 지진 안전성 평가시스템 및 그 방법

Also Published As

Publication number Publication date
CN100550201C (zh) 2009-10-14
EP1708203B1 (de) 2008-05-21
KR20060102908A (ko) 2006-09-28
KR100704628B1 (ko) 2007-04-09
JP2006277921A (ja) 2006-10-12
EP1708203A1 (de) 2006-10-04
DE602006001237D1 (de) 2008-07-03
CN1838319A (zh) 2006-09-27
US7457911B2 (en) 2008-11-25
JP4455524B2 (ja) 2010-04-21
US20060215454A1 (en) 2006-09-28

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