ATE400897T1 - Halbleiterbauelement mit superparaelektrischem gate-isolator - Google Patents

Halbleiterbauelement mit superparaelektrischem gate-isolator

Info

Publication number
ATE400897T1
ATE400897T1 AT05849933T AT05849933T ATE400897T1 AT E400897 T1 ATE400897 T1 AT E400897T1 AT 05849933 T AT05849933 T AT 05849933T AT 05849933 T AT05849933 T AT 05849933T AT E400897 T1 ATE400897 T1 AT E400897T1
Authority
AT
Austria
Prior art keywords
gate dielectric
channel region
semiconductor component
gate insulator
superparaelectric
Prior art date
Application number
AT05849933T
Other languages
English (en)
Inventor
Yukiko Furukawa
Cornelis A Mutsaers
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE400897T1 publication Critical patent/ATE400897T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00Bonding of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/692Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/69398Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides the material having a perovskite structure, e.g. BaTiO3
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/689Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having ferroelectric layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6329Deposition from the gas or vapour phase using physical ablation of a target, e.g. physical vapour deposition or pulsed laser deposition
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6332Deposition from the gas or vapour phase using thermal evaporation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326Deposition processes
    • H10P14/6328Deposition from the gas or vapour phase
    • H10P14/6334Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6339Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
  • Thin Film Transistor (AREA)
AT05849933T 2004-12-21 2005-12-13 Halbleiterbauelement mit superparaelektrischem gate-isolator ATE400897T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB0427900.6A GB0427900D0 (en) 2004-12-21 2004-12-21 Semiconductor device with high dielectric constant gate insulator and method of manufacture

Publications (1)

Publication Number Publication Date
ATE400897T1 true ATE400897T1 (de) 2008-07-15

Family

ID=34090400

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05849933T ATE400897T1 (de) 2004-12-21 2005-12-13 Halbleiterbauelement mit superparaelektrischem gate-isolator

Country Status (9)

Country Link
US (1) US8106434B2 (de)
EP (1) EP1831930B1 (de)
JP (1) JP2008524866A (de)
KR (1) KR20070087212A (de)
CN (1) CN100533760C (de)
AT (1) ATE400897T1 (de)
DE (1) DE602005008107D1 (de)
GB (1) GB0427900D0 (de)
WO (1) WO2006067678A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120080749A1 (en) * 2010-09-30 2012-04-05 Purtell Robert J Umos semiconductor devices formed by low temperature processing
DE102012005262B4 (de) * 2012-03-15 2014-11-06 Forschungszentrum Jülich GmbH Sensoranordnung aus Trägersubstrat und ferroelektrischer Schicht
DE102012022013A1 (de) 2012-11-02 2014-05-08 Forschungszentrum Jülich GmbH Fachbereich Patente Peptide, die an amino-terminal verkürztes Amyloid-beta-Peptid binden und deren Verwendung
US9698235B2 (en) 2013-10-22 2017-07-04 National Institute Of Advanced Industrial Science And Technology Field-effect transistor
KR102142038B1 (ko) * 2016-02-01 2020-09-14 가부시키가이샤 리코 전계 효과 트랜지스터, 그 제조 방법, 디스플레이 소자, 디스플레이 디바이스, 및 시스템
US10702940B2 (en) * 2018-08-20 2020-07-07 Samsung Electronics Co., Ltd. Logic switching device and method of manufacturing the same
US10714486B2 (en) 2018-09-13 2020-07-14 Sandisk Technologies Llc Static random access memory cell employing n-doped PFET gate electrodes and methods of manufacturing the same
KR102903264B1 (ko) * 2019-10-22 2025-12-22 삼성전자주식회사 전자 소자 및 그 제조방법
US11257950B2 (en) * 2020-02-24 2022-02-22 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method for the semiconductor structure
CN112151357B (zh) * 2020-09-24 2023-03-21 欧阳俊 一种钛酸钡基超顺电膜及其中低温溅射制备方法与应用
US11817475B2 (en) * 2020-11-27 2023-11-14 Samsung Electronics Co., Ltd. Semiconductor device and semiconductor apparatus including the same
EP4064363A1 (de) * 2021-03-24 2022-09-28 Hitachi Energy Switzerland AG Halbleiterbauelement mit isoliertem gate, verfahren zur herstellung davon und leistungsmodul damit
KR102929695B1 (ko) 2022-04-14 2026-02-20 삼성전자주식회사 반도체 장치
US20230352584A1 (en) * 2022-05-02 2023-11-02 Dmitri Evgenievich Nikonov Technologies for transistors with a ferroelectric gate dielectric

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5553007A (en) * 1978-10-13 1980-04-18 Suwa Seikosha Kk Dielectric material and method of manufacturing same
US5112433A (en) * 1988-12-09 1992-05-12 Battelle Memorial Institute Process for producing sub-micron ceramic powders of perovskite compounds with controlled stoichiometry and particle size
JPH06151872A (ja) * 1992-11-09 1994-05-31 Mitsubishi Kasei Corp Fet素子
US5739563A (en) * 1995-03-15 1998-04-14 Kabushiki Kaisha Toshiba Ferroelectric type semiconductor device having a barium titanate type dielectric film and method for manufacturing the same
WO1996029734A1 (en) 1995-03-20 1996-09-26 Hitachi, Ltd. Semiconductor integrated circuit device and its manufacture
JPH08274195A (ja) * 1995-03-30 1996-10-18 Mitsubishi Chem Corp 強誘電体fet素子
US5891798A (en) * 1996-12-20 1999-04-06 Intel Corporation Method for forming a High dielectric constant insulator in the fabrication of an integrated circuit
US6265749B1 (en) * 1997-10-14 2001-07-24 Advanced Micro Devices, Inc. Metal silicide transistor gate spaced from a semiconductor substrate by a ceramic gate dielectric having a high dielectric constant
US6278165B1 (en) * 1998-06-29 2001-08-21 Kabushiki Kaisha Toshiba MIS transistor having a large driving current and method for producing the same
US6121094A (en) * 1998-07-21 2000-09-19 Advanced Micro Devices, Inc. Method of making a semiconductor device with a multi-level gate structure
US6255122B1 (en) * 1999-04-27 2001-07-03 International Business Machines Corporation Amorphous dielectric capacitors on silicon
JP2001044419A (ja) * 1999-07-14 2001-02-16 Texas Instr Inc <Ti> 高k誘電体を有するゲート積層の形成方法
DE19946437A1 (de) * 1999-09-28 2001-04-12 Infineon Technologies Ag Ferroelektrischer Transistor
US6635528B2 (en) * 1999-12-22 2003-10-21 Texas Instruments Incorporated Method of planarizing a conductive plug situated under a ferroelectric capacitor
JP2002026312A (ja) * 2000-07-06 2002-01-25 National Institute Of Advanced Industrial & Technology 半導体装置
JP3875477B2 (ja) * 2000-09-25 2007-01-31 株式会社東芝 半導体素子
US6468858B1 (en) * 2001-03-23 2002-10-22 Taiwan Semiconductor Manufacturing Company Method of forming a metal insulator metal capacitor structure
US20020167005A1 (en) * 2001-05-11 2002-11-14 Motorola, Inc Semiconductor structure including low-leakage, high crystalline dielectric materials and methods of forming same
US6709989B2 (en) * 2001-06-21 2004-03-23 Motorola, Inc. Method for fabricating a semiconductor structure including a metal oxide interface with silicon
US6727995B1 (en) * 2001-07-12 2004-04-27 Advanced Micro Devices, Inc. Gate oxide thickness measurement and control using scatterometry
US8569042B2 (en) * 2005-02-23 2013-10-29 Alcatel Lucent DNA structures on ferroelectrics and semiconductors

Also Published As

Publication number Publication date
KR20070087212A (ko) 2007-08-27
EP1831930B1 (de) 2008-07-09
US20100001324A1 (en) 2010-01-07
US8106434B2 (en) 2012-01-31
CN100533760C (zh) 2009-08-26
GB0427900D0 (en) 2005-01-19
WO2006067678A1 (en) 2006-06-29
DE602005008107D1 (de) 2008-08-21
CN101084581A (zh) 2007-12-05
JP2008524866A (ja) 2008-07-10
EP1831930A1 (de) 2007-09-12

Similar Documents

Publication Publication Date Title
ATE400897T1 (de) Halbleiterbauelement mit superparaelektrischem gate-isolator
GB2581115A (en) Hafnium oxide and zirconium oxide based ferroelectric devices with textured iridium bottom electrodes
Lee et al. Role of high-k gate insulators for oxide thin film transistors
Park et al. Effect of Zr content on the wake-up effect in Hf1–x Zr x O2 films
Cho et al. Evaluation of Y2O3 gate insulators for a-IGZO thin film transistors
KR20080099084A (ko) 박막 트랜지스터 및 그 제조 방법
WO2008126492A1 (ja) 電界効果型トランジスタ及び電界効果型トランジスタの製造方法
EP2263254A4 (de) Zweigate-lateraldiffusions-mos-transistor
Chandrasekar et al. Demonstration of Wide Bandgap AlGaN/GaN Negative‐Capacitance High‐Electron‐Mobility Transistors (NC‐HEMTs) Using Barium Titanate Ferroelectric Gates
Walker et al. Low temperature fabrication of high performance ZnO thin film transistors with high-k dielectrics
Hao et al. Electric field cycling induced large electrostrain in aged (K0. 5Na0. 5) NbO3–Cu lead‐free piezoelectric ceramics
Liu et al. Electrical properties of atomic layer deposited HfO2/Al2O3 multilayer on diamond
Tarsoly et al. Doping of indium oxide semiconductor film prepared using an environmentally friendly aqueous solution process with sub-1% molybdenum to improve device performance and stability
Cho et al. Expeditiously crystallized pure orthorhombic-Hf0. 5Zr0. 5O2 for negative capacitance field effect transistors
Kato et al. Suppression of short-channel effects in normally-off GaN MOSFETs with deep recessed-gate structures
Wu et al. Enhanced electrical properties, phase structure, and temperature-stable dielectric of (K0. 48Na0. 52) NbO3-Bi0. 5Li0. 5ZrO3 ceramics
Ding et al. ZrO2 insulator modified by a thin Al2O3 film to enhance the performance of InGaZnO thin-film transistor
JPWO2022106955A5 (de)
Chiu et al. N2O treatment enhancement-mode InAlN/GaN HEMTs with HfZrO2 High-k insulator
Yang et al. Differences Between Copper‐Oxide‐and Zinc‐Oxide‐Doped Sodium Potassium Niobate Ceramics
Li et al. Evaluation of a gate-first process for AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors with low ohmic annealing temperature
Bobade et al. Room temperature fabrication Oxide TFT with Y2O3 as a gate oxide and Mo contact
Hao et al. Enhanced memory characteristics by interface modification of ferroelectric LiNbO3 films on Si using ZnO buffers
Yu et al. Temperature‐insensitive strain behavior in 0.99 [(1− x) Bi0. 5 (Na0. 80K0. 20) 0.5 TiO3− xBiFeO3]–0.01 Ta lead‐free piezoelectric ceramics
Pinto et al. Effect of varying the gate voltage scan rate in a MoS2/ferroelectric polymer field effect transistor

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties