ATE403904T1 - Verfahren und sytem zur überwachung des dma- zustandes in einem rechnersystem - Google Patents

Verfahren und sytem zur überwachung des dma- zustandes in einem rechnersystem

Info

Publication number
ATE403904T1
ATE403904T1 AT03705740T AT03705740T ATE403904T1 AT E403904 T1 ATE403904 T1 AT E403904T1 AT 03705740 T AT03705740 T AT 03705740T AT 03705740 T AT03705740 T AT 03705740T AT E403904 T1 ATE403904 T1 AT E403904T1
Authority
AT
Austria
Prior art keywords
monitoring
computer system
dma state
status register
dma
Prior art date
Application number
AT03705740T
Other languages
English (en)
Inventor
Robert Burton
Aniruddha Joshi
Jennifer Wang
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE403904T1 publication Critical patent/ATE403904T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Hardware Redundancy (AREA)
  • Bus Control (AREA)
AT03705740T 2002-02-01 2003-01-10 Verfahren und sytem zur überwachung des dma- zustandes in einem rechnersystem ATE403904T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/060,336 US6922741B2 (en) 2002-02-01 2002-02-01 Method and system for monitoring DMA status

Publications (1)

Publication Number Publication Date
ATE403904T1 true ATE403904T1 (de) 2008-08-15

Family

ID=27658297

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03705740T ATE403904T1 (de) 2002-02-01 2003-01-10 Verfahren und sytem zur überwachung des dma- zustandes in einem rechnersystem

Country Status (7)

Country Link
US (1) US6922741B2 (de)
EP (1) EP1470492B1 (de)
CN (1) CN1625736A (de)
AT (1) ATE403904T1 (de)
AU (1) AU2003207529A1 (de)
DE (1) DE60322664D1 (de)
WO (1) WO2003067444A2 (de)

Families Citing this family (19)

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JP2005128747A (ja) * 2003-10-23 2005-05-19 Fujitsu Ltd シリアル転送バス用の送受信マクロを有する集積回路装置
JP2005293427A (ja) * 2004-04-02 2005-10-20 Matsushita Electric Ind Co Ltd データ転送処理装置及びデータ転送処理方法
US8200879B1 (en) 2004-06-29 2012-06-12 National Semiconductor Corporation Memory interface including an efficient variable-width bus
CN101218570B (zh) 2005-06-30 2010-05-26 飞思卡尔半导体公司 在直接存储器存取任务请求之间进行仲裁的装置和方法
WO2007003986A1 (en) 2005-06-30 2007-01-11 Freescale Semiconductor, Inc. Device and method for controlling an execution of a dma task
EP1899827B1 (de) * 2005-06-30 2010-09-08 Freescale Semiconductor, Inc. Einrichtung und verfahren zum ausführen einer dma-task
WO2007003985A1 (en) * 2005-06-30 2007-01-11 Freescale Semiconductor, Inc. Device and method for controlling multiple dma tasks
US7912998B2 (en) * 2006-01-06 2011-03-22 Hewlett-Packard Development Company, L.P. DMA access systems and methods
JP4908017B2 (ja) * 2006-02-28 2012-04-04 富士通株式会社 Ｄｍａデータ転送装置及びｄｍａデータ転送方法
CN100464318C (zh) * 2007-04-27 2009-02-25 北京中星微电子有限公司 一种实现高效dma传输的dma控制器及传输方法
US20090119460A1 (en) * 2007-11-07 2009-05-07 Infineon Technologies Ag Storing Portions of a Data Transfer Descriptor in Cached and Uncached Address Space
US9047264B2 (en) * 2011-04-11 2015-06-02 Ineda Systems Pvt. Ltd. Low pin count controller
US9201719B2 (en) 2012-03-16 2015-12-01 Infineon Technologies Ag Method and system for timeout monitoring
CN103034599B (zh) * 2012-12-12 2015-07-22 深圳国微技术有限公司 安全dma控制器、soc系统及其数据搬运方法
JP2014209312A (ja) * 2013-03-25 2014-11-06 株式会社東芝 集積回路
US10761983B2 (en) * 2017-11-14 2020-09-01 International Business Machines Corporation Memory based configuration state registers
US12072818B2 (en) * 2022-04-28 2024-08-27 Infineon Technologies Ag Systems and methods for concurrent logging and event capture
CN117609983A (zh) * 2023-11-13 2024-02-27 三星（中国）半导体有限公司 Api调用方法、api调用装置、电子设备和存储介质
WO2026073396A1 (en) * 2024-10-03 2026-04-09 Qualcomm Incorporated Apparatus and methods for messaging control within die architectures

Family Cites Families (11)

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Publication number Priority date Publication date Assignee Title
US4482982A (en) * 1980-09-29 1984-11-13 Honeywell Information Systems Inc. Communication multiplexer sharing a free running timer among multiple communication lines
US4716523A (en) * 1985-06-14 1987-12-29 International Business Machines Corporation Multiple port integrated DMA and interrupt controller and arbitrator
US5289583A (en) 1990-10-19 1994-02-22 International Business Machines Corporation Bus master with antilockup and no idle bus cycles
US5333274A (en) * 1991-10-15 1994-07-26 International Business Machines Corp. Error detection and recovery in a DMA controller
TW276312B (de) * 1992-10-20 1996-05-21 Cirrlis Logic Inc
US5499384A (en) * 1992-12-31 1996-03-12 Seiko Epson Corporation Input output control unit having dedicated paths for controlling the input and output of data between host processor and external device
US5659720A (en) * 1995-04-27 1997-08-19 Emulex Corporatioln Computer control device for managing a timer array
US5740233A (en) * 1995-11-02 1998-04-14 Intervoice Limited Partnership System and method for statistical diagnosis of the operation of an automated telephone system
US6081852A (en) * 1996-04-26 2000-06-27 Texas Instruments Incorporated Packet data transferring system for autonomously operating a DMA by autonomous boot mode select signal wherein the DMA is enabled to at least one program control list
US6484217B1 (en) * 1999-04-20 2002-11-19 International Business Machines Corporation Managing shared devices in a data processing system
JP2001297056A (ja) 2000-04-11 2001-10-26 Canon Inc 調停回路及びｄｍａコントローラ

Also Published As

Publication number Publication date
AU2003207529A1 (en) 2003-09-02
EP1470492B1 (de) 2008-08-06
EP1470492A2 (de) 2004-10-27
WO2003067444A2 (en) 2003-08-14
US20030149808A1 (en) 2003-08-07
WO2003067444A3 (en) 2004-03-25
CN1625736A (zh) 2005-06-08
DE60322664D1 (de) 2008-09-18
US6922741B2 (en) 2005-07-26
AU2003207529A8 (en) 2003-09-02

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