ATE406741T1 - Streaming-speichersteuerung - Google Patents

Streaming-speichersteuerung

Info

Publication number
ATE406741T1
ATE406741T1 AT05850071T AT05850071T ATE406741T1 AT E406741 T1 ATE406741 T1 AT E406741T1 AT 05850071 T AT05850071 T AT 05850071T AT 05850071 T AT05850071 T AT 05850071T AT E406741 T1 ATE406741 T1 AT E406741T1
Authority
AT
Austria
Prior art keywords
memory
streaming
smu
mem
network
Prior art date
Application number
AT05850071T
Other languages
English (en)
Inventor
Artur Burchard
Ewa Hekstra-Nowacka
Francoise Harmsze
Den Hamer Peter Van
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Application granted granted Critical
Publication of ATE406741T1 publication Critical patent/ATE406741T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements
    • H04L49/9063—Intermediate storage in different physical parts of a node or terminal
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1673—Details of memory controller using buffers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L49/00—Packet switching elements
    • H04L49/90—Buffering arrangements

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
  • Magnetically Actuated Valves (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Vehicle Body Suspensions (AREA)
AT05850071T 2004-12-03 2005-11-30 Streaming-speichersteuerung ATE406741T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP04106274 2004-12-03

Publications (1)

Publication Number Publication Date
ATE406741T1 true ATE406741T1 (de) 2008-09-15

Family

ID=36127381

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05850071T ATE406741T1 (de) 2004-12-03 2005-11-30 Streaming-speichersteuerung

Country Status (7)

Country Link
US (1) US20100198936A1 (de)
EP (2) EP1820309B1 (de)
JP (1) JP2008522305A (de)
CN (1) CN101069391A (de)
AT (1) ATE406741T1 (de)
DE (1) DE602005009399D1 (de)
WO (2) WO2006072844A2 (de)

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US8065493B2 (en) 2005-06-09 2011-11-22 Nxp B.V. Memory controller and method for coupling a network and a memory
US8108574B2 (en) * 2008-10-08 2012-01-31 Lsi Corporation Apparatus and methods for translation of data formats between multiple interface types
US20100228926A1 (en) * 2009-03-09 2010-09-09 Cypress Semiconductor Corporation Multi-port memory devices and methods
US9489326B1 (en) * 2009-03-09 2016-11-08 Cypress Semiconductor Corporation Multi-port integrated circuit devices and methods
US8295287B2 (en) * 2010-01-27 2012-10-23 National Instruments Corporation Network traffic shaping for reducing bus jitter on a real time controller
US8850089B1 (en) * 2010-06-18 2014-09-30 Integrated Device Technology, Inc. Method and apparatus for unified final buffer with pointer-based and page-based scheme for traffic optimization
US8762644B2 (en) * 2010-10-15 2014-06-24 Qualcomm Incorporated Low-power audio decoding and playback using cached images
US8855194B2 (en) * 2011-05-09 2014-10-07 Texas Instruments Incorporated Updating non-shadow registers in video encoder
US20170019353A1 (en) * 2011-07-29 2017-01-19 Blackfire Research Corporation Two tier multiple sliding window mechanism for multidestination media applications
US9071418B2 (en) * 2011-07-29 2015-06-30 Blackfire Research Corporation Synchronous media rendering of demuxed media components across multiple devices
US8549234B2 (en) 2011-10-14 2013-10-01 Renesas Mobile Corporation Memory controller and methods
WO2014026033A1 (en) * 2012-08-08 2014-02-13 University Of Florida Research Foundation, Inc. Cross-reactive t cell epitopes of hiv, siv, and fiv for vaccines in humans and cats
US9189435B2 (en) * 2013-04-23 2015-11-17 Apple Inc. Method and apparatus for arbitration with multiple source paths
CN103558995B (zh) * 2013-10-15 2016-09-28 华为技术有限公司 一种存储控制芯片及磁盘报文传输方法
US9665533B2 (en) * 2013-12-20 2017-05-30 Rambus Inc. Blob pools, selectors, and command set implemented within a memory appliance for accessing memory
KR102336666B1 (ko) * 2017-09-15 2021-12-07 삼성전자 주식회사 메모리 장치 및 이를 포함하는 메모리 시스템
US11232037B2 (en) 2017-10-23 2022-01-25 Seagate Technology Llc Using a first-in-first-out (FIFO) wraparound address lookup table (ALT) to manage cached data
US10437758B1 (en) 2018-06-29 2019-10-08 Apple Inc. Memory request management system
US10621115B2 (en) 2018-06-29 2020-04-14 Apple Inc System and method for communication link management in a credit-based system
KR102818463B1 (ko) * 2019-07-25 2025-06-10 삼성전자주식회사 마스터 지능 소자 및 이의 제어 방법
US11823771B2 (en) * 2020-01-30 2023-11-21 Stmicroelectronics S.R.L. Streaming access memory device, system and method
US11321259B2 (en) * 2020-02-14 2022-05-03 Sony Interactive Entertainment Inc. Network architecture providing high speed storage access through a PCI express fabric between a compute node and a storage server
US12468479B2 (en) * 2024-02-21 2025-11-11 Nvidia Corporation Simultaneous distributed and non-distributed address maps and routing protocols in a computing system

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US5797043A (en) * 1996-03-13 1998-08-18 Diamond Multimedia Systems, Inc. System for managing the transfer of data between FIFOs within pool memory and peripherals being programmable with identifications of the FIFOs
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Also Published As

Publication number Publication date
DE602005009399D1 (de) 2008-10-09
EP1820309B1 (de) 2008-08-27
EP1820309A2 (de) 2007-08-22
WO2006059283A3 (en) 2006-11-16
JP2008522305A (ja) 2008-06-26
US20100198936A1 (en) 2010-08-05
WO2006072844A3 (en) 2006-10-12
CN101069391A (zh) 2007-11-07
WO2006059283A2 (en) 2006-06-08
WO2006072844A2 (en) 2006-07-13
EP1820107A2 (de) 2007-08-22

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Legal Events

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