ATE407453T1 - Herstellungsverfahren für ein halbleiter- bipolartransistor-bauelement - Google Patents
Herstellungsverfahren für ein halbleiter- bipolartransistor-bauelementInfo
- Publication number
- ATE407453T1 ATE407453T1 AT01945322T AT01945322T ATE407453T1 AT E407453 T1 ATE407453 T1 AT E407453T1 AT 01945322 T AT01945322 T AT 01945322T AT 01945322 T AT01945322 T AT 01945322T AT E407453 T1 ATE407453 T1 AT E407453T1
- Authority
- AT
- Austria
- Prior art keywords
- active area
- type doped
- base
- collector
- poly
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000004065 semiconductor Substances 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 2
- 229920005591 polysilicon Polymers 0.000 abstract 2
- 125000006850 spacer group Chemical group 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract 1
- 238000005530 etching Methods 0.000 abstract 1
- 238000002955 isolation Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 229910052710 silicon Inorganic materials 0.000 abstract 1
- 239000010703 silicon Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/01—Manufacture or treatment
- H10D10/051—Manufacture or treatment of vertical BJTs
- H10D10/054—Forming extrinsic base regions on silicon substrate after insulating device isolation in vertical BJTs having single crystalline emitter, collector or base regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/40—Vertical BJTs
- H10D10/421—Vertical BJTs having both emitter-base and base-collector junctions ending at the same surface of the body
Landscapes
- Bipolar Transistors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP00202342 | 2000-07-03 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE407453T1 true ATE407453T1 (de) | 2008-09-15 |
Family
ID=8171743
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT01945322T ATE407453T1 (de) | 2000-07-03 | 2001-06-28 | Herstellungsverfahren für ein halbleiter- bipolartransistor-bauelement |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US6780724B2 (de) |
| EP (1) | EP1228533B1 (de) |
| JP (1) | JP2004503091A (de) |
| KR (1) | KR100761561B1 (de) |
| AT (1) | ATE407453T1 (de) |
| DE (1) | DE60135628D1 (de) |
| WO (1) | WO2002003470A1 (de) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6803289B1 (en) * | 2002-06-28 | 2004-10-12 | Cypress Semiconductor Corp. | Bipolar transistor and method for making the same |
| US7074628B2 (en) * | 2004-09-22 | 2006-07-11 | Agere Systems, Inc. | Test structure and method for yield improvement of double poly bipolar device |
| CN101908485B (zh) * | 2010-06-11 | 2016-03-02 | 上海华虹宏力半导体制造有限公司 | 利用三块掩模板制作垂直双极型晶体管的方法 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60186059A (ja) * | 1984-03-05 | 1985-09-21 | Sony Corp | 半導体装置及びその製造方法 |
| JPS63261746A (ja) * | 1987-04-20 | 1988-10-28 | Oki Electric Ind Co Ltd | バイポ−ラ型半導体集積回路装置の製造方法 |
| JP2615646B2 (ja) * | 1987-08-11 | 1997-06-04 | ソニー株式会社 | バイポーラトランジスタの製造方法 |
| US5204274A (en) | 1988-11-04 | 1993-04-20 | Matsushita Electric Industrial Co., Ltd. | Method of fabricating semiconductor device |
| US5101256A (en) | 1989-02-13 | 1992-03-31 | International Business Machines Corporation | Bipolar transistor with ultra-thin epitaxial base and method of fabricating same |
| JPH03138946A (ja) * | 1989-10-24 | 1991-06-13 | Sony Corp | 半導体装置 |
| JPH06260489A (ja) * | 1993-03-02 | 1994-09-16 | Oki Electric Ind Co Ltd | 半導体装置の製造方法 |
-
2001
- 2001-06-28 AT AT01945322T patent/ATE407453T1/de not_active IP Right Cessation
- 2001-06-28 JP JP2002507451A patent/JP2004503091A/ja not_active Withdrawn
- 2001-06-28 KR KR1020027002674A patent/KR100761561B1/ko not_active Expired - Fee Related
- 2001-06-28 WO PCT/EP2001/007407 patent/WO2002003470A1/en not_active Ceased
- 2001-06-28 EP EP01945322A patent/EP1228533B1/de not_active Expired - Lifetime
- 2001-06-28 US US10/069,893 patent/US6780724B2/en not_active Expired - Lifetime
- 2001-06-28 DE DE60135628T patent/DE60135628D1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| DE60135628D1 (de) | 2008-10-16 |
| JP2004503091A (ja) | 2004-01-29 |
| EP1228533A1 (de) | 2002-08-07 |
| US6780724B2 (en) | 2004-08-24 |
| KR100761561B1 (ko) | 2007-09-27 |
| WO2002003470A1 (en) | 2002-01-10 |
| KR20020064279A (ko) | 2002-08-07 |
| EP1228533B1 (de) | 2008-09-03 |
| US20020123199A1 (en) | 2002-09-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP0196757B1 (de) | Halbleiteranordnung mit einem bipolaren Transistor und einem MOS-Transistor und Verfahren zu deren Herstellung | |
| KR910019219A (ko) | 반도체 구조물에 스페이서를 형성하는 방법 및 그 스페이서 구조 | |
| JPS5994861A (ja) | 半導体集積回路装置及びその製造方法 | |
| JPH07335663A (ja) | バーチカル・ヘテロ接合バイポーラ・トランジスタおよびその製造方法 | |
| JPH04278576A (ja) | BiCMOS素子の製造方法 | |
| US5793085A (en) | Bipolar transistor compatible with CMOS processes | |
| KR840005927A (ko) | 반도체 집적 회로 장치 및 그의 제조 방법 | |
| SE0200414D0 (sv) | Semiconductor fabrication process lateral pnp transistor, and integrated circuit | |
| KR960043167A (ko) | 반도체 집적회로장치 및 그 제조방법 | |
| ATE407453T1 (de) | Herstellungsverfahren für ein halbleiter- bipolartransistor-bauelement | |
| JP3493681B2 (ja) | 埋込みアバランシュ・ダイオード | |
| JPH0478163A (ja) | 半導体装置 | |
| GB2143082A (en) | Bipolar lateral transistor | |
| JPH07283408A (ja) | 半導体装置 | |
| KR0136915B1 (ko) | 레치-업 현상을 방지할 수 있는 바이폴라-씨모스의 제조방법 | |
| JPH03222357A (ja) | 半導体装置及びその製造方法 | |
| JPS61276359A (ja) | 半導体装置およびその製造方法 | |
| KR100332115B1 (ko) | 반도체전력소자및그제조방법 | |
| KR100209228B1 (ko) | 바이폴라 접합 트랜지스터 제조방법 | |
| KR900000816B1 (ko) | I^2l소자의 제조방법 | |
| KR100262802B1 (ko) | 횡방향 바이폴라 트랜지스터를 적용한 인터그래이티드 인젝션 로직소자 | |
| KR940009359B1 (ko) | 바이씨모스(bicmos)의 구조 및 제조방법 | |
| KR100571423B1 (ko) | 바이씨모스 소자의 바이폴라 트랜지스터 및 그 제조 방법 | |
| KR19990002164A (ko) | 바이폴라 트랜지스터 및 그 제조 방법 | |
| JP2940203B2 (ja) | セミカスタム半導体集積回路 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |