ATE431958T1 - Speicherbaustein und verfahren zur bereitstellung eines auf einer mittleren schwelle basierenden auffrischmechanismus - Google Patents

Speicherbaustein und verfahren zur bereitstellung eines auf einer mittleren schwelle basierenden auffrischmechanismus

Info

Publication number
ATE431958T1
ATE431958T1 AT05791933T AT05791933T ATE431958T1 AT E431958 T1 ATE431958 T1 AT E431958T1 AT 05791933 T AT05791933 T AT 05791933T AT 05791933 T AT05791933 T AT 05791933T AT E431958 T1 ATE431958 T1 AT E431958T1
Authority
AT
Austria
Prior art keywords
coupled
memory device
providing
bit line
refresh
Prior art date
Application number
AT05791933T
Other languages
English (en)
Inventor
Johannis Blacquiere
Acht Victor Van
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE431958T1 publication Critical patent/ATE431958T1/de

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3431—Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step

Landscapes

  • Read Only Memory (AREA)
  • Dram (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Devices For Executing Special Programs (AREA)
  • Computer And Data Communications (AREA)
AT05791933T 2004-10-21 2005-10-17 Speicherbaustein und verfahren zur bereitstellung eines auf einer mittleren schwelle basierenden auffrischmechanismus ATE431958T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP04105203 2004-10-21
PCT/IB2005/053393 WO2006043225A1 (en) 2004-10-21 2005-10-17 Memory device and method providing an average threshold based refresh mechanism

Publications (1)

Publication Number Publication Date
ATE431958T1 true ATE431958T1 (de) 2009-06-15

Family

ID=35595758

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05791933T ATE431958T1 (de) 2004-10-21 2005-10-17 Speicherbaustein und verfahren zur bereitstellung eines auf einer mittleren schwelle basierenden auffrischmechanismus

Country Status (8)

Country Link
US (1) US7483324B2 (de)
EP (1) EP1807841B1 (de)
JP (1) JP2008525924A (de)
KR (1) KR20070084240A (de)
CN (1) CN101044578B (de)
AT (1) ATE431958T1 (de)
DE (1) DE602005014567D1 (de)
WO (1) WO2006043225A1 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7894282B2 (en) * 2005-11-29 2011-02-22 Samsung Electronics Co., Ltd. Dynamic random access memory device and method of determining refresh cycle thereof
US7447096B2 (en) * 2006-05-05 2008-11-04 Honeywell International Inc. Method for refreshing a non-volatile memory
KR101266594B1 (ko) * 2006-08-05 2013-05-22 벤호프 게엠베하 엘엘씨 솔리드 스테이트 스토리지 소자 및 방법
US7577036B2 (en) 2007-05-02 2009-08-18 Micron Technology, Inc. Non-volatile multilevel memory cells with data read of reference cells
US8060798B2 (en) 2007-07-19 2011-11-15 Micron Technology, Inc. Refresh of non-volatile memory cells based on fatigue conditions
KR101802448B1 (ko) 2010-10-12 2017-11-28 삼성전자주식회사 상변화 메모리 장치 및 상변화 메모리 장치의 리라이트 동작 방법
US9159396B2 (en) * 2011-06-30 2015-10-13 Lattice Semiconductor Corporation Mechanism for facilitating fine-grained self-refresh control for dynamic memory devices
KR102148389B1 (ko) 2014-06-11 2020-08-27 삼성전자주식회사 오버 라이트 동작을 갖는 메모리 시스템 및 그에 따른 동작 제어방법
GB2527318A (en) 2014-06-17 2015-12-23 Ibm Estimation of level-thresholds for memory cells
CN106558343B (zh) 2015-09-24 2021-12-28 三星电子株式会社 操作非易失性存储装置的方法和非易失性存储装置
DE112018004191B4 (de) * 2017-08-17 2021-02-18 Syntiant Digital unterstützte flash-auffrischung
US10446246B2 (en) * 2018-03-14 2019-10-15 Silicon Storage Technology, Inc. Method and apparatus for data refresh for analog non-volatile memory in deep learning neural network

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2181284A (en) * 1936-08-31 1939-11-28 Eastman Oil Well Survey Co Spudding bit
US4170058A (en) * 1976-07-26 1979-10-09 Reliance Electric Co. Method of adjusting end play
US4309694A (en) * 1980-03-27 1982-01-05 Bell Telephone Laboratories, Incorporated Zero disparity coding system
US5532962A (en) 1992-05-20 1996-07-02 Sandisk Corporation Soft errors handling in EEPROM devices
US6490200B2 (en) * 2000-03-27 2002-12-03 Sandisk Corporation Non-volatile memory with improved sensing and method therefor
FR2816750B1 (fr) * 2000-11-15 2003-01-24 St Microelectronics Sa Memoire flash comprenant des moyens de controle de la tension de seuil de cellules memoire
TW559814B (en) 2001-05-31 2003-11-01 Semiconductor Energy Lab Nonvolatile memory and method of driving the same
CN1303612C (zh) * 2001-08-01 2007-03-07 联华电子股份有限公司 选择性存储器刷新电路与刷新方法
JP4459495B2 (ja) * 2001-12-13 2010-04-28 富士通マイクロエレクトロニクス株式会社 半導体記憶装置のリフレッシュ制御方法、及び該制御方法を有する半導体記憶装置
US6621739B2 (en) 2002-01-18 2003-09-16 Sandisk Corporation Reducing the effects of noise in non-volatile memories through multiple reads
US6735114B1 (en) * 2003-02-04 2004-05-11 Advanced Micro Devices, Inc. Method of improving dynamic reference tracking for flash memory unit
WO2005104132A1 (en) 2004-04-22 2005-11-03 Koninklijke Philips Electronics N.V. Electronic circuit with memory for which a threshold level is selected

Also Published As

Publication number Publication date
EP1807841A1 (de) 2007-07-18
EP1807841B1 (de) 2009-05-20
DE602005014567D1 (de) 2009-07-02
KR20070084240A (ko) 2007-08-24
US7483324B2 (en) 2009-01-27
CN101044578A (zh) 2007-09-26
WO2006043225A1 (en) 2006-04-27
WO2006043225B1 (en) 2006-07-27
JP2008525924A (ja) 2008-07-17
US20080062769A1 (en) 2008-03-13
CN101044578B (zh) 2011-12-07

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