ATE434264T1 - Verfahren zum zusammenbau einer doppelseitigen schaltungskomponente - Google Patents
Verfahren zum zusammenbau einer doppelseitigen schaltungskomponenteInfo
- Publication number
- ATE434264T1 ATE434264T1 AT06075271T AT06075271T ATE434264T1 AT E434264 T1 ATE434264 T1 AT E434264T1 AT 06075271 T AT06075271 T AT 06075271T AT 06075271 T AT06075271 T AT 06075271T AT E434264 T1 ATE434264 T1 AT E434264T1
- Authority
- AT
- Austria
- Prior art keywords
- substrate
- contact area
- lead member
- double
- receptacle
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3405—Edge mounted components, e.g. terminals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/464—Additional interconnections in combination with leadframes
- H10W70/468—Circuit boards
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/479—Leadframes on or in insulating or insulated package substrates, interposers, or redistribution layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/145—Arrangements wherein electric components are disposed between and simultaneously connected to two planar printed circuit boards, e.g. Cordwood modules
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/1034—Edge terminals, i.e. separate pieces of metal attached to the edge of the printed circuit board [PCB]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10742—Details of leads
- H05K2201/10886—Other details
- H05K2201/10924—Leads formed from a punched metal foil
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0165—Holder for holding a Printed Circuit Board [PCB] during processing, e.g. during screen printing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/741—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including a cavity for storing a finished or partly finished device during manufacturing or mounting, e.g. for an IC package or for a chip
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Control Of Driving Devices And Active Controlling Of Vehicle (AREA)
- Addition Polymer Or Copolymer, Post-Treatments, Or Chemical Modifications (AREA)
- Supply And Installment Of Electrical Components (AREA)
- Multi-Conductor Connections (AREA)
- Manufacturing Of Electrical Connectors (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/906,518 US7229855B2 (en) | 2005-02-23 | 2005-02-23 | Process for assembling a double-sided circuit component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE434264T1 true ATE434264T1 (de) | 2009-07-15 |
Family
ID=36579414
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT06075271T ATE434264T1 (de) | 2005-02-23 | 2006-02-07 | Verfahren zum zusammenbau einer doppelseitigen schaltungskomponente |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7229855B2 (de) |
| EP (1) | EP1696484B1 (de) |
| AT (1) | ATE434264T1 (de) |
| DE (1) | DE602006007250D1 (de) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7447041B2 (en) * | 2007-03-01 | 2008-11-04 | Delphi Technologies, Inc. | Compression connection for vertical IC packages |
| US9930789B2 (en) | 2010-04-12 | 2018-03-27 | Seagate Technology Llc | Flexible printed circuit cable with multi-layer interconnection and method of forming the same |
| US10373895B2 (en) | 2016-12-12 | 2019-08-06 | Infineon Technologies Austria Ag | Semiconductor device having die pads with exposed surfaces |
| US10002821B1 (en) * | 2017-09-29 | 2018-06-19 | Infineon Technologies Ag | Semiconductor chip package comprising semiconductor chip and leadframe disposed between two substrates |
| KR102733494B1 (ko) * | 2020-02-13 | 2024-11-25 | 엘지마그나 이파워트레인 주식회사 | 전력 모듈 |
| CN112016262B (zh) * | 2020-08-27 | 2023-03-24 | 东风汽车集团有限公司 | 一种多组并联双面冷却igbt管脚的定位工具及方法 |
| US12122251B2 (en) | 2022-09-28 | 2024-10-22 | BorgWarner US Technologies LLC | Systems and methods for bidirectional message architecture for inverter for electric vehicle |
| US12528329B2 (en) | 2023-06-07 | 2026-01-20 | BorgWarner US Technologies LLC | Systems for cooling module assembly for inverter for electric vehicle |
| US12526961B2 (en) | 2023-06-07 | 2026-01-13 | BorgWarner US Technologies LLC | Systems for cooling module assembly for inverter for electric vehicle |
| US12461129B2 (en) | 2023-08-28 | 2025-11-04 | BorgWarner US Technologies LLC | Systems and methods for galvanic interface bond detection for inverter for electric vehicle |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4538170A (en) * | 1983-01-03 | 1985-08-27 | General Electric Company | Power chip package |
| US5340771A (en) * | 1993-03-18 | 1994-08-23 | Lsi Logic Corporation | Techniques for providing high I/O count connections to semiconductor dies |
| US6020636A (en) * | 1997-10-24 | 2000-02-01 | Eni Technologies, Inc. | Kilowatt power transistor |
| JP4479121B2 (ja) * | 2001-04-25 | 2010-06-09 | 株式会社デンソー | 半導体装置の製造方法 |
| US6731002B2 (en) | 2001-05-04 | 2004-05-04 | Ixys Corporation | High frequency power device with a plastic molded package and direct bonded substrate |
| US6670216B2 (en) * | 2001-10-31 | 2003-12-30 | Ixys Corporation | Method for manufacturing a power semiconductor device and direct bonded substrate thereof |
| US20040094828A1 (en) | 2002-01-16 | 2004-05-20 | Delphi Technologies, Inc. | Double-sided multi-chip circuit component |
| US6812553B2 (en) | 2002-01-16 | 2004-11-02 | Delphi Technologies, Inc. | Electrically isolated and thermally conductive double-sided pre-packaged component |
-
2005
- 2005-02-23 US US10/906,518 patent/US7229855B2/en not_active Expired - Lifetime
-
2006
- 2006-02-07 DE DE602006007250T patent/DE602006007250D1/de not_active Expired - Lifetime
- 2006-02-07 AT AT06075271T patent/ATE434264T1/de not_active IP Right Cessation
- 2006-02-07 EP EP06075271A patent/EP1696484B1/de not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| EP1696484A1 (de) | 2006-08-30 |
| US20060189032A1 (en) | 2006-08-24 |
| EP1696484B1 (de) | 2009-06-17 |
| DE602006007250D1 (de) | 2009-07-30 |
| US7229855B2 (en) | 2007-06-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |