ATE448567T1 - Mosfet-transistor und verfahren zu deren herstellung - Google Patents

Mosfet-transistor und verfahren zu deren herstellung

Info

Publication number
ATE448567T1
ATE448567T1 AT01000491T AT01000491T ATE448567T1 AT E448567 T1 ATE448567 T1 AT E448567T1 AT 01000491 T AT01000491 T AT 01000491T AT 01000491 T AT01000491 T AT 01000491T AT E448567 T1 ATE448567 T1 AT E448567T1
Authority
AT
Austria
Prior art keywords
region
transistor
drain
producing
same
Prior art date
Application number
AT01000491T
Other languages
English (en)
Inventor
Jozef Czeslaw Mitros
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of ATE448567T1 publication Critical patent/ATE448567T1/de

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113—Isolations within a component, i.e. internal isolations
    • H10D62/115—Dielectric isolations, e.g. air gaps
    • H10D62/116—Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Bipolar Transistors (AREA)
AT01000491T 2000-09-21 2001-09-20 Mosfet-transistor und verfahren zu deren herstellung ATE448567T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US23427700P 2000-09-21 2000-09-21

Publications (1)

Publication Number Publication Date
ATE448567T1 true ATE448567T1 (de) 2009-11-15

Family

ID=22880690

Family Applications (1)

Application Number Title Priority Date Filing Date
AT01000491T ATE448567T1 (de) 2000-09-21 2001-09-20 Mosfet-transistor und verfahren zu deren herstellung

Country Status (5)

Country Link
US (1) US6660603B2 (de)
EP (1) EP1191577B1 (de)
JP (1) JP2002176175A (de)
AT (1) ATE448567T1 (de)
DE (1) DE60140415D1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6952039B1 (en) 2002-03-12 2005-10-04 National Semiconductor Corporation ESD protection snapback structure for overvoltage self-protecting I/O cells
US20040145066A1 (en) * 2003-01-24 2004-07-29 Swanson Leland S. Laser alignment structure for integrated circuits
US20040256692A1 (en) * 2003-06-19 2004-12-23 Keith Edmund Kunz Composite analog power transistor and method for making the same
US7498652B2 (en) 2004-04-26 2009-03-03 Texas Instruments Incorporated Non-uniformly doped high voltage drain-extended transistor and method of manufacture thereof
JP4836427B2 (ja) * 2004-09-28 2011-12-14 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
US7157784B2 (en) * 2005-01-31 2007-01-02 Texas Instruments Incorporated Drain extended MOS transistors with multiple capacitors and methods of fabrication
US7592661B1 (en) 2005-07-29 2009-09-22 Cypress Semiconductor Corporation CMOS embedded high voltage transistor
DE102005048000B4 (de) * 2005-10-06 2015-03-05 Austriamicrosystems Ag Verfahren zur Herstellung eines Transistors mit zuverlässiger Source-Dotierung
US7344947B2 (en) * 2006-03-10 2008-03-18 Texas Instruments Incorporated Methods of performance improvement of HVMOS devices
JP2007317903A (ja) * 2006-05-26 2007-12-06 Oki Electric Ind Co Ltd 半導体装置及びその製造方法
JP4723443B2 (ja) * 2006-09-13 2011-07-13 Ｏｋｉセミコンダクタ株式会社 半導体集積回路
US8344440B2 (en) 2008-02-25 2013-01-01 Tower Semiconductor Ltd. Three-terminal single poly NMOS non-volatile memory cell with shorter program/erase times
US7800156B2 (en) * 2008-02-25 2010-09-21 Tower Semiconductor Ltd. Asymmetric single poly NMOS non-volatile memory cell
US7859043B2 (en) * 2008-02-25 2010-12-28 Tower Semiconductor Ltd. Three-terminal single poly NMOS non-volatile memory cell
US8097930B2 (en) * 2008-08-08 2012-01-17 Infineon Technologies Ag Semiconductor devices with trench isolations
US8643090B2 (en) * 2009-03-23 2014-02-04 Infineon Technologies Ag Semiconductor devices and methods for manufacturing a semiconductor device
US7915129B2 (en) * 2009-04-22 2011-03-29 Polar Semiconductor, Inc. Method of fabricating high-voltage metal oxide semiconductor transistor devices
US8368127B2 (en) * 2009-10-08 2013-02-05 Globalfoundries Singapore Pte., Ltd. Method of fabricating a silicon tunneling field effect transistor (TFET) with high drive current
US8247280B2 (en) * 2009-10-20 2012-08-21 Taiwan Semiconductor Manufacturing Company, Ltd. Integration of low and high voltage CMOS devices
US8598656B2 (en) * 2010-03-08 2013-12-03 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus of forming ESD protection device
WO2013069070A1 (ja) * 2011-11-11 2013-05-16 パイオニア株式会社 半導体装置およびこれを用いたアクティブマトリクス駆動回路
KR101899556B1 (ko) * 2012-02-03 2018-10-04 에스케이하이닉스 시스템아이씨 주식회사 Ｂｃｄｍｏｓ 소자 및 그 제조방법
US9548377B2 (en) * 2013-09-16 2017-01-17 Texas Instruments Incorporated Thermal treatment for reducing transistor performance variation in ferroelectric memories
JP6440038B2 (ja) * 2014-06-18 2018-12-19 インテル・コーポレーション 高電圧電界効果トランジスタのための延長型ドレイン構造
US10115720B2 (en) * 2016-04-15 2018-10-30 Magnachip Semiconductor, Ltd. Integrated semiconductor device and method for manufacturing the same
DE102023120624B4 (de) 2023-08-03 2025-02-27 Elmos Semiconductor Se Vorrichtung und Verfahren zur Ansteuerung mindestens eines pyrotechnischen Auslöseelements einer insbesondere passiven Sicherheitseinheit eines Fahrzeugs

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5047358A (en) * 1989-03-17 1991-09-10 Delco Electronics Corporation Process for forming high and low voltage CMOS transistors on a single integrated circuit chip
US5498554A (en) 1994-04-08 1996-03-12 Texas Instruments Incorporated Method of making extended drain resurf lateral DMOS devices
US5903032A (en) 1994-05-13 1999-05-11 Texas Instruments Incorporated Power device integration for built-in ESD robustness
US6071768A (en) 1996-05-17 2000-06-06 Texas Instruments Incorporated Method of making an efficient NPN turn-on in a high voltage DENMOS transistor for ESD protection
KR100263480B1 (ko) * 1998-01-13 2000-09-01 김영환 이에스디 보호회로 및 그 제조방법
US6100125A (en) * 1998-09-25 2000-08-08 Fairchild Semiconductor Corp. LDD structure for ESD protection and method of fabrication

Also Published As

Publication number Publication date
US6660603B2 (en) 2003-12-09
EP1191577B1 (de) 2009-11-11
JP2002176175A (ja) 2002-06-21
US20020055233A1 (en) 2002-05-09
EP1191577A1 (de) 2002-03-27
DE60140415D1 (de) 2009-12-24

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