ATE451625T1 - METHOD AND STRUCTURE FOR DEVELOPING A TEST PROGRAM FOR INTEGRATED SEMICONDUCTOR CIRCUITS - Google Patents

METHOD AND STRUCTURE FOR DEVELOPING A TEST PROGRAM FOR INTEGRATED SEMICONDUCTOR CIRCUITS

Info

Publication number
ATE451625T1
ATE451625T1 AT05743262T AT05743262T ATE451625T1 AT E451625 T1 ATE451625 T1 AT E451625T1 AT 05743262 T AT05743262 T AT 05743262T AT 05743262 T AT05743262 T AT 05743262T AT E451625 T1 ATE451625 T1 AT E451625T1
Authority
AT
Austria
Prior art keywords
pattern
test system
modular
test
developing
Prior art date
Application number
AT05743262T
Other languages
German (de)
Inventor
Harsanjeet Singh
Ankan Pramanick
Mark Elston
Yoshifumi Tahara
Toshiaki Adachi
Original Assignee
Advantest Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/918,513 external-priority patent/US7209851B2/en
Application filed by Advantest Corp filed Critical Advantest Corp
Application granted granted Critical
Publication of ATE451625T1 publication Critical patent/ATE451625T1/en

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  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Debugging And Monitoring (AREA)
  • Management, Administration, Business Operations System, And Electronic Commerce (AREA)

Abstract

A method for managing a pattern object file in a modular test system is disclosed. The method includes providing a modular test system, where the modular test system comprises a system controller for controlling at least one site controller, and where the at least one site controller controls at least one test module and its corresponding device under test (DUT). The method further includes creating an object file management framework for establishing a standard interface between vendor-supplied pattern compilers and the modular test system, receiving a pattern source file, creating a patternobject metafile based on the pattern source file using the object file management framework, and testing the device under test through the test module using the pattern object metafile.
AT05743262T 2004-05-22 2005-05-23 METHOD AND STRUCTURE FOR DEVELOPING A TEST PROGRAM FOR INTEGRATED SEMICONDUCTOR CIRCUITS ATE451625T1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US57357704P 2004-05-22 2004-05-22
US10/918,513 US7209851B2 (en) 2003-02-14 2004-08-13 Method and structure to develop a test program for semiconductor integrated circuits
PCT/JP2005/009816 WO2005114241A2 (en) 2004-05-22 2005-05-23 Method and structure to develop a test program for semiconductor integrated circuits

Publications (1)

Publication Number Publication Date
ATE451625T1 true ATE451625T1 (en) 2009-12-15

Family

ID=38131583

Family Applications (3)

Application Number Title Priority Date Filing Date
AT05743357T ATE438865T1 (en) 2004-05-22 2005-05-23 METHOD AND SYSTEM FOR CONTROLLING CHANGEABLE COMPONENTS IN A MODULAR TEST SYSTEM
AT05743262T ATE451625T1 (en) 2004-05-22 2005-05-23 METHOD AND STRUCTURE FOR DEVELOPING A TEST PROGRAM FOR INTEGRATED SEMICONDUCTOR CIRCUITS
AT05743229T ATE451624T1 (en) 2004-05-22 2005-05-23 METHOD AND STRUCTURE FOR DEVELOPING A TEST PROGRAM FOR INTEGRATED SEMICONDUCTOR CIRCUITS

Family Applications Before (1)

Application Number Title Priority Date Filing Date
AT05743357T ATE438865T1 (en) 2004-05-22 2005-05-23 METHOD AND SYSTEM FOR CONTROLLING CHANGEABLE COMPONENTS IN A MODULAR TEST SYSTEM

Family Applications After (1)

Application Number Title Priority Date Filing Date
AT05743229T ATE451624T1 (en) 2004-05-22 2005-05-23 METHOD AND STRUCTURE FOR DEVELOPING A TEST PROGRAM FOR INTEGRATED SEMICONDUCTOR CIRCUITS

Country Status (4)

Country Link
JP (1) JP4332200B2 (en)
CN (6) CN1981202A (en)
AT (3) ATE438865T1 (en)
DE (3) DE602005018204D1 (en)

Families Citing this family (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7925940B2 (en) * 2007-10-17 2011-04-12 Synopsys, Inc. Enhancing speed of simulation of an IC design while testing scan circuitry
US8094566B2 (en) * 2009-12-24 2012-01-10 Advantest Corporation Test apparatus and test method
CN102215140B (en) * 2010-04-02 2013-03-27 英业达股份有限公司 Storage LAN verification device
CN102378232A (en) * 2010-08-23 2012-03-14 财团法人资讯工业策进会 Wireless network signal test system and measuring method thereof
WO2012033484A1 (en) * 2010-09-07 2012-03-15 Verigy (Singapore) Pte. Ltd. Systems, methods and apparatus using virtual appliances in a semiconductor test environment
CN101980174B (en) * 2010-11-24 2012-07-04 中国人民解放军国防科学技术大学 Method for automatically testing energy consumption of computer application program interval
JP2012167958A (en) * 2011-02-10 2012-09-06 Nippon Syst Wear Kk Examination information display, method, program, and computer readable medium storing such software
CN102608517A (en) * 2012-02-16 2012-07-25 工业和信息化部电子第五研究所 Method for rapidly creating integrated circuit test program package
US9606183B2 (en) * 2012-10-20 2017-03-28 Advantest Corporation Pseudo tester-per-site functionality on natively tester-per-pin automatic test equipment for semiconductor test
US10161993B2 (en) * 2013-02-21 2018-12-25 Advantest Corporation Tester with acceleration on memory and acceleration for automatic pattern generation within a FPGA block
JP6174898B2 (en) * 2013-04-30 2017-08-02 ルネサスエレクトロニクス株式会社 Semiconductor test equipment
TWI490689B (en) * 2013-05-17 2015-07-01 英業達股份有限公司 System for updating test command and method thereof
CN104298590B (en) * 2013-07-16 2019-05-10 爱德万测试公司 For pressing the quick semantic processor of pin APG
CN103413003B (en) * 2013-08-21 2016-07-06 浪潮(北京)电子信息产业有限公司 A kind of sequence transmission, reception device and method
KR102147172B1 (en) * 2014-04-09 2020-08-31 삼성전자주식회사 System on chip and verification method thereof
US9672020B2 (en) 2014-09-19 2017-06-06 Microsoft Technology Licensing, Llc Selectively loading precompiled header(s) and/or portion(s) thereof
WO2016095993A1 (en) 2014-12-17 2016-06-23 Siemens Aktiengesellschaft Checking a functional module of an automation system
CN107454124B (en) * 2016-05-31 2020-11-03 创新先进技术有限公司 Equipment automation method and device
CN106507098B (en) * 2016-10-09 2018-10-19 珠海市魅族科技有限公司 The method and apparatus of data processing
CN106603074A (en) * 2016-11-03 2017-04-26 武汉新芯集成电路制造有限公司 DAC circuit parallel testing system and parallel testing method
CN107959981B (en) * 2017-10-30 2020-07-10 捷开通讯(深圳)有限公司 A kind of communication terminal and communication test method
CN109324956B (en) * 2018-08-20 2021-11-05 深圳前海微众银行股份有限公司 System testing method, device, and computer-readable storage medium
CN109508290A (en) * 2018-10-25 2019-03-22 深圳点猫科技有限公司 A kind of automated testing method and electronic equipment based on educational system
CN109884923A (en) * 2019-02-21 2019-06-14 苏州天准科技股份有限公司 A kind of configurable system of automation equipment control moduleization
CN109975650B (en) * 2019-04-30 2024-07-12 珠海市运泰利自动化设备有限公司 TypeC connects even board multichannel test platform
CN110954804B (en) * 2019-12-19 2021-11-02 上海御渡半导体科技有限公司 Device and method for accurately diagnosing cBit array faults in batch
WO2022120159A1 (en) * 2020-12-03 2022-06-09 Synopsys, Inc. Automatic sequential retry on hardware design compilation failure
CN112835562A (en) * 2021-01-25 2021-05-25 深圳前海微众银行股份有限公司 A single-file component development method and device, and electronic equipment
CN113051114A (en) * 2021-03-19 2021-06-29 无锡市软测认证有限公司 Method for improving chip testing efficiency
CN113050952B (en) * 2021-04-19 2024-07-05 杭州至千哩科技有限公司 Pseudo instruction compiling method, pseudo instruction compiling device, computer equipment and storage medium
CN113238834B (en) * 2021-05-31 2023-08-08 北京世冠金洋科技发展有限公司 Simulation model file processing method and device and electronic equipment
CN113342649B (en) * 2021-05-31 2023-11-14 上海创景信息科技有限公司 Methods, media and equipment for unit testing based on real target machines
KR102314419B1 (en) * 2021-07-27 2021-10-19 (주) 에이블리 Apparatus and method for generating semiconductor test pattern
CN113740077B (en) * 2021-09-13 2024-08-16 广州文远知行科技有限公司 Vehicle chassis testing method, device, equipment and storage medium
CN114252758B (en) * 2021-12-03 2024-12-06 杭州至千哩科技有限公司 ATE test channel resource configuration method, device, equipment and storage medium
CN114646867B (en) * 2022-05-18 2022-10-28 南京宏泰半导体科技有限公司 Integrated circuit concurrent testing device and method
CN115630594B (en) * 2022-12-19 2023-03-21 杭州加速科技有限公司 Method and system for converting chip design simulation file into Pattern file
CN116257037B (en) * 2023-05-15 2023-08-11 通达电磁能股份有限公司 Method, system, electronic device and storage medium for generating controller test program
CN116520754B (en) * 2023-06-27 2023-09-22 厦门芯泰达集成电路有限公司 DPS module control method and system based on preloading mode
CN117539700A (en) * 2023-11-13 2024-02-09 宁畅信息产业(北京)有限公司 Test management method, device, equipment and medium
CN119381283B (en) * 2024-12-31 2025-03-21 合肥晶合集成电路股份有限公司 Semiconductor measurement methods and measurement master sites

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0143623A3 (en) * 1983-11-25 1987-09-23 Mars Incorporated Automatic test equipment
JPH03130839A (en) 1989-10-17 1991-06-04 Chubu Nippon Denki Software Kk On-line simulation system
US6208439B1 (en) * 1990-11-09 2001-03-27 Litel Instruments Generalized geometric transforms for computer generated holograms
US6678643B1 (en) * 1999-06-28 2004-01-13 Advantest Corp. Event based semiconductor test system
US6629282B1 (en) * 1999-11-05 2003-09-30 Advantest Corp. Module based flexible semiconductor test system
US6651204B1 (en) * 2000-06-01 2003-11-18 Advantest Corp. Modular architecture for memory testing on event based test system
CN1154045C (en) * 2000-07-25 2004-06-16 华为技术有限公司 A cross-platform co-simulation system
US6779140B2 (en) * 2001-06-29 2004-08-17 Agilent Technologies, Inc. Algorithmically programmable memory tester with test sites operating in a slave mode
US6737926B2 (en) * 2001-08-30 2004-05-18 Micron Technology, Inc. Method and apparatus for providing clock signals at different locations with minimal clock skew
US7178115B2 (en) * 2002-04-11 2007-02-13 Advantest Corp. Manufacturing method and apparatus to avoid prototype-hold in ASIC/SOC manufacturing
US7460988B2 (en) * 2003-03-31 2008-12-02 Advantest Corporation Test emulator, test module emulator, and record medium storing program therein

Also Published As

Publication number Publication date
CN1981202A (en) 2007-06-13
DE602005018205D1 (en) 2010-01-21
CN100585422C (en) 2010-01-27
CN100541218C (en) 2009-09-16
CN1997909A (en) 2007-07-11
CN1981203A (en) 2007-06-13
DE602005015848D1 (en) 2009-09-17
ATE451624T1 (en) 2009-12-15
CN1997909B (en) 2010-11-10
CN1989417A (en) 2007-06-27
DE602005018204D1 (en) 2010-01-21
JP4332200B2 (en) 2009-09-16
JP2009008683A (en) 2009-01-15
CN1997908A (en) 2007-07-11
CN1981200A (en) 2007-06-13
CN100580473C (en) 2010-01-13
ATE438865T1 (en) 2009-08-15
CN1989417B (en) 2011-03-16

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