ATE453893T1 - Umkonfigurierbares, modulares, hierarchisches parallelprozessorsystem - Google Patents

Umkonfigurierbares, modulares, hierarchisches parallelprozessorsystem

Info

Publication number
ATE453893T1
ATE453893T1 AT05798094T AT05798094T ATE453893T1 AT E453893 T1 ATE453893 T1 AT E453893T1 AT 05798094 T AT05798094 T AT 05798094T AT 05798094 T AT05798094 T AT 05798094T AT E453893 T1 ATE453893 T1 AT E453893T1
Authority
AT
Austria
Prior art keywords
machine
incoming data
processor system
links
level status
Prior art date
Application number
AT05798094T
Other languages
English (en)
Inventor
Pierre Guilmette
Serge Glories
Original Assignee
Idarca Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Idarca Inc filed Critical Idarca Inc
Application granted granted Critical
Publication of ATE453893T1 publication Critical patent/ATE453893T1/de

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3893—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator
    • G06F9/3895—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros
    • G06F9/3897—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled in tandem, e.g. multiplier-accumulator for complex operations, e.g. multidimensional or interleaved address generators, macros with adaptable data path

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Logic Circuits (AREA)
  • Multi Processors (AREA)
  • Debugging And Monitoring (AREA)
AT05798094T 2004-10-18 2005-10-14 Umkonfigurierbares, modulares, hierarchisches parallelprozessorsystem ATE453893T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0411020 2004-10-18
PCT/EP2005/011169 WO2006042736A1 (fr) 2004-10-18 2005-10-14 Systeme de processeur parallele reconfigurable, modulaire et hierarchique

Publications (1)

Publication Number Publication Date
ATE453893T1 true ATE453893T1 (de) 2010-01-15

Family

ID=35501205

Family Applications (1)

Application Number Title Priority Date Filing Date
AT05798094T ATE453893T1 (de) 2004-10-18 2005-10-14 Umkonfigurierbares, modulares, hierarchisches parallelprozessorsystem

Country Status (5)

Country Link
US (1) US20080195839A1 (de)
EP (1) EP1803061B1 (de)
AT (1) ATE453893T1 (de)
DE (1) DE602005018670D1 (de)
WO (1) WO2006042736A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4743297B2 (ja) * 2009-03-16 2011-08-10 コニカミノルタビジネステクノロジーズ株式会社 画像形成装置、機能拡張方法およびユーザ認証システム
US8572433B2 (en) * 2010-03-10 2013-10-29 Texas Instruments Incorporated JTAG IC with commandable circuit controlling data register control router
RU2477513C1 (ru) * 2011-12-02 2013-03-10 Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования Вятский государственный университет ФГБОУ ВПО "ВятГУ" Ячейка однородной вычислительной среды, однородная вычислительная среда и устройство для конвейерных арифметических вычислений по заданному модулю
US11188384B2 (en) * 2018-11-07 2021-11-30 Ebay Inc. Resource trust model for securing component state data for a resource using blockchains
RU202071U1 (ru) * 2020-10-07 2021-01-28 Федеральное государственное автономное образовательное учреждение высшего образования «Национальный исследовательский Томский государственный университет» Ячейка однородной среды
CN117389572B (zh) * 2023-12-12 2024-02-27 北京麟卓信息科技有限公司 一种基于指令分层的dsp汇编代码自动优化方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4543642A (en) * 1982-01-26 1985-09-24 Hughes Aircraft Company Data Exchange Subsystem for use in a modular array processor
JP4651790B2 (ja) * 2000-08-29 2011-03-16 株式会社ガイア・システム・ソリューション データ処理装置
US7325123B2 (en) * 2001-03-22 2008-01-29 Qst Holdings, Llc Hierarchical interconnect for configuring separate interconnects for each group of fixed and diverse computational elements
CA2344098A1 (fr) * 2001-04-12 2002-10-12 Serge Glories Systeme de processeur modulaire a elements configurables et intereliables permettant de realiser de multiples calculs paralleles sur du signal ou des donnees brutes
US20030088757A1 (en) * 2001-05-02 2003-05-08 Joshua Lindner Efficient high performance data operation element for use in a reconfigurable logic environment
US7194598B2 (en) * 2004-01-26 2007-03-20 Nvidia Corporation System and method using embedded microprocessor as a node in an adaptable computing machine

Also Published As

Publication number Publication date
EP1803061A1 (de) 2007-07-04
EP1803061B1 (de) 2009-12-30
US20080195839A1 (en) 2008-08-14
DE602005018670D1 (de) 2010-02-11
WO2006042736A1 (fr) 2006-04-27

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