ATE463880T1 - Phasenverriegelter oszillator - Google Patents

Phasenverriegelter oszillator

Info

Publication number
ATE463880T1
ATE463880T1 AT07747553T AT07747553T ATE463880T1 AT E463880 T1 ATE463880 T1 AT E463880T1 AT 07747553 T AT07747553 T AT 07747553T AT 07747553 T AT07747553 T AT 07747553T AT E463880 T1 ATE463880 T1 AT E463880T1
Authority
AT
Austria
Prior art keywords
oscillator
frequency
phase detector
multiplier
phase locked
Prior art date
Application number
AT07747553T
Other languages
English (en)
Inventor
Ben Jarle Imenes
Stig Rooth
Original Assignee
Norspace As
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Norspace As filed Critical Norspace As
Application granted granted Critical
Publication of ATE463880T1 publication Critical patent/ATE463880T1/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/20—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a harmonic phase-locked loop, i.e. a loop which can be locked to one of a number of harmonically related frequencies applied to it
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
    • H03L2207/10—Indirect frequency synthesis using a frequency multiplier in the phase-locked loop or in the reference signal path

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
AT07747553T 2006-03-30 2007-02-21 Phasenverriegelter oszillator ATE463880T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
NO20061439A NO324467B1 (no) 2006-03-30 2006-03-30 Faselast oscillator
PCT/NO2007/000066 WO2007114705A1 (en) 2006-03-30 2007-02-21 Phase locked oscillator

Publications (1)

Publication Number Publication Date
ATE463880T1 true ATE463880T1 (de) 2010-04-15

Family

ID=38048014

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07747553T ATE463880T1 (de) 2006-03-30 2007-02-21 Phasenverriegelter oszillator

Country Status (6)

Country Link
US (1) US7876164B2 (de)
EP (1) EP2011229B1 (de)
AT (1) ATE463880T1 (de)
DE (1) DE602007005791D1 (de)
NO (1) NO324467B1 (de)
WO (1) WO2007114705A1 (de)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB0701812D0 (en) * 2007-01-31 2007-03-14 Qinetiq Ltd Antenna system and radar system incorporating the same
US8040190B2 (en) * 2008-05-01 2011-10-18 Csem Centre Suisse D'electronique Et De Microtechnique Sa-Recherche Et Developpement Phase-locked loop
US7940130B2 (en) * 2009-05-22 2011-05-10 Agilent Technologies, Inc. Frequency generator and method of frequency generation with multiple sampling phase detectors
KR101198319B1 (ko) 2011-04-21 2012-12-06 (주)젠믹스텍 위상 고정 유전체 공진기 발진기
CN102315927A (zh) * 2011-06-30 2012-01-11 大唐移动通信设备有限公司 一种时钟同步装置及方法
CN111934803B (zh) 2016-03-11 2025-02-21 华为技术有限公司 支持多时钟域时钟传递的设备和方法
US9742380B1 (en) * 2016-06-01 2017-08-22 Xilinx, Inc. Phase-locked loop having sampling phase detector
KR101959789B1 (ko) * 2017-10-20 2019-03-20 국방과학연구소 주파수합성기
FR3086131B1 (fr) * 2018-09-14 2021-06-04 Commissariat Energie Atomique Dispositif de reglage du verrouillage d'un multiplicateur de frequence a verrouillage par injection
CN112234986B (zh) * 2020-09-04 2021-07-13 上海鸿晔电子科技股份有限公司 一种信号源
US12562745B2 (en) * 2022-06-16 2026-02-24 Intel Corporation Apparatus, system, and method of a digitally-controlled frequency multiplier

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2044025B (en) * 1978-11-14 1982-12-22 Rohde & Schwarz Standard frequency generator
US4720688A (en) 1985-05-15 1988-01-19 Matsushita Electric Industrial Co., Ltd. Frequency synthesizer
US5055800A (en) * 1990-04-30 1991-10-08 Motorola, Inc. Fractional n/m synthesis
US5345193A (en) * 1993-07-28 1994-09-06 Wiltron Company Phase locked loop with loop gain stabilization circuit
US5748144A (en) * 1996-01-26 1998-05-05 Trimble Navigation Limited GPS timing receiver using oversampling
EP0903860A1 (de) * 1997-09-17 1999-03-24 Matsushita Electric Industrial Co., Ltd. PLL-Frequenzsynthetisierer
SE514516C2 (sv) 1999-06-11 2001-03-05 Ericsson Telefon Ab L M En anordning i ett elektroniskt system
US20020145475A1 (en) 2001-04-10 2002-10-10 Apa Wireless Technologies Dual conversion RF synthesizer utilizing improved push-push VCO design
US20070104292A1 (en) * 2005-11-04 2007-05-10 Peter Gregorius Timing recovery phase locked loop

Also Published As

Publication number Publication date
US20090115534A1 (en) 2009-05-07
EP2011229B1 (de) 2010-04-07
NO20061439L (no) 2007-10-01
WO2007114705A1 (en) 2007-10-11
NO324467B1 (no) 2007-10-22
DE602007005791D1 (de) 2010-05-20
EP2011229A1 (de) 2009-01-07
US7876164B2 (en) 2011-01-25

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