ATE464723T1 - Verfahren zur reduzierung der durch verzögerte reflexion zwischen symbolen entstehenden interferenzen - Google Patents

Verfahren zur reduzierung der durch verzögerte reflexion zwischen symbolen entstehenden interferenzen

Info

Publication number
ATE464723T1
ATE464723T1 AT06758886T AT06758886T ATE464723T1 AT E464723 T1 ATE464723 T1 AT E464723T1 AT 06758886 T AT06758886 T AT 06758886T AT 06758886 T AT06758886 T AT 06758886T AT E464723 T1 ATE464723 T1 AT E464723T1
Authority
AT
Austria
Prior art keywords
signal
reflection
isi
delayed reflection
channel
Prior art date
Application number
AT06758886T
Other languages
English (en)
Inventor
Baruch Bublil
Amir Mezer
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Application granted granted Critical
Publication of ATE464723T1 publication Critical patent/ATE464723T1/de

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03343—Arrangements at the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03012—Arrangements for removing intersymbol interference operating in the time domain
    • H04L25/03114—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals
    • H04L25/03127—Arrangements for removing intersymbol interference operating in the time domain non-adaptive, i.e. not adjustable, manually adjustable, or adjustable only during the reception of special signals using only passive components
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03248—Arrangements for operating in conjunction with other apparatus
    • H04L25/03254—Operation with other circuitry for removing intersymbol interference
    • H04L25/03267—Operation with other circuitry for removing intersymbol interference with decision feedback equalisers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006—Arrangements for removing intersymbol interference
    • H04L25/03178—Arrangements involving sequence estimation techniques
    • H04L25/03248—Arrangements for operating in conjunction with other apparatus
    • H04L25/03286—Arrangements for operating in conjunction with other apparatus with channel-decoding circuitry

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
  • Error Detection And Correction (AREA)
  • Dc Digital Transmission (AREA)
  • Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
  • Transition And Organic Metals Composition Catalysts For Addition Polymerization (AREA)
AT06758886T 2005-05-03 2006-04-28 Verfahren zur reduzierung der durch verzögerte reflexion zwischen symbolen entstehenden interferenzen ATE464723T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/121,853 US7724847B2 (en) 2005-05-03 2005-05-03 Techniques for reduction of delayed reflection inter-symbol interference
PCT/US2006/016710 WO2006119231A1 (en) 2005-05-03 2006-04-28 Techniques for reduction of delayed reflection inter-symbol interference

Publications (1)

Publication Number Publication Date
ATE464723T1 true ATE464723T1 (de) 2010-04-15

Family

ID=36809149

Family Applications (1)

Application Number Title Priority Date Filing Date
AT06758886T ATE464723T1 (de) 2005-05-03 2006-04-28 Verfahren zur reduzierung der durch verzögerte reflexion zwischen symbolen entstehenden interferenzen

Country Status (6)

Country Link
US (1) US7724847B2 (de)
EP (1) EP1878183B1 (de)
CN (1) CN101189845A (de)
AT (1) ATE464723T1 (de)
DE (1) DE602006013613D1 (de)
WO (1) WO2006119231A1 (de)

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US20080056408A1 (en) * 2006-08-30 2008-03-06 Amir Mezer A receiver architecture
US20080118229A1 (en) * 2006-11-20 2008-05-22 Broadcom Corporation ITERATIVE CODE SYSTEM FOR STREAMING HDDs
US7983373B2 (en) * 2007-02-07 2011-07-19 Vintomie Networks B.V., Llc Clock distribution for 10GBase-T analog front end
US9008129B2 (en) * 2010-02-18 2015-04-14 Broadcom Corporation System and method for frequency division multiplexed high speed physical layer devices
US9647799B2 (en) * 2012-10-16 2017-05-09 Inphi Corporation FEC coding identification
CN106921598A (zh) * 2015-12-28 2017-07-04 晨星半导体股份有限公司 均衡器装置及其软决策方法
CN108702247B (zh) * 2016-01-25 2019-06-07 瓦伦斯半导体有限责任公司 快速自适应数字消除器
US10439661B1 (en) * 2017-02-19 2019-10-08 Payam Heydari Low-power high-speed signaling scheme over transmission line with unmatched terminations
US11855056B1 (en) 2019-03-15 2023-12-26 Eliyan Corporation Low cost solution for 2.5D and 3D packaging using USR chiplets
CN112398765B (zh) * 2019-08-15 2021-10-01 华为技术有限公司 一种信号处理方法、接收机及数字处理芯片
US11876622B2 (en) * 2020-03-20 2024-01-16 Intel Corporation LDPC encoder and decoder for multi-mode higher speed passive optical networks
KR102799335B1 (ko) 2020-08-21 2025-04-23 삼성전자주식회사 인터페이스 회로 및 이를 포함하는 시스템
US12438095B1 (en) 2021-05-06 2025-10-07 Eliyan Corp. Complex system-in-package architectures leveraging high-bandwidth long-reach die-to-die connectivity over package substrates
US11855043B1 (en) 2021-05-06 2023-12-26 Eliyan Corporation Complex system-in-package architectures leveraging high-bandwidth long-reach die-to-die connectivity over package substrates
US12204794B1 (en) 2021-05-18 2025-01-21 Eliyan Corporation Architecture for DRAM control optimization using simultaneous bidirectional memory interfaces
US11842986B1 (en) 2021-11-25 2023-12-12 Eliyan Corporation Multi-chip module (MCM) with interface adapter circuitry
US12190038B1 (en) 2021-11-25 2025-01-07 Eliyan Corporation Multi-chip module (MCM) with multi-port unified memory
US11841815B1 (en) 2021-12-31 2023-12-12 Eliyan Corporation Chiplet gearbox for low-cost multi-chip module applications
US12248419B1 (en) 2022-05-26 2025-03-11 Eliyan Corporation Interface conversion circuitry for universal chiplet interconnect express (UCIe)
US12058874B1 (en) 2022-12-27 2024-08-06 Eliyan Corporation Universal network-attached memory architecture
US12182040B1 (en) 2023-06-05 2024-12-31 Eliyan Corporation Multi-chip module (MCM) with scalable high bandwidth memory
US12525540B1 (en) 2023-06-05 2026-01-13 Eliyan Corp. Multi-chip module (MCM) with scalable high bandwidth memory
US12204482B1 (en) 2023-10-09 2025-01-21 Eliyan Corporation Memory chiplet with efficient mapping of memory-centric interface to die-to-die (D2D) unit interface modules
US12248413B1 (en) 2023-10-11 2025-03-11 Eliyan Corporation Universal memory interface utilizing die-to-die (D2D) interfaces between chiplets

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5881108A (en) * 1996-02-22 1999-03-09 Globespan Technologies, Inc. Adaptive pre-equalizer for use in data communications equipment
US6012161A (en) * 1997-11-26 2000-01-04 At&T Corp. System and method for joint coding and decision feedback equalization
US6925107B2 (en) * 1998-03-06 2005-08-02 Deutsche Telekom Ag Decoding method and decoding device for a CDMA transmission system for demodulating a received signal available in serial code concatenation
US7006563B2 (en) 2001-02-01 2006-02-28 Broadcom Corporation Decision feedback equalizer for minimum and maximum phase channels
US20030180055A1 (en) * 2002-03-22 2003-09-25 Kameran Azadet Optically calibrated pulse amplitude modulated transmission scheme for optical channels
EP1495564A4 (de) * 2002-04-17 2009-04-29 Thomson Licensing Automatischer modusselektor für entzerrer moduskorrektur
US6961373B2 (en) 2002-07-01 2005-11-01 Solarflare Communications, Inc. Method and apparatus for channel equalization
US7508297B2 (en) * 2005-02-11 2009-03-24 Ortronics, Inc. Apparatus and method for communication system

Also Published As

Publication number Publication date
DE602006013613D1 (de) 2010-05-27
WO2006119231A1 (en) 2006-11-09
EP1878183A1 (de) 2008-01-16
US20060251194A1 (en) 2006-11-09
CN101189845A (zh) 2008-05-28
EP1878183B1 (de) 2010-04-14
US7724847B2 (en) 2010-05-25

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